SPBT2632C1A

Bluetooth® technology class-1 module

Datasheet - production data

Features
 Bluetooth radio
– Fully embedded Bluetooth® v3.0 with
profiles
– Class 1 module
– Complete RF ready module
– 128-bit encryption security
– Range up to 60 m LOS
– Integrated antenna
– Multipoint capability
 ST Micro Cortex-M3 microprocessor up to
72 MHz (256 kb Flash, 48 kb RAM)
 Modem transmitter speed
– With SPP service active: 560 kbps
transmission speed
 General I/O
– 16 general purpose I/Os
 User interface
– AT2 command set (abSerial)
– Firmware upgrade over UART
 FCC and Bluetooth® qualified
 Single voltage supply: 2.5 V typical
 Small form factor: 15 x 27 x 2.9 mm
 Operating temperature range: -40 °C to 85 °C

June 2016 DocID022930 Rev 7 1/27

This is information on a product in full production. www.st.com
Contents SPBT2632C1A

Contents

1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 RoHS compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4 Software architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1 Lower layer stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2 Upper layer stack: Amp’ed UP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.3 AT command set: abSerial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.4 Bluetooth firmware implantation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5 Hardware specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.3 High speed mode CPU current consumption . . . . . . . . . . . . . . . . . . . . . . . 8
5.4 Standard CPU mode current consumption . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.5 I/O operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.6 Selected RF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.7 Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.8 Mechanical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6 Hardware block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7 Hardware design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7.1 Module reflow installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7.2 GPIO interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.3 GPIO configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.4 UART interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.5 PCB layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.6 Reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.6.1 External reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.6.2 Internal reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2/27 DocID022930 Rev 7

SPBT2632C1A Contents

7.7 Apple iOS CP reference design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

8 Regulatory compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8.1 FCC and IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8.2 Bluetooth certification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8.3 CE certification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

9 Traceability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

10 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

DocID022930 Rev 7 3/27

27
Description SPBT2632C1A

1 Description

The SPBT2632C1A.AT2 is an easy to use Bluetooth module, compliant with Bluetooth v3.0.
The module provides complete RF platform in a small form factor.
The SPBT2632C1A.AT2 enables electronic devices with wireless connectivity, not requiring
any RF experience or expertise for integration into the final product. The
SPBT2632C1A.AT2 module, being a certified solution, optimizes the time to market of the
final application.
The module is designed for maximum performance in a minimal space including fast speed
UART and 16 general purpose I/O lines, several serial interface options, and up to 560 kbps
transmission speed with SPP service active, 250 kbps with iAP1 service active.
An optimized design allows the integration of a complete working Bluetooth modem,
including antenna and LPO (low power oscillator), enabling low power mode capability in
the minimum possible size.
The SPBT2632C1A.AT2 is a surface mount PCB module that provides fully embedded,
ready-to-use Bluetooth wireless technology. The reprogrammable Flash memory contains
embedded firmware for serial cable replacement using the Bluetooth SPP profile.
Embedded Bluetooth AT2 command firmware is a friendly interface, which realizes a simple
control for cable replacement, enabling communication with most Bluetooth enabled
devices, provided that the devices support SPP profile. The SPBT2532C1A.AT2, supporting
iAP1 profile, provides communication with Android, smartphone and Apple® iOS Bluetooth
enabled devices. An Apple authentication IC is required to exchange data with an Apple
device or access an Apple device application. The AT2 FW includes the Bluetooth SPP
profile capable of recognizing the Apple authentication chip.

4/27 DocID022930 Rev 7

SPBT2632C1A RoHS compliance

2 RoHS compliance

ST Bluetooth modules comply with the ECOPACK2 level of RoHS compliance. The Material
Declaration file is available from the ST website at the following URL:
http://www.st.com/web/catalog/sense_power/FM1968/CL1976/SC1324/PF253471#.

3 Applications

 Serial cable replacement

 M2M industrial control
 Service diagnostics
 Data acquisition equipment
 Machine controls
 Sensor monitoring
 Security systems
 Mobile health

DocID022930 Rev 7 5/27

27
Software architecture SPBT2632C1A

4 Software architecture

4.1 Lower layer stack

 Bluetooth v3.0
 Device power active, sleep and deep sleep
 Wake on Bluetooth feature optimized power consumption of host CPU
 Authentication and encryption
 Encryption key length from 8 bits to 128 bits
 Persistent Flash memory for BD address and radio parameter storage
 All ACL (asynchronous connection less) packet types
 Multipoint capability
 Sniff mode: fully supported to maximum allowed intervals
 Master slave switch supported during connection and post connection
 Dedicated inquiry access code for improved inquiry scan performance
 Dynamic packet selection channel quality driven data rate to optimize link performance
 Dynamic power control
 Bluetooth radio natively supports 802.11b coexistence AFH

4.2 Upper layer stack: Amp’ed UP

 SPP, IAP1, SDAP and GAP protocols
 RFComm, SDP and L2CAP supported
 Multipoint with simultaneous slaves

4.3 AT command set: abSerial

 The complete command list including the iAP1 commands is reported in user manual
UM1547

6/27 DocID022930 Rev 7

SPBT2632C1A Software architecture

4.4 Bluetooth firmware implantation

Figure 1. FW architecture

L$3

$0Y

DocID022930 Rev 7 7/27

27
Hardware specifications SPBT2632C1A

5 Hardware specifications

General conditions (VIN= 2.5 V and 25 °C).

5.1 Recommended operating conditions

Table 1. Recommended operating conditions

Rating Min. Typ. Max. Unit

Operating temperature range -40 - 85 °C

Supply voltage VIN 2.0 2.5 3.6 V
Signal pin voltage - 2.1 - V
RF frequency 2400 - 2483.5 MHz

5.2 Absolute maximum ratings

Table 2. Absolute maximum ratings

Rating Min. Typ. Max. Unit

Storage temperature range -55 - +105 °C

Supply voltage, VIN -0.3 - + 5.0 V
I/O pin voltage, VIO -0.3 - + 5.5 V
RF input power - - -5 dBm

5.3 High speed mode CPU current consumption

 High speed CPU mode current consumption
– CPU 32 MHz
– UART supports up to 921 Kbps
– Max data throughput
– Shallow sleep enabled

Table 3. Current consumption

Modes (typical power consumption) Avg Unit

ACL data 115 K Baud UART at max. throughput (master) 23 mA

ACL data 115 K Baud UART at max. throughput (slave) 27.5 mA
Connection, no data traffic, master 9.1 mA
Connection, no data traffic, slave 11.2 mA
Connection in sniff (Tsniff=375 ms), no data traffic, master 490 µA

8/27 DocID022930 Rev 7

SPBT2632C1A Hardware specifications

Table 3. Current consumption (continued)

Modes (typical power consumption) Avg Unit

Standby, without deep sleep 8.6 mA

Standby, with deep sleep 60 µA
Page/inquiry scan, deep sleep 520 µA

5.4 Standard CPU mode current consumption

 High speed CPU mode
– CPU 8 MHz
– UART supports up to 115 Kbps
– Data throughput up to 200 Kbps
– Shallow sleep enabled

Table 4. Standard CPU mode current consumption

Modes (typical power consumption) Avg. Unit

ACL data 115 K Baud UART at max. throughput (master) 16.7 mA

ACL data 115 K Baud UART at max. throughput (slave) 18 mA
Connection, no data traffic, master 4.9 mA
Connection, no data traffic, slave 7.0 mA
Connection in sniff (Tsniff=375 ms), no data traffic, master 490 µA
Standby, without deep sleep 4.2 mA
Standby, with deep sleep 60 µA
Page/Inquiry scan, deep sleep 520 µA

5.5 I/O operating characteristics

Table 5. I/O operating characteristics

Symbol Parameter Min. Max. Unit Conditions

VIL Low level input voltage - 0.6 V VIN, 2.1 V

VIH High level input voltage 1.4 - V VIN, 2.1 V
VOL Low level output voltage - 0.4 V VIN, 2.1 V
VOH High level output voltage 1.8 - V VIN, 2.1 V
IOL Low level output current - 4.0 mA VOL = 0.4 V
IOH High level output current - 4.0 mA VOH = 1.8 V
RPU Pull-up resistor 80 120 kW Resistor turned on
RPD Pull-down resistor 80 120 kW Resistor turned on

DocID022930 Rev 7 9/27

27
Hardware specifications SPBT2632C1A

5.6 Selected RF characteristics

Table 6. Selected RF characteristics

Parameters Conditions Typical(1) Unit

Antenna load 50 ohm

Radio receiver

Sensitivity level BER < .001 with DH5 -90 dBm

Maximum usable level BER < .001 with DH1 0 dBm
Input VSWR 2.5:1

Radio transmitter

Maximum output power 50 W load +10 dBm

Initial carrier frequency tolerance 0 kHz
20 dB bandwidth for modulated carrier 935 kHz
1. RF characteristics can be influenced by physical characteristics of final application

5.7 Pin assignment

Figure 2. Pin connection diagram
6L]HĆĆĆ[ĆĆ[ĆĆPPĆKHLJKWĆWROHUDQFHĆĆĆPP

$0Y

10/27 DocID022930 Rev 7

SPBT2632C1A Hardware specifications

Table 7. Pin assignment

Name Type Pin # Description ALT function(1) 5 V tolerant

UART interface

RXD I 8 Receive data Y

TXD O 6 Transmit data Y
CTS I 9 Clear to send (active low) Y
Request to send (active
RTS O 10 Y
low)

Boot loader

Boot 0 I 2 Reserved

Power and ground

VDD 24 VDD
GND 23 GND

Reset

Reset input (active low for

RESETN I 3 2.5 Vmax
5 ms)

GPIO - general purpose input/output

General purpose
GPIO [0] I/O 16 Y
input/output
General purpose
GPIO [1] I/O 17 Y
input/output
General purpose
GPIO [2] I/O 19 Y
input/output
General purpose
GPIO [3] I/O 1 Y
input/output
General purpose
GPIO [4] I/O 18 UART 2 RXD Y
input/output
General purpose
GPIO [5] I/O 20 UART 2 TXD Y
input/output
General purpose
GPIO [6] I/O 22 ADC 0 2.5 Vmax
input/output
General purpose
GPIO [7] I/O 13 ADC 1 2.5 Vmax
input/output
General purpose
GPIO [8] I/O 4 ADC 2 2.5 Vmax
input/output
General purpose
GPIO [9] I/O 7 ADC 3 2.5 Vmax
input/output
General purpose
GPIO [10] I/O 5 Y
input/output

DocID022930 Rev 7 11/27

27
Hardware specifications SPBT2632C1A

Table 7. Pin assignment (continued)

Name Type Pin # Description ALT function(1) 5 V tolerant

General purpose
GPIO [11] I/O 11 I2C SCL Y
input/output
General purpose
GPIO [12] I/O 12 I2C SDA Y
input/output
General purpose
GPIO [13] I/O 15 Y
input/output
General purpose
GPIO [14] I/O 14 Y
input/output
General purpose
GPIO [15] I/O 21 DAC 2.5 Vmax
input/output
1. Please note that the usage of ALT function is dependent upon the firmware that is loaded into the module,
and is beyond the scope of this document. The AT command interface uses the main UART by default.

12/27 DocID022930 Rev 7

SPBT2632C1A Hardware specifications

5.8 Mechanical dimensions

Figure 3. Mechanical dimensions

DocID022930 Rev 7 13/27

27
Hardware specifications SPBT2632C1A

Figure 4. Recommend land pattern top view

14/27 DocID022930 Rev 7

SPBT2632C1A Hardware block diagram

6 Hardware block diagram

Figure 5. SPBT2632C1A.AT2 module block diagram

%DWWHU\RU6XSSO\

$50&RUWH[0&8
670
$QWHQQD 5HJXODWRU
63,
.)ODVK ,6

%3 +RVW&RQWUROOHU
8$57
)LOWHU ,QWHUIDFH *3,2

67/& .5$0
8$57
,6
3&0

/32 &ORFN

$0Y

DocID022930 Rev 7 15/27

27
Hardware design SPBT2632C1A

7 Hardware design

The SPBT2632C1A module without AT2 command embedded FW, supports UART, I2C and
GPIO hardware interfaces. Note that the use of these interfaces is dependent upon the
firmware that is loaded into the module, and is beyond the scope of this document. The AT2
command interface uses the main UART by default.
Note: 1 All unused pins should be left floating; do not ground.
2 All GND pins must be well grounded.
3 The area around the module should be free of any ground planes, power planes, trace
routings, or metal for 6 mm from the antenna in all directions.
4 Traces should not be routed underneath the module.

7.1 Module reflow installation

The SPB2632C1A is a high temperature-strength surface-mount Bluetooth module supplied
on a 24-pin, 6-layer PCB. The final assembly recommended reflow profiles are indicated
below.
The soldering phase must be executed with care. In order to avoid an undesired melting
phenomenon, particular attention must be paid to the setup of the peak temperature.
Table 8 contains some suggestions for the temperature profile based on IPC/JEDEC J-STD-
020C, July 2004 recommendations.

Table 8. Soldering
Profile feature PB-free assembly

Average ramp-up rate (TSMAX to TP) 3 °C/sec max.

Preheat:
150 °C
– Temperature min. (TS min.)
200 °C
– Temperature max. (TS max.)
60-100 sec
– Time (ts min. to ts max.)(ts)
Time maintained above:
217 °C
– Temperature TL
60-70 sec
– Temperature TL
Peak temperature (TP) 240 + 0 °C
Time within 5 °C of actual peak temperature (TP) 10-20 sec
Ramp-down rate 6 °C/sec
Time from 25 °C to peak temperature 8 minutes max.

16/27 DocID022930 Rev 7

SPBT2632C1A Hardware design

Figure 6. Soldering profile

$0Y

7.2 GPIO interface

All GPIOs are capable of sinking and sourcing 8 mA of I/O current. GPIO [0] to GPIO [7] are
internally pulled down with 100 k (nominal) resistors, GPIO [8] to GPIO [15] are internally
pulled up with 100 k (nominal) resistors.

7.3 GPIO configuration

Module GPIO configuration depends on the FW embedded.
For example, the following table summarizes the GPIO configuration set by the standard
FW version, the .AT2

GPIO1 GPIO2 GPIO3 GPIO4 GPIO5-7 GPIO8-16

Output/ Input/ Output/
Input/ Input/ Input/
SPBT2632C1A.AT2 connection pulled-down active status
pulled-down pulled-down pulled-up
status probe BOOT probe

GPIO4: active status probe (MCU RUN): always on when the radio is in active mode;
Blinking when the radio is in deep sleep mode
GPIO1: connection status probe: always on when the module is connected
GPIO can be reconfigured using the following commands:
 At+ab gpioconfig [GPIO pin] [I/O]
 At+ab gpioRead [GPIO pin]
 At+ab gpioWrite [GPIO pin] [1/0]

DocID022930 Rev 7 17/27

27
Hardware design SPBT2632C1A

For additional details, refer to user manual UM1547.

7.4 UART interface

The UART is compatible with the 16550 industry standard. Four signals are provided with
the UART interface. The TXD and RXD pins are used for data while the CTS and RTS pins
are used for flow control.

Figure 7. Connection to host device

+RVW %OXHWRRWK
0RGXOH

$0Y

Figure 8. Typical RS232 circuit

$0Y

18/27 DocID022930 Rev 7

SPBT2632C1A Hardware design

7.5 PCB layout guidelines

Figure 9. PCB layout guidelines

$0Y

7.6 Reset circuit

Two types of system reset circuits are detailed below. The maximum voltage that can be
supplied to the RESET pin is 2.5 V. As shown in Figure 9 and Figure 10 the RESET is active
low, in the absence of a reset circuit the pin is internally pulled up and therefore inactive.

7.6.1 External reset circuit

Figure 10. External reset circuit

5(6(7

$0Y

DocID022930 Rev 7 19/27

27
Hardware design SPBT2632C1A

Note: RPU ranges from 30 k to 50 k internally.

7.6.2 Internal reset circuit

Figure 11. Internal reset circuit

5(6(7

$0Y

Note: 1 RPU ranges from 30 k to 50 k internally.

2 RRST should be from 1 kto 10 k.

7.7 Apple iOS CP reference design

The figures below give an indicative overview of what the hardware concept looks like. A
specific MFI co-processor layout is available for licensed MFI developers from the MFI
program.

Figure 12. BT module

9%$7
8
0,6 &BFRQWURO  
*3 ,2Ć>@ 9, 1
9%$7  
%227  *1 '
5
 5(6( 7 *3 ,2Ć>@ 
. &
 *3 ,2Ć>@ *3 ,2Ć>@ 
X)
 *3 ,2Ć>@ *3 ,2Ć>@ 

0&8B5 ;'  
7; ' *3 ,2Ć>@
 *3 ,2Ć>@ *3 ,2Ć>@ 
5
0&8B7;'   
5;' *3 ,2Ć>@
 &7 6 *3 ,2Ć>@ 

 5 76 *3 ,2Ć>@ 
5 '
,&Ć&ORFN   
*3 ,2Ć>@ *3 ,2Ć>@
,&Ć'DWD  
*3 ,2Ć>@ *3 ,2Ć>@

'
63%7&$$7

$0Y

20/27 DocID022930 Rev 7

SPBT2632C1A Hardware design

Figure 13. Co-processor

1.8V

Apple MFI
CO-Processor 2.0c
R?
U? 10k
1 8
VSS VCC
2 7
I2C_SDA RST
3 6
NC I2C_SCL
4 5
1.8V NC NC C? C?
100n 100n
1.8V
R?
10k
R?
SDA 10k

SCL

datasheet_x_ipod.DSN

Figure 14. Power switch

$0Y

DocID022930 Rev 7 21/27

27
Regulatory compliance SPBT2632C1A

8 Regulatory compliance

8.1 FCC and IC

– This module has been tested and found to comply with the FCC part 15 and IC
RSS-210 rules. These limits are designed to provide reasonable protection
against harmful interference in approved installations. This equipment generates,
uses, and can radiate radio frequency energy and, if not installed and used in
accordance with the instructions, may cause harmful interference to radio
communications. However, there is no guarantee that interference may not occur
in a particular installation. This device complies with part 15 of the FCC rules.
Operation is subject to the following two conditions: (1) this device may not cause
harmful interference, and (2) this device must accept any interference received,
including interference that may cause undesired operation.
Modifications or changes to this equipment not expressly approved by the part
responsible for compliance may render void the user’s authority to operate this
equipment.
– Modular Approval, FCC and IC
FCC ID: X3ZBTMOD3
IC: 8828A-MOD3
In accordance with FCC part 15, the SPT2632C1A.AT2 is listed above as a
modular transmitter device.
– Label instructions:
When integrating the SPBT2632C1A.AT2 into the final product, it must be
ensured that the FCC labeling requirements, as specified below, are satisfied.
Based on the public notice from FCC, the product into which the ST transmitter
module is installed must display a label referring to the enclosed module.
The label should use wording such as the following:
Contains transmitter module
FCC ID: X3ZBTMOD3
IC: 8828A-MOD3
Any similar wording that expresses the same meaning may be used.

8.2 Bluetooth certification

Module with embedded stack and profile has been qualified according to SIG qualification
rules:
– Bluetooth SIG qualified design, QD ID: B019224
– Product type: end product
– TGP version: Core 3.0
– Core spec version: 3.0
– Product descriptions: Bluetooth module, spec V3.0

22/27 DocID022930 Rev 7

SPBT2632C1A Regulatory compliance

8.3 CE certification
Module has been certified according to following certification rules:
– CE Expert opinion: 0447-ARSO00093-r
– Measurements have been performed in accordance with (report available on
request):
– EN 300 328 V 1.8.1 (2012:06) (a)
– EN 301 489-17 V 2.2.1 (2012:09) (b)
– EN 301 489-1 V1.9.2 (2011:09) (c)
– EN60950-1:2006 +A12:2011 (d)
 CE certified:

a. EN 300 328 V 1.8.1 (2012:06): “electromagnetic compatibility and radio spectrum Matters (ERM); Wideband
transmission systems; data transmission equipment operating in the 2.4 GHZ ISM band and using wideband
modulation techniques; harmonized EN covering essential requirements under article 3.2 of the R&TTE
directive”.
b. EN 301 489-17 V 2.2.1 (2012:09): “electromagnetic compatibility and radio spectrum Matters (ERM);
electromagnetic compatibility (EMC) standard for radio equipment and services; part 17: specific condition for
2.4 GHz wideband transmission systems and 5 GHz high performance RLAN equipment”.
c. EN301 489-1 V 1.9.2 (2011 09): “electromagnetic compatibility and radio spectrum Matters (ERM);
electromagnetic compatibility (EMC) standard for radio equipment and services; part 1: Common technical
requirements”.
d. EN60950-1:2006 +A12:20011: “Information technology equipment - safety”.

DocID022930 Rev 7 23/27

27
Traceability SPBT2632C1A

9 Traceability

Each module is unambiguously identified by serial number stored in a 2D data matrix laser
mark on the bottom side of the module itself.
The serial number has the following format:
WW YY D FF NNN
where
WW = week
YY = year
D = product ID family
FF = production panel coordinate identification.
NNN = progressive serial number.
Each module bulk is identified by a bulk ID.
Bulk ID and module 2D data matrix are linked by a reciprocal traceability link.
The module 2D data matrix traces the lot number of any raw material used.

24/27 DocID022930 Rev 7

SPBT2632C1A Ordering information

10 Ordering information

Table 9. Ordering information

Order code Description Packing MOQ

SPBT2632C1A.AT2 Class 1 OEM Bluetooth antenna module JEDEC tray 1020 pcs

DocID022930 Rev 7 25/27

27
Revision history SPBT2632C1A

11 Revision history

Table 10. Document revision history

Date Revision Changes

23-Apr-2012 1 Initial release.

– Document status promoted from preliminary data to production
12-Jun-2012 2 data
– Modified: Figure 1
– Added: notes in Table 6 and 7
07-Aug-2012 3
– Modified: Section 7
29-Oct-2013 4 Added new section: Section 5.8, Section 7.3 and Section 9
12-Jun-2014 5 Updated: Features
01-Apr-2015 6 Corrected typo (W in Ω): 7.6.2: Internal reset circuit on page 20
– Replaced “iAP” with “iAP1” throughout the document.
08-Jun-2016 7 – Removed last three paragraphs from Section 1: Description.
– Minor text edits.

26/27 DocID022930 Rev 7

SPBT2632C1A

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on
ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or
the design of Purchasers’ products.

No license, express or implied, to any intellectual property right is granted by ST herein.

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

© 2016 STMicroelectronics – All rights reserved

DocID022930 Rev 7 27/27

27