IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 53, NO.

2, APRIL 2006 477

Voltage-Source Active Power Filter Based on

Multilevel Converter and Ultracapacitor DC Link
Micah E. Ortúzar, Member, IEEE, Rodrigo E. Carmi, Juan W. Dixon, Senior Member, IEEE,
and Luis Morán, Fellow, IEEE

Abstract—A new topology for active power filters (APF) using All these reasons have created many research works on the
an 81-level converter is analyzed. Each phase of the converter is topic of PWM modulation [2]–[5].
composed of four three-state converters, all of them connected to Multilevel inverters [6]–[8] can work as amplitude modula-
the same capacitor dc link voltage and their output connected in
series through output transformers. The main advantages of this tion and PWM, and this fact makes the outputs of the converter
kind of converter are the negligible harmonic distortion obtained very much cleaner. This way of operation allows having almost
and the very low switching frequency operation. The single-phase perfect currents, and very good voltage waveforms, eliminating
equivalent circuit is analyzed and their governing equations most of the undesirable harmonics. The series connection of
derived. The dc link voltage control, based on manipulating the several bridges allows to work with much higher voltages
converter’s voltage phase, is analyzed together with the circuit’s
characteristics that determine the capability to draw or deliver [1], [9], [10], and the stepped voltage waveforms eliminate the
active and reactive current. Simulation results for this application voltage stress in associated equipment, such as transformers.
are compared with conventional pulsewidth-modulated (PWM) Moreover, the bridges of each converter work at a very low
converters, showing that this filter can compensate load current switching frequency, which allows working with low speed
harmonics, keeping better-quality sinusoidal currents from the semiconductors, and low switching frequency losses [11].
source. The simulated configuration uses a 1-F ultracapacitor in
the dc link, making it possible to store energy and deliver it during The objective of this paper is to show the performance
short voltage dips. This is achieved by applying a modulation advantages of a multilevel converter used as an APF. The filter
control to maintain a stable ac voltage during dc voltage drops. is used to compensate a contaminating load with small power
A prototype of the filter was implemented and tested, and the factor and to feed the load during voltage dips. The results are
obtained current waveforms showed to be as good as expected. compared with conventional PWM modulators working at a
Index Terms—Active filters, multilevel systems. switching frequency of 10 kHz.

I. I NTRODUCTION II. M ULTILEVEL T OPOLOGY A NALYSIS

A multilevel inverter consists basically of an array of power
M ODERN power electronics have contributed a great deal
to the development of new powerful applications and
industrial solutions; but at the same time, these advances have
semiconductors and converters, which produce an output volt-
age of stepped shape by connecting its output terminals to more
increased the harmonic contamination present in line currents, than one different voltage source. The result is a voltage wave-
which ends up distorting the voltage waveforms. Some power form with lower distortion and less voltage stress across the
electronics applications, such as diode power rectifiers, thyris- power semiconductors. Since the first multilevel inverter was
tor converters, and static VAr compensators (SVCs), are clear patented in 1975, many different multilevel inverter topologies
examples. This has encouraged the development of passive and have been introduced and analyzed by different authors. An
active filters, which are intended to block all nonfundamental interesting survey of this kind of device is presented in [12].
current components. Passive filters have many disadvantages, For this particular application, a cascaded H-bridge multi-
such as weight, volume, frequency tuning, and cost, making level inverter has been chosen due to special advantages, such
their implementation sometimes unpractical. On the other hand, as greater number of levels with the same number of semi-
different configurations of pulsewidth-modulated (PWM) in- conductors and lower voltage stress across some of its semi-
verters have been implemented as active power filters (APF) conductor terminals for the same number of output levels [12],
to compensate harmonic currents. Nevertheless, these devices among others.
have shown to produce a series of problems in related equip- The circuits in Fig. 1 show one phase of two alternative
ment when operated at high frequencies [1], such as circulating configurations of this type of multilevel voltage-source inverter.
currents, dielectric stress, overvoltage, and corona discharge. Both configurations are based on the series connection of more
than one H bridge, whose output voltages are scaled in power
Manuscript received November 19, 2004; revised March 22, 2005. Abstract of three, maximizing the number of levels obtainable (3N levels
published on the Internet January 25, 2006. This work was supported by of voltage, where N is the number of bridges in the cascade).
CONICYT under Projects Fondecyt 1020460 and 1050067.
M. E. Ortúzar, R. E. Carmi, and J. W. Dixon are with the Department Then, with only four converters (N = 4), 81 different levels of
of Electrical Engineering, Pontificia Universidad Católica de Chile, Santiago, voltage are obtained: 40 levels of positive values, 40 levels of
Chile (e-mail: jdixon@ing.puc.cl). negative values, and zero [8]. The semiconductors commutate
L. Morán is with the Department of Electrical Engineering, Universidad de
Concepción, Concepción, Chile (e-mail: lmoran@renoir.die.udec.cl). at very low switching frequency, achieving a modulated voltage
Digital Object Identifier 10.1109/TIE.2006.870656 waveform that can be adjusted by changing the commutation

0278-0046/$20.00 © 2006 IEEE

478 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 53, NO. 2, APRIL 2006

Fig. 1. Main components of a four-stage 81-level multiconverter. (a) Individual voltage sources for each module. (b) One single voltage source for all modules,
and series connection via output transformers.

Fig. 2. (a) Shunt APF using PWM techniques. (b) Shunt APF using a multilevel inverter.

angles and/or the dc voltage. Each H bridge can produce three voltage rating. For scaling the output voltage at the ac side, the
different voltage levels: +Vdc, −Vdc, and zero. Topology transformers’ turn ratios are scaled in power of 3, and the one
1) consists of separated dc sources for each module and direct located at the bottom in Fig. 1(b) has the highest voltage ratio
series connection at the ac side; topology 2) uses a single dc (a:27) and works at the lowest switching frequency (equal to the
source for all modules and the series ac connection is interfaced main frequency). The converter connected to this transformer
by scaling transformers. While working as an active filter, is called the Main Converter because it manages most of the
although the converter’s steady state active power is zero, the reactive power. The ratings of the transformers are from bottom
active power of each individual module may be different from (Main Converter) to top: 0.675, 0.225, 0.075, and 0.025 pu.
zero. Therefore, the topology 2) was used because it avoids
the need for isolated energy-balancing devices if capacitors are
III. APF C ONFIGURATION
used as individual dc storage devices. In this case, a single
capacitor for all the three phases is used at the dc link for tempo- Fig. 2(a) shows a typical configuration for a shunt APF using
rary energy storage instead of four floating capacitors for each PWM strategy. The source is feeding a contaminating load,
phase, which represents a great simplification in the design of such as a power rectifier. The APF, connected in parallel, injects
the APF. Besides, all the power transistors operate at the same the harmonic currents to the load and the power system sees a
ORTÚZAR et al.: VOLTAGE-SOURCE APF BASED ON MULTILEVEL CONVERTER AND ULTRACAPACITOR DC LINK 479

amplitude is manipulated, reactive power can be controlled but

no active power control is achieved, as shown in Fig. 4(a). On
the other hand, when both amplitudes are fixed and the angle is
manipulated within small values, then mostly active power flow
is controlled, as shown in Fig. 4(b). These relations will govern
the active power flow behavior and therefore the dc capacitor
charge will be controlled by this means. The error between the
measured voltage of the dc link capacitor and a voltage refer-
ence feeds a PI controller, which manipulates the phase angle
Fig. 3. Single-phase equivalent circuit. between the filter voltage and the source voltage.
In order to characterize precisely this interaction, the equa-
cleaner sinusoidal current waveform. Nevertheless, the PWM tions that represent these geometrical relations are derived.
filter produces significant switching looses and electromagnetic Using the d−q frame shown in Fig. 4(c), we obtain
noise, and its output voltage [also shown in Fig. 2(a)], as well
as its current, has high frequency noise content. Fig. 2(b) shows VFd − VSd = − RI d + XI q (1)
the proposed topology for a shunt APF using the multilevel VFq − VSq = − RI q − XI d (2)
converter described before. It can be seen that the voltage
generated by this filter is quite similar to a sinusoidal waveform. where
The small steps of each level are almost negligible. The contrast
√
between these two technologies is evident. VFd = VF 3 (3)
One of the advantages of the proposed configuration is that
VFq =0 (4)
better current signals are achieved with very low commutation √
frequencies. The multilevel inverter is connected in parallel VSd = VS 3 cos (α) (5)
√
with the contaminating load and is operated as a voltage-source VSq = − VS 3 sin (α). (6)
inverter, modulating a sinusoidal voltage at its terminals. If the
inverter’s output impedance is significantly lower than the line’s The d−q frame used is fixed to VF because in this way the
impedance, then the filter should supply the load’s harmonic active and reactive current expressions (I d and I q ) are referred
currents almost completely. Three four-stage multiconverters, to the load node. The angle α is referred to VS and therefore
like the one shown in Fig. 1(b), are connected to the same the angle shown in Fig. 4(c) is negative. Combining (1)–(6),
capacitor at the dc side and in Y configuration at the ac side. Ca- expressions for I d and I q [in steady state] can be derived
pacitor voltage is simply controlled by manipulating the voltage
√ √ √
phase angle between the filter and the source, thus controlling −RVF 3 + RVS 3 cos (α) − XVS 3 sin (α)
d
the amount of active power flowing to and from the filter. The I = (7)
(R2 + X 2 )
output voltage is practically sinusoidal as shown in Fig. 2(b). √ √ 2 √
Therefore, the filter feeds practically all harmonic currents con- XVF 3 − XVS 3 cos (α) + XR VS 3 sin (α)
Iq =
sumed by the load. (R2 + X 2 )
√
Assuming the filter’s behavior is practically equivalent VS 3 sin (α)
(in steady state) to that of a sinusoidal voltage source, the power − . (8)
R
analysis can be done considering the multilevel inverter as a si-
nusoidal voltage source in parallel with the load. Nevertheless, These equations can be plotted in terms of the relation
the fact that this voltage source cannot deliver active power in X/R to explore the filter’s capability to draw active power
the long term has to be taken into account for control analysis. from the source. Fig. 5 shows plots of I d and I q for different
Fig. 3 shows a single-phase equivalent of the circuit formed by X/R ratios.
the source, the line, the filter, and the contaminating load. The plot for I d shows that the more inductive the line, the
Fig. 4 shows phase diagrams of the source voltage, filter greater the active current that can be drawn from the source by
voltage, and line current for different angles and amplitudes of the filter to be delivered to the load. It should also be observed
the filter’s voltage. The line impedance is considered to have that for every line impedance ratio (X/R) there is an angle at
a predominant inductive component (compared to the resistive which a maximum amount of active current can be drawn. Over
component), as a general assumption. This characteristic will this angle, the active current decreases, and this implies that
determine the filter’s ability to draw active power from the some kind of adaptive control system has to be implemented
source. The line parameters, as it will be shown later, have a in order to adjust the changes in the line. If the derivate of (7)
great influence on the filter’s behavior, a fact that has to be taken equals to zero is solved, the angle at which maximum active
into account in the design of the control system. power is transferred is obtained. This angle is such that tan α =
The interaction between two voltage sources, interfaced by −X/R. In addition, it can be noted that I q is always positive
the line impedance (under steady state), is governed by the when power is drawn from the source (Id > 0), meaning that
geometrical relations between their voltage amplitudes and the the line current is always ahead of the filter’s voltage and
angle between them. This is expressed graphically in Fig. 4(a) therefore cos (φ) is positive in these cases. For these plots, the
and (b). When both voltages are in phase, and the filter’s voltage line impedance was maintained at 0.25 pu.
480 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 53, NO. 2, APRIL 2006

Fig. 4. Phase diagrams of voltages and currents, where ILine = IL . (a) Reactive power control. (b) Active power control. (c) General control.

Fig. 5. Active (Id ) and reactive (Iq ) currents supplied by the source at the filter node.

increase the cost of this method (the ratings of the transformers

IV. S IMULATION R ESULTS
are from bottom to top in Fig. 1(b): 0.675, 0.225, 0.075, and
Fig. 6 compares the current quality obtained with (a) a shunt 0.025 pu). In fact, it is possible that the cost could result lower
APF implemented with a PWM inverter working at 10-kHz than with conventional PWM techniques, because this system
switching frequency and (b) with the four-stage (81-level) uses components that are cheaper for their lower frequency
converter described in this paper. Both figures show the load ratings and simplicity (smaller single-phase units) compared
current (a three-phase diode rectifier), the source current, and with the one required in Fig. 2(a) for PWM–APF.
the filter current. The parameters are the same for both systems: Another capability of this system is to work as a voltage
Vsource = 120 Vff, line impedance ZL = 0.01 + j0.314 Ω, dip proof source. To implement this capability, a capacitor of
rectifier input impedance ZR = 0.1 + j0.157 Ω, rectifier output very high capacity (ultracapacitor) has to be used, and the
dc load RD = 5 Ω plus a smoothing reactor LS = 20 mH. modulation index (m) is manipulated to maintain a nominal
The commutation frequencies for the semiconductors in the voltage at the output. When a voltage dip appears, m is manip-
multilevel inverter are considerably lower than in the PWM ulated to maintain a nominal voltage at the inverter terminals.
inverter. The Main Converter with a voltage ratio transformer In this case, an automatic isolating device would have to be
of a:27 [where “a” represents a voltage ratio used as a reference implemented between the source and the load in order to feed
for all transformers, as described in Fig. 1(b)] commutates at the load from the filter without feeding the rest of the system.
fundamental 50 Hz, and the modules with voltage ratios of a:9, An example of the aforementioned filter was simulated using
a:3, and a:1 commutate at 250, 850, and 2650 Hz, respectively. the software PSIM [13]. The parameters of the system are
Another point of comparison is the cost. As stated in VS (source) = 380 Vff, line impedance ZL = 0.1 + j0.569 Ω,
Section II, lower-order modules take a very small portion of the diode rectifier input impedance ZR = 0.1 + j0.157 Ω, recti-
total reactive power and hence do not contribute to drastically fier output dc voltage VD = 500 V, load RD = 5 Ω plus a
ORTÚZAR et al.: VOLTAGE-SOURCE APF BASED ON MULTILEVEL CONVERTER AND ULTRACAPACITOR DC LINK 481

Fig. 6. APF waveforms. (a) PWM technique. (b) Proposed technique.

Fig. 7. Currents waveforms from simulation. (a) Source current and scaled voltage. (b) Load current. (c) Filter current.

smoothing reactor LS = 40 mH. This represents a dc load of As can be seen in Fig. 7, the source currents are perfectly
approximately 50 kW. sinusoidal and with unity power factor. In addition, the load cur-
A voltage dip is simulated at T = 0.2 s, with a duration of rents are completely fed by the filter during the voltage dip. This
0.4 s. During this period, the load was fed from the filter’s demonstrates that this kind of multiconverter works perfectly as
capacitor and a sinusoidal voltage of nominal amplitude is a voltage dip proof filter, delivering near-sinusoidal voltages.
maintained at the filter’s output. Fig. 8 shows details of voltages and currents during the
Fig. 7 shows a plot of the (a) source voltage (VS ) and current experiment. When the source goes offline, the filter starts
(IS ), (b) load current (IL ), and (c) filter current (IF ) during the delivering all the current consumed by the load.
simulation. The source voltage (scaled) allows appreciating the Fig. 9 shows the (a) source voltage, (b) dc link capacitor
power factor from the source. During the voltage dip (between voltage, and (c) capacitor current. It is clear that when the
T = 0.2 s and T = 0.6 s), there is no current flowing from the source goes offline, the capacitor starts delivering all the active
mains for obvious reasons. power, depressing its voltage. The ultracapacitor voltage drop
482 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 53, NO. 2, APRIL 2006

Fig. 8. Detail of (a) voltages, (b) load currents, and (c) filter current when the fault occurs.

Fig. 9. Detail of (a) source voltage, (b) capacitor current, and (c) capacitor voltage.

represents the energy supplied by the capacitor during the voltage levels at the inverter terminals. The source voltage
voltage dip. After the voltage from the source is reestablished, is 110 V fn, and the dc capacitor voltage reference at the
the control modifies the filter’s voltage angle to inject active APF is set to 146 V to achieve a nominal voltage at the
power to the filter and recover the capacitor’s voltage level. inverter terminals under steady state. The line impedance is
ZL = 1.43 + j4.4 Ω, and rectifier (nonlinear load) output dc
load RD = 27 Ω plus a smoothing reactor LS = 65 mH. The
V. E XPERIMENTAL R ESULTS
equivalent power load is 2.5 kW.
Fig. 10 shows an experimental inverter like the one in Fig. 11 shows a detail of the (a) source voltage VS , (b) source
Fig. 1(b), which was implemented for testing. The transformer current IS , (c) filter current IF , and (d) load current IL . It is
ratios are scaled in power of 3, yielding a total of 81 different easy to see that the source current waveform has almost no
ORTÚZAR et al.: VOLTAGE-SOURCE APF BASED ON MULTILEVEL CONVERTER AND ULTRACAPACITOR DC LINK 483

Fig. 10. Experimental 2.5 kW 81-level prototype.

Fig. 11. Detail of source, filter, and load current (10 A/div), and source voltage (100 V/div).

harmonic content and is practically in phase with the source voltage distortion is generated when the filter has to compensate
voltage while the filter delivers all of the harmonic content. harmonic currents of high di/dt. Therefore, transformers of
The waveforms in Fig. 12 present the transient behavior of low leakage inductance should be used. This distortion and the
the filter. During the connection of a load, the control takes a lagging angle of the filter’s voltage are shown in Fig. 13.
couple of cycles to reach steady state. In case of disconnection,
the time is a little longer because of the arc of the switch being
VI. C ONCLUSION
used to extinguish.
Although this is a voltage-source inverter, small parasitic A four-stage 81-level inverter using three-state “H” convert-
inductors are unavoidably present in series to the inverter ers was analyzed, simulated, and tested for use as an APF.
terminals because of the transformer’s leakage inductances. It has been shown that some of the advantages of this kind
Anyway, this is not at all bad, because it helps filtering the of converter compared with conventional PWM converters are
dv/dt of the small voltage steps of the converter, avoiding lower commutation frequency and better quality of voltage
current peaks if the load has a voltage-source characteristic and current waveforms. Some of the drawbacks are higher
(i.e., capacitors). The drawback of these inductances is that a semiconductor count and extra transformers needed.
484 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 53, NO. 2, APRIL 2006

Fig. 12. Transient response. Capacitor voltage (20 V/div); filter, load, and source currents (10 A/div).

Fig. 13. Filter voltage distortion detail. Source and filter voltages (100 V/div); source and load currents (10 A/div).

A simple control scheme has been used, which consists of capacitor, is used. Even a UPS capability could be implemented
modifying the filter’s voltage angle while maintaining nominal if devices of higher energy storage capacity (such as batteries)
voltage amplitude. This control scheme allows to easily modify are used at the dc link terminals. In such a case, a current
the amount of active power transferred to or from the filter and sensor and some changes to the control system would have to
thus control the dc capacitor voltage. Nevertheless, a control be implemented.
system for this kind of filter would have to incorporate adaptive
features to adapt to changes in the line parameters. R EFERENCES
The proposed filter, compensating a contaminating load, [1] L. M. Tolbert and F. Z. Peng, “Multilevel converters for large electric
was simulated, including a voltage dip during the experiment. drives,” in Proc. APEC, Anaheim, CA, Feb. 15–19, 1998, pp. 530–536.
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signals if the leakage inductances are significative. Mar./Apr. 2001.
[8] J. Dixon and L. Morán, “Multilevel inverter, based on multi-stage con-
The proposed APF can work perfectly as a voltage dip nection of three-level converters, scaled in power of three,” in Proc. IEEE
protection if a relatively high capacitance device, like an ultra- IECON, Sevilla, Spain, Nov. 2002, pp. 886–891, CD-ROM.
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[9] N. P. Schibli, T. Nguyen, and A. C. Rufer, “A three-phase multilevel con- Juan W. Dixon (M’90–SM’95) was born in Santi-
verter for high-power induction motors,” IEEE Trans. Power Electron., ago, Chile. He received the Electrical Engineering
vol. 13, no. 5, pp. 978–986, Sep. 1998. Professional degree from the University of Chile,
[10] M. D. Manjrekar, P. Steimer, and T. A. Lipo, “Hybrid multilevel conver- Santiago, Chile, in 1977, and the M.-Eng. and Ph.D.
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IEEE IAS, 1999, pp. 1520–1527. versity, Montreal, PQ, Canada, in 1986 and 1988,
[11] M. D. Manjrekar and T. A. Lipo, “A hybrid multilevel topology for drive respectively.
applications,” in Proc. APEC, 1998, pp. 523–529. Since 1979, he has been with the Universidad
[12] J. Rodriguez, J. Lai, and F. Z. Peng, “Multilevel inverters: A survey of Católica de Chile, Santiago, Chile, working in the
topologies, controls and applications,” IEEE Trans. Ind. Electron., vol. 49, areas of power electronics, electric traction, elec-
no. 4, pp. 724–736, Aug. 2002. tric power generation, and electrical machines. He
[13] Power Electronics Simulations, User Manual, Vancouver, Canada: Pow- is currently a Professor at the Department of Electrical Engineering. His
ersim Technologies. PSIM Version 4.1. [Online]. Available: http://www. research interests include new technologies for electric vehicles, machine
powersimtech.com drives, frequency changers, high-power rectifiers, multilevel inverters, static
VAr compensators, and active power filters.

Micah E. Ortúzar (S’02–M’04) was born in San-

tiago, Chile. He received the Electrical Engineering
Professional and Ph.D. degrees from Pontificia Uni-
versidad Católica de Chile, Santiago, Chile, in 2001
and 2005, respectively.
Since 2000, he has been working in power Luis Morán (S’79–M’81–SM’94–F’05) was born in
electronics and electric vehicle research projects, Concepción, Chile. He received the degree in electri-
involving active power filters, static converters, ultra- cal engineering from the University of Concepción,
capacitors, and electric machines among others. He Concepción, Chile, in 1982 and the Ph.D. degree
has written and published several papers for IEEE from Concordia University, Montreal, PQ, Canada,
conferences, as principal author and coauthor, and is in 1990.
a coauthor in three papers published in IEEE magazines and transactions. Since 1990, he has been with the Electrical En-
gineering Department, University of Concepción,
where he is a Professor. He has extensive consulting
experience in the mining industry, especially in the
application of medium voltage ac drives, large power
Rodrigo E. Carmi was born in Santiago, Chile. cycloconverter drives for SAG mills, and power quality issues. His main areas
He received the Electrical Engineering Professional of interests are in ac drives, power quality, active power filters, FACTS, and
degree from Pontifica Universidad Católica de Chile, power protection systems.
Santiago, Chile, in 2005. Dr. Morán was the Associate Editor of the IEEE TRANSACTIONS ON
Since 2003, he has been working in active power POWER ELECTRONICS from 1997 to 2001. In 1995, he received the IEEE
filter projects. He has cowritten and published two Outstanding Paper Award from the Industrial Electronics Society for the best
papers for IEEE conferences. paper published in the TRANSACTION ON INDUSTRIAL ELECTRONICS. In
1998, he received the City of Concepción Medal of Honor for achievement in
applied research. He has written and published more than 25 papers on active
power filters and static var compensators in IEEE TRANSACTIONS.