ENGINEERING NOTES

ON
8051
MICROCONTROLLER
(17EC563)

Ver: 1.1
Date: 9th Sept 2019

by
MOHAMED ANEES
Assistant Professor
Department of Electronics & Communication
Jain Institute of Technology, Davangere
 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

TABLE OF CONTENTS

1.0 INTRODUCTION ...................................................................................................................................... 3

1.1 MICROPROCESSOR V/S MICROCONTROLLER ......................................................................................................... 3

1.2 RISC VERSUS CISC INSTRUCTION SET ........................................................................................................ 4
1.3 HARVARD VERSUS VON-NEUMANN ARCHITECTURE ................................................................................ 4

2.0 EMBEDDED SYSTEMS .............................................................................................................................. 5

2.1 DEFINITION OF EMBEDDED SYSTEMS ........................................................................................................... 5
2.2 COMPONENTS OF EMBEDDED SYSTEMS ......................................................................................................... 5
2.3 EMBEDDED MICROCONTROLLER.............................................................................................................. 5
2.4 CHARACTERISTICS OF AN EMBEDDED SYSTEM ......................................................................................... 6

3.0 THE 8051 MICROCONTROLLERS .............................................................................................................. 7

3.1 FEATURES OF 8051 MICROCONTROLLER .................................................................................................. 7

3.2 8051 ARCHITECTURE ................................................................................................................................ 8
3.3 8051 REGISTERS ........................................................................................................................................... 9
3.3.1 Math Registers ................................................................................................................................ 9
3.3.2 Register Banks............................................................................................................................... 10
3.3.3 Stack Pointer (SP) .......................................................................................................................... 10
3.3.4 Program Status Word (PSW) ......................................................................................................... 10
3.3.5 Program Counter (PC) ................................................................................................................... 10
3.3.6 DPTR.............................................................................................................................................. 10
3.4 PIN DESCRIPTION OF 8051 MICROCONTROLLER ........................................................................................... 11
3.5 PROGRAM STATUS WORD (PSW) IN 8051 ......................................................................................................... 12
3.6 INTERNAL MEMORY ORGANIZATION................................................................................................................. 14
3.7 8051 I/O PORTS FUNCTIONS...................................................................................................................... 15

4.0 APPLICATIONS OF MICROCONTROLLERS / EMBEDDED SYSTEMS .......................................................... 16

5.0 EXTERNAL MEMORY INTERFACING ....................................................................................................... 18

5.1 NEED FOR EXTERNAL MEMORY........................................................................................................................ 18

5.2 BASICS OF MEMORY REPRESENTATION ........................................................................................................... 18
5.3 8051 SIGNALS USED FOR EXTERNAL MEMORY INTERFACE .................................................................................... 19
5.3.1 SIGNALS COMMON TO BOTH ROM & RAM .................................................................................................... 19
5.3.2 SIGNALS RELATED TO EXTERNAL ROM / PROGRAM MEMORY ............................................................................ 19
5.3.3 SIGNALS RELATED TO EXTERNAL RAM ACCESS ................................................................................................ 19
5.4 8051 INTERFACING WITH EXTERNAL ROM (PROGRAM MEMORY) .......................................................................... 20
5.5 8051 INTERFACING WITH EXTERNAL RAM (DATA MEMORY)................................................................................ 21
5.6 8051 EXTERNAL MEMORY TIMING .................................................................................................................. 22
5.7 PROBLEMS ................................................................................................................................................. 23
5.7.1 PROBLEM TYPE 1 (SINGLE CHIP MEMORY INTERFACE) .................................................................................... 23
5.7.2 PROBLEM TYPE 2 (MULTIPLE CHIP MEMORY INTERFACE) ................................................................................ 25

NOTE:
In case of any mistakes or typo errors, please inform to mohamed.anees@hotmail.com

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

1.0 INTRODUCTION

1.1 MICROPROCESSOR V/S MICROCONTROLLER

Table 1: Microprocessor V/s Microcontroller

MICROPROCESSORS MICROCONTROLLERS

 A Microcontroller is a programmable
 A Microprocessor is a programmable
integrated device that has computing and
integrated device that has computing and
decision capability. It has on-chip
decision. It doesn’t have any on-chip
peripherals such as RAM, ROM, I/O
peripherals.
ports, Timers, etc.

ROM
ROM RAM
RAM MICROCONTROLLER

CPU
CPU Serial
Serial
CPU RAM ROM
(Microprocessor)
(Microprocessor) Interface
Interface
SERIAL
I/O TIMERS
Timer
Timer I/O
I/O Port
Port PORT

 Since memory and I/O has to be connected  Since memory and I/O are present
externally, the circuit becomes large. internally, the circuit is small.

 Most of the microprocessors use CISC and  Microcontrollers are based on RISC &
Von-Neumann architecture. Harvard architecture.

 Microprocessors have less number of  Microcontrollers have more number of

registers; hence, more operations are registers; hence, the programs are easier
memory based. to write.

 Limited power saving options.  Lot of power saving options.

 Less number of pins are multiplexed  More number of pins are multiplexed

 Designed for general-purpose systems.  Designed for a specific application.

Ex: Desktop Computer Ex. Mobile, Washing Machine

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

1.2 RISC VERSUS CISC INSTRUCTION SET

Table 2: RISC v/s CISC Instruction Set
RISC CISC
1) RISC stands for Reduced instruction set. 1) CISC stands for Complex instruction set.
2) Lesser number of instructions. 2) Large number of instructions.
3) Orthogonal instruction set (allows each 3) Non-orthogonal instruction set (All
instruction to operate on any register and use instructions are not allowed to operate on
any addressing mode) any register and use any addressing mode)
4) Operations are performed on registers only. 4) Operations are performed on both registers
Memory operations are done using LOAD and and memory depending on the type of
STORE instructions. instruction.
5) A large number of registers are available. 5) Limited number of general purpose registers
6) Single, fixed length instructions 6) Variable length instructions
7) Can be Harvard or Von-Neumann
7) With Harvard Architecture
Architecture
8) Emphasis is on hardware 8) Emphasis is on software
9) Instruction take one or two cycles 9) Instructions take multiple cycles
10) Few addressing modes. Most instructions
10) Many addressing modes
have register to register addressing mode.

1.3 HARVARD VERSUS VON-NEUMANN ARCHITECTURE

Table 3: Harvard v/s Von-Neumann Architecture
Harvard Architecture Von Neumann Architecture
 Uses two separate memory spaces for program  Uses single memory space for program
instructions and data. instructions and data.
 Two sets of address/data buses between CPU  A single set of address/data buses between
and Memory. CPU and Memory.
Address Address Address
12 bits 10 bits 10 bits PROGRAM
PROGRAM
PROGRAM
PROGRAM DATA
DATA
&&
CPU
CPU CPU
CPU DATA
DATA
MEMORY
MEMORY MEMORY
MEMORY
Data
MEMORY
MEMORY
Program Data
14 bits 8 bits 8 bits

 Easier to pipeline, hence high performance  Low performance compared to Harvard

can be achieved. architecture.
 Since data memory and program memory are
 Since data memory and program memory are
stored physically in the same chip, there are
physically separate, no chances for accidental
chances of accidental corruption of program
corruption of program memory.
memory.
 Comparatively high cost  Cheaper
 Example: Intel 8051 Microcontroller  Example: Motorola 68HC11

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

2.0 EMBEDDED SYSTEMS

2.1 DEFINITION OF EMBEDDED SYSTEMS

“An Embedded System is combination of hardware and software (firmware) as well as
other components designed for a specific set of applications expected to function without
human intervention. It can be an independent system or part of a larger system”.
Examples: Mobile Phone, ATM, Washing Machine, Medical Equipment’s, Digital
Camera, Xerox Machine, Digital Oscilloscope etc.

2.2 COMPONENTS OF EMBEDDED SYSTEMS

An Embedded System has three main components embedded into it:
(a) Embedded Hardware
Embedded System has hardware similar to a computer. The hardware includes
embedded processor/controller, memory, peripherals, sensors and input-output
devices.
(b) Embedded Software (Firmware)
The software/firmware usually embeds in the ROM/Flash memory.
(c) RTOS (Real Time Operating System)
The RTOS supervises the application software and controls the access to system
resources.
2.3 EMBEDDED MICROCONTROLLER
 An Embedded Microcontroller has all the necessary hardware and software
modules in a single IC. Hence, no external interface circuit is required.
 An Embedded Microcontroller has on-chip peripherals such as RAM, ROM, I/O
Ports, Timers, and Serial Port etc. Typical clock diagram of an embedded
microcontroller is as shown below.
MICROCONTROLLER

CPU RAM ROM ADC

SERIAL I/O
CLOCK TIMERS
PORT PORTS

Fig: Block diagram of Embedded Microcontroller

 An Embedded Microcontroller is used in the design because of following
characteristics:
o All the necessary modules are available on a single IC.
o Ready availability of Integrated Development Environment (IDE) helps
in fast development of the system.
o Ready availability of processor specific APIs.

 For example, a mobile phone has an embedded Microcontroller.

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

2.4 CHARACTERISTICS OF AN EMBEDDED SYSTEM

The characteristics of a typical embedded system are as follows:
1) Dedicated Systems (Application and domain specific)
 Embedded systems are designed to work only for specific functionality. They
cannot be used for any other purpose.
 The hardware and software is designed to meet the predefined functionality.

2) Reactive and Real Time

 Embedded systems produce changes in output in response to the changes in the
input. Hence they are generally referred as Reactive Systems.
 Real Time System operation means
o Must finish operations by deadline.
o Not all Embedded Systems are real time in operation.

3) Operates in harsh environments

4) Distributed
 The term distributed means that embedded system may be a part of larger
systems. Many numbers of such distributed systems form a single large
embedded control unit.

5) Small size and weight

 Embedded System designed should have aesthetic look. Most of the application
demands small sized and low weight products.

6) Power concerns
 Battery operated embedded systems are expected to consume minimal power.
 Embedded systems working on live power should not consume much power.

7) Memory
 Embedded Systems are expected to work with restricted memory. Hence the
application should be written considering all optimal techniques.

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

3.0 THE 8051 MICROCONTROLLERS

3.1 FEATURES OF 8051 MICROCONTROLLER

 8-bit CPU with registers A (the accumulator) and B
 16-bit program counter (PC) and the data pointer (DPTR)
 8-bit program status word (PSW)
 8-bit stack pointer (SP)
 4KB of on-chip ROM (8051)
 128 bytes of on-chip RAM
o Four register banks, each containing eight registers (R0 – R7)
o Sixteen bytes, which are bit addressable
o Eighty bytes of general purpose data memory
 32 input/output pins arranged as four 8-bit ports: P0 – P3
 Two 16-bit timers / counters: T0 and T1
 Full duplex UART
 On-chip clock oscillator
 Two external and three internal interrupts
 64K Program Memory address space
 64K Data Memory address space

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

3.2 8051 ARCHITECTURE

P0.0 P0.7 P2.0 P2.7
………….. …………..
POR POR
T0 T2

RAM RA PORT POR ROM

ADDR M 0 T2 (FLA
8 PROG
RAM
ADDR
RE RE T T STAC BUFF
G G M M K ER
16
ALU INTERR 8 PC
UPT
TIMIN SERIAL
Instruct

PSEN PS
G&
ion

ALE
CONT
EA
ROL DPTR
RST

OSCILLAT PORT PORT

OR 1 3

PORT PORT
1
………….. 3
…………..
P2.0 P2.7 P3.0 P3.7
Figure 1: 8051 Architecture

Arithmetic & Logic Unit (ALU)

The ALU performs the arithmetic and logical operations. In ALU operations, one of the
operands is in ‘A’ register. The ALU operation affects various flags in PSW register.

The 8051 Oscillator and Clock

The 8051 has inbuilt clock circuitry that generates that clock pulses. The crystal
frequency is the basic internal clock frequency of the microcontroller.

Instruction Register, Instruction Decoder and Control

The code bytes from the program memory are fetched and placed in the Instruction
Register (IR). The Instruction Decoder decodes the instruction. The timing generation
& control synchronizes all the microcontroller operations with the clock and generates
necessary control signals.

Program Counter (PC) & Data Pointer (DPTR)

 Program Counter is a 16-bit register that holds the address of current instruction.
 DPTR is a 16-bit register used to access external memory.

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

A and B CPU Registers

 Registers A & B are 8-bit registers and used mainly in ALU operations.
 B register is used with A register for multiplication and division operations.

Program Status Word (PSW)

 The PSW is an 8-bit register. It is also referred to as flag register.
 Four of the flags are conditional flags which are used to indicate status of a result.
They are CY (Carry), AC (Auxiliary carry), P (Parity) and OV (Overflow).
 RS0 and RS1 are used to change the bank registers.

Internal RAM
8051 has 128 bytes of internal RAM organized into three areas.
 32 working registers organized as four banks. Each bank has eight registers named
R0 to R7.
 16 bytes of bit addressable area.
 General Purpose RAM (30h to 7Fh).

Internal ROM
 8051 has 4K of internal ROM addressable as bytes from 0000h to 0FFFh.
 The PC is used to address the code bytes.

Stack and Stack Pointer

 The stack is a section of RAM used by the CPU to store information temporarily.
 The register used to access the stack is called the stack pointer (SP).

Special Function Registers (SFRs)

Some of the SFRs are Reg. A, Reg. B, P0 – P3, SP, PSW, PC and DPTR.

I/O Ports (P0, P1, P2 and P3)

 8051 has four inbuilt ports namely PORT 0, PORT 1, PORT 2 and PORT 3.
 All the ports are 8 bits wide and bidirectional. All the ports are bit addressable.

Timers
 The 8051 has two times/counters namely Timer 0 and Timer 1.
 They can be used either as timers to generate a time delay or as counters to count
events.

Serial Data Input / Output

 The 8051 has on-chip UART for serial communication with the external world.
 There are two pins dedicated for this purpose. One for transmission (TxD) and
one for reception (RxD).

3.3 8051 REGISTERS

3.3.1 MATH REGISTERS
Accumulator (Reg. A)

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 It is an 8-bit register and has address E0.

 It is mainly used in ALU operations. It holds results of many instructions
particularly math and logical operations

Register B
 It’s an 8-bit register and has address F0.
 Reg. B is used with Reg. A for multiplication and division operations.

3.3.2 REGISTER BANKS

 32 bytes of Internal RAM (00H – 7FH) are set aside for Register Banks.
 There are four register banks. Each bank consists of eight registers (R0 – R7).
 The registers can be addressed by its name (R0 – R7) or RAM address.
 Bits RS0 and RS1 of PSW register determine which bank is currently in use.
 Default register bank is bank 0.

3.3.3 STACK POINTER (SP)

 The register used to access the stack is called the stack pointer (SP).
 The SP in the 8051 is 8 bits wide which means it can take values of 00 to FFh.
 When 8051 is powered up, the SP register contains value 07H.

3.3.4 PROGRAM STATUS WORD (PSW)

The PSW is an 8-bit register. It is also referred to as flag register. Four of the flags are
conditional flags which are used to indicate status of a result. They are CY (Carry), AC
(Auxiliary carry), P (Parity) and OV (Overflow). RS0 and RS1 are used to change the
bank registers.

3.3.5 PROGRAM COUNTER (PC)

 PC is a 16-bit register and is not accessible to user.
 PC is used to hold the address of current instruction.

3.3.6 DPTR
 DPTR is a 16-bit register.
 The DPTR is made up of two 8-bit registers, namely DPH and DPL, which are used
to provide memory addresses for internal and external code access and external
data access

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

3.4 PIN DESCRIPTION OF 8051 MICROCONTROLLER

Figure shows the pin diagram of 8051 microcontroller. The 8051 microcontroller has 40
pins.

Figure: 8051 Pin Diagram (DIP Package)

VCC & GND

Pin 40 provides supply voltage to the chip. The voltage source is +5V. Pin 20 is the ground
pin.

XTAL1 and XTAL2

The 8051 has an on-chip oscillator but requires an external clock to run it. A quartz crystal is
connected to input XTAL1 and XTAL2.

RST (RESET INPUT)

An active high on this pin for two machine cycles resets the device. The reset causes all values
in the registers to be lost. It will set program counter to all 0000H.

̅̅̅̅
𝐄𝐀
 This pin is used to access external program memory (ROM).
 If ̅̅̅̅
𝐄𝐀 = 1, it selects internal program memory (000h to FFFh). Beyond this address it
selects external program memory.
 If ̅̅̅̅
𝐄𝐀 =0, it selects only external program memory (ROM).

̅̅̅̅̅̅̅̅
𝐏𝐒𝐄𝐍
̅̅̅̅̅̅̅ stands for “program store enable”. It remains low while fetching external program
PSEN
memory. During the internal program execution, the condition of this pin is high.

ALE (Address Latch Enable)

 When connecting to external memory, port 0 provides both address and data. ALE pin
is used for demultiplexing the address and data.
 When ALE = 0, it provides data D0 – D7
 When ALE = 1 it has address A0 – A7.

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

I/O PORTS
 8051 has four I/O ports namely P0, P1, P2 & P3. Each port has eight input/output pins.
All the ports are bit addressable.
 PORT 0 is multiplexed with lower order address lines and data lines.
 PORT 2 is multiplexed with higher order address lines.
 PORT 3 is multiplexed with alternate functions.
 PORT 1 is the only port which is not multiplexed.

3.5 PROGRAM STATUS WORD (PSW) IN 8051

CY AC - RS1 RS0 OV - P

The program status word (PSW) register is an 8-bit register. It is also referred to as flag
register. PSW is bit addressable as PSW.0 to PSW.7

CY (Carry Flag)
The carry flag is affected by arithmetic & logical instructions.
If there is a carry from MSB bit, the CY bit is set; otherwise, it is cleared.

AC (Auxiliary Carry Flag)

This flag is used by instructions that perform BCD arithmetic.
If there is a carry from bit D3 to D4, the AC bit is set; otherwise, it is cleared.

OV (Overflow Flag)
Overflow occurs when the result of an arithmetical operation on signed operations is too
large and cannot be stored in one register.

P (Parity Flag)
The parity flag reflects the number of 1s in the accumulator (Reg. A) Only.
Reg. A Description Parity Flag Parity Type
A = 03H
Reg. A contains even number of 1s 0 Even
(00000011)
A = 01H
Reg. A contains odd number of 1s 1 Odd
(00000001)

RS0 & RS1 (Register bank select bits)

RS1 RS0 Internal Ram
Register Bank
(PSW.4) (PSW.3) Address
0 0 Bank 0 00h to 07h
0 1 Bank 1 08h to 0Fh
1 0 Bank 2 10h to 17h
1 1 Bank 3 18h to 1Fh

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3.6 INTERNAL MEMORY ORGANIZATION

Figure shows internal RAM organization of 8051 Microcontroller.

Figure: Internal RAM Organization of 8051

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The internal RAM of 8051 is organized into three distinct areas:

a) Four Register Banks (00h – 1Fh)

 Each bank consists of eight registers (R0 – R7).
 The registers can be addressed by its name or RAM address.
 Bits RS0 and RS1 of PSW register determine which bank is currently in use.
 Default register bank is bank 0.

b) 16 Bytes of Bit Addressable Area(20h – 2Fh)

 This area is also byte addressable.
 Each bit in this area can be addressed by its bit address 00h – 7Fh.

c) 80 Bytes of General Purpose RAM (30h – 7Fh)

These 80 locations of RAM are widely used for the purpose of storing data and
parameters of 8051 Microcontroller.

3.7 8051 I/O PORTS FUNCTIONS

PORT 0 (P0)
 PORT 0 has 8 I/O pins multiplexed with address and data lines. It is bidirectional
port means, it can be programmed both as input and output pin.
 Port 0 is addressed with address 80H.
 The pins of PORT 0 must be connected externally to a 10K ohm pull-up resistor
because PORT 0 is open drain.
 When connecting an 8051 to an external memory, PORT 0 provides both address
and data. The 8051 multiplexes address and data through PORT 0 to save pins.

PORT 1
 PORT 1 has 8 I/O pins. It is the only port, which is not multiplexed.
 Port 1 is addressed with address 90H.
 It is bidirectional port means, it can be programmed both as input and output pin.
When 1 is written to the PORT 1 latch, it acts as input. When 0 is written to the
PORT 1 latch, it acts as output.

PORT 2
 PORT 2 has 8 I/O pins. It is multiplexed with higher order address lines.
 Port 2 is addressed with address A0H.
 It is bidirectional port means, it can be programmed both as input and output pin.
When 1 is written to the PORT 2 latch, it acts as input. When 0 is written to the
PORT 2 latch, it acts as output.

PORT 3

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 PORT 3 has 8 I/O pins. It is multiplexed port with alternate functions

 Port 2 is addressed with address B0H.
 It is bidirectional port means, it can be programmed both as input and output pin.
When 1 is written to the PORT 3 latch, it acts as input. When 0 is written to the
PORT 3 latch, it acts as output.
 The alternate functions of PORT 3 are shown in the below table.

P3 Bit Function Pin

P3.0 RxD 10
P3.1 TxD 11
P3.2 INT0\ 12
P3.3 INT1\ 13
P3.4 T0 14
P3.5 T1 15
P3.6 WR\ 16
P3.7 RD\ 17

4.0 APPLICATIONS OF MICROCONTROLLERS / EMBEDDED

SYSTEMS
Microcontrollers have very diversified applications. Microcontrollers are the heart of any
Embedded System Design. Some of the applications areas are listed below.

Consumer Appliances
o Digital Camera, DVD player, Electronic Toys, Remote Controls etc.

Home Appliances
o Refrigerators, Vacuum cleaners, washing machine, Microwave oven etc.

Office Automation
o Xerox machine, Fax machine, Modem, Printer, Scanner etc.

Industrial Automation
o Monitoring of temperature, pressure, humidity, voltage, current etc.

Medical Electronics
o ECG, EEG, X-Ray machines, Dialysis unit etc.

Computer Networking
o Bridges, Routers, Integrated Services Digital Networks (ISDN) etc.

Wireless Technologies
o Mobile phones, PDAs, palmtops etc.

Automotive Industry

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o Motor control system, car multimedia, engine/body safety, Automatic

parking, automatic braking system etc.

Smart Cards
o Banking, Security, Telephone etc.

Telecommunication
o Mobile computing, Mobile access etc.

Missiles and Satellites

o Defense, Aerospace and Communication.

Instrumentation
o Digital Oscilloscope, Logic Analyzer, Spectrum Analyzer etc.

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

5.0 EXTERNAL MEMORY INTERFACING

5.1 NEED FOR EXTERNAL MEMORY
The 8051 has fixed amount of internal RAM and ROM. The 8051 has 128 bytes of RAM
and 4K bytes of ROM. In many applications, the on-chip RAM and ROM is not
sufficient. Hence external memory is interfaced with 8051. The size of external memory
depends upon the application requirement.

5.2 BASICS OF MEMORY REPRESENTATION

 A memory chip contains 2n location, where n is the number of address pins.

 Each location contains m bits, where y is the number of data pins on the chip.

 The entire chip will contain 2n x m bits.

Example 1: A given memory chip has 12 address pins and 4 data pins. Find:
(a) The organization, and (b) the capacity.

Solution:
(a) This memory chip has 4096 locations (212 = 4096)

Each location can hold 4 bits of data.

This gives an organization of 4096 × 4, often represented as 4K × 4.

(b) Since there are total of 4K locations and each location can hold 4 bits of data. Hence
Capacity = (4K x 4) = 16 K bits.

Example 2: A 512K memory chip has 8 pins for data. Find:

(a) The organization, and
(b) The number of address pins for this memory chip.
Solution:
(a) A memory chip with 8 data pins means that each location within the chip can hold 8
bits of data. To find the number of locations within this memory chip, divide the
capacity by the number of data pins.

512K/8 = 64K;

Therefore, the organization for this memory chip is 64K × 8

(b) The chip has 16 address lines since 216 = 64K

The 8051 microcontroller has 128 bytes of on-chip RAM and 4KB of on-chip ROM.
When the on-chip memory is insufficient, we go for external memory. Since 8051 has
16 bit address lines, we can access up to 64K of address space.

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

5.3 8051 SIGNALS USED FOR EXTERNAL MEMORY INTERFACE

5.3.1 SIGNALS COMMON TO BOTH ROM & RAM
1) PORT 0 & PORT 2
 P0 and P2 provide 16-bit address to access external memory.
 P0 provides the lower 8-bit address and data (AD0 – AD7).
 P2 provides the upper 8-bit address (A8 – A15).

2) ALE PIN
 The ALE pin of 8051 along with 74LS373 latch is used to demultiplex the address
and data lines AD0 – AD7.
 The address A0 – A7 is latched on a positive pulse of ALE pin.

3) 𝐂𝐒
 CS stands for chip select. In most of the ICs it is an active low signal.
 To enable the chip (RAM / ROM), this signal should be active low.

5.3.2 SIGNALS RELATED TO EXTERNAL ROM / PROGRAM MEMORY

1) 𝐄𝐀
 EA stands for external access. It is used to access EXTERNAL ROM.
 When EA is connected to ground, 8051 fetches instructions from external
ROM by using PSEN.

2) 𝐏𝐒𝐄𝐍
 PSEN stands for “program store enable”.
 Program store signal is an output control signal. It remains low while
fetching external program memory.
 During the internal program execution, the condition of this pin is high.

5.3.3 SIGNALS RELATED TO EXTERNAL RAM ACCESS

1) 𝐑𝐃 : It is an active low signal. It is used for reading from external data memory.
2) 𝐖𝐑 : It is an active low signal. It is used for writing to external data memory.
The below figure shows 8051 signals used for external memory interfacing.

Fig: 8051 signals for external memory interfacing

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Dept. of E&CE
 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

5.4 8051 INTERFACING WITH EXTERNAL ROM (PROGRAM MEMORY)

Fig: 8051 Interfacing with External Program Memory / ROM

 P0 and P2 provide 16-bit address to access external memory. P0 provides the lower 8-bit
address and data (AD0 – AD7). P2 provides the upper 8-bit address (A8 – A15). Depending
upon the size, the program memory will need address line A0 – An as input. For example
for a ROM of size (8K x 8), the numbers of address lines required are 13 (A0 – A12).

 Normally the chip select is derived from the unused address lines.

 The demultiplexer octal latch (74LS373) is used to generate the lower address signals (A0
– A7). The ALE pin of 8051 along with 74LS373 latch is used to demultiplex the address
and data lines AD0 – AD7.

 Data lines from program memory are directly connected with AD0 – AD7 pins of the
processor.

 𝐏𝐒𝐄𝐍 signal from the 8051 is directly connected to the read input (𝐑𝐃) of program
memory. In some of the program memory, the read signal is designated as OUTPUT
ENABLE (𝐎𝐄).

 When 𝐄𝐀 is connected to ground, 8051 fetches instructions from external ROM by using
𝐏𝐒𝐄𝐍.

 The instruction MOVC A, @A+DPTR is used to read the byte from program memory.

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Dept. of E&CE
 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

5.5 8051 INTERFACING WITH EXTERNAL RAM (DATA MEMORY)

Fig: 8051 Interfacing with external RAM

 P0 and P2 provide 16 bit address to access external memory. P0 provides the lower 8-bit
address and data (AD0 – AD7). P2 provides the upper 8-bit address (A8 – A15). Depending
upon the size, the program memory will need address line A0 – An as input. For example
for a RAM of size (4K x 8), the numbers of address lines required are 12 (A0 – A11).

 Normally the chip select is derived from the unused address lines.

 The demultiplexer octal latch (74LS373) is used to generate the lower address signals (A0
– A7). The ALE pin of 8051 along with 74LS373 latch is used to demultiplex the address
and data lines AD0 – AD7.

 Data lines from program memory are directly connected with AD0 – AD7 pins of the
processor.

 𝐑𝐃 and 𝐖𝐑 signals from data memory are directly connected to 𝐑𝐃 and 𝐖𝐑 signals of
8051.

 𝐑𝐃 is an active low signal. It is used for reading from external data memory.

 𝐖𝐑 is an active low signal. It is used for writing to external data memory.

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Dept. of E&CE
 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

5.6 8051 EXTERNAL MEMORY TIMING

Fig: 8051 External Memory Timings

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

5.7 PROBLEMS Read question carefully. It

is RAM not ROM.
5.7.1 PROBLEM TYPE 1 (SINGLE CHIP MEMORY INTERFACE)

1) Show the neat schematic interface 8K External Data memory to 8051.

[Jun 09, 6M]
Solution:

For 8K memory the number of address lines required

K = log2 N Note: 1K = 1024 not
= log2 8K 1000
= log2 (8 x 1024)
= log2 8192
= 13 Address Lines (A0 – A12)

Since we need to interface only one chip, the unused address lines can be used as
port pins.
Since we are not using external ROM,
this pin is connected to Vcc.

For 8K memory, we need only

A0 – A12 address lines. Hence A13,
A14, A15 are not connected. ̅̅̅̅ is grounded?
Why 𝐂𝐒
We are interfacing only one chip.
Hence it is always enabled by
connecting to ground.

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Dept. of E&CE
 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

2) Show the interfacing diagram of 8051 with 16K program memory.

Solution:
For 16K memory the number of address lines required
K = log2 N Read question carefully. You
= log2 16K need to interface ROM not
= log2 (16 x 1024) RAM
= log2 16384
= 14 Address Lines (A0 – A13)

Since we need to interface only one chip, the unused address lines can be used as port
pins.

For 16K memory, we need only

A0 – A13 address lines. Hence A14,
A15 are not connected.

Why 𝐂𝐒̅̅̅̅ is grounded?

We are interfacing only one
chip. Hence it is always enabled
by connecting to ground.

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Dept. of E&CE
 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

5.7.2 PROBLEM TYPE 2 (MULTIPLE CHIP MEMORY INTERFACE)

In this type of problem, the unused address lines of 8051 microcontroller are used to
select the chip select. An external logic circuitry like decoder is needed for chip selection.

1) Show the neat schematic of interface of external 8K ROM and 16K RAM to 8051.
[June 12, 08M]
Solution:

Memory No. of address lines Used Address Unused Address

Size
Type K = log2 N Lines Lines
K = log2 (8x1024)
ROM 8K A0 – A12 A13, A14, A15
= 13
K = log2 (16x1024)
RAM 16K A0 – A13 A14, A15
= 14

The decoding logic should be designed in such a way that only one chip is selected at a
time.

Step by step procedure is shown only for

understanding purpose. You can directly write
step 3 in the examination.

STEP 1:
a) Connect the lower order address lines and data lines via latch.

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Dept. of E&CE
 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

b) Connect PSEN of 8051 to OE of ROM

c) Connect RD & WR of 8051 to RD & WR of RAM.

CS CS
ALE
CLK
PORT 0 A0 – A7
A0 – A7
AD0 – AD7
74LS373 ROM RAM
LATCH 16K x 8
8K x 8
D0 – D7 D0 – D7 D0 – D7 D0 – D7
8051

PSEN OE
RD RD
EA WR WR

STEP 2: Connecting the higher order lines

a) This connection depends from problem to problem.
b) The addresses A8 – A12 are common to both ROM and RAM. Hence, they are connected
via common address line.
c) Since RAM is 16K, it needs 14 address lines. Hence A13 is connected separately to
RAM.

CS CS
ALE
CLK
PORT 0 A0 – A7
A0 – A7
AD0 – AD7
74LS373 ROM RAM
LATCH 16K x 8
8K x 8
D0 – D7 D0 – D7 D0 – D7 D0 – D7
8051
P2.5
A13
(A13)
PORT 2 A8 – A12
A8 – A12 A8 – A12 A8 – A12
A8 – A12
PSEN OE
RD RD
EA WR WR

𝐸𝐴 is grounded

STEP 3: Configuring the chip select lines.

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 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

Refer the memory address table. The decoding logic is as below.

When
A15 = 0, A14 = 0 and A13 = 1 - ROM is selected

A15 = 1 and A14 = 0 - RAM is selected

A15 A15
P2.7 P2.7
A14
P2.6 A14
A13 P2.6
P2.5

CS CS
ALE
CLK
PORT 0 A0 – A7
A0 – A7
AD0 – AD7
74LS373 ROM RAM
LATCH 16K x 8
8K x 8
D0 – D7 D0 – D7 D0 – D7 D0 – D7
8051
P2.5
A13
(A13)
PORT 2 A8 – A12
A8 – A12 A8 – A12 A8 – A12
A8 – A12
PSEN OE
RD RD
EA WR WR

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Dept. of E&CE
 ENGINEERING NOTES – 8051 MICROCONTROLLER (17EC563)

2) Interface 8051 with external 4K ROM and 8K RAM.

Solution:

Memory No. of address lines Used Address Unused Address

Size
Type K = log2 N Lines Lines
K = log2 (4x1024)
ROM 4K A0 – A11 A12, A13, A14, A15
= 12
K = log2 (8x1024)
RAM 8K A0 – A12 A13, A14, A15
= 13

A15
P2.7
A14 A15
P2.6 P2.7
A12 A14
P2.4 P2.6
A13
P2.3 A13 P2.5

CS CS
ALE
CLK
PORT 0 A0 – A7
A0 – A7
AD0 – AD7
74LS373 ROM RAM
LATCH 8K x 8
4K x 8
D0 – D7 D0 – D7 D0 – D7 D0 – D7
8051
P2.4
A12
(A12)
PORT 2
A8 – A11 A8 – A11 A8 – A11 A8 – A11
A8 – A11
PSEN OE
RD RD
EA WR WR

Note:
The decoding logic is not fixed. You can have your own decoding logic but make sure
that only one chip select is enabled.

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Dept. of E&CE