Week3

1.
H3P1: A LOGIC FAMILY
(9 points possible)

For many purposes of gate design, we can model a MOSFET used as a
switch simply as as an ideal switch and an "on-state resistor" RON.
This is the SR model.
Assuming this model for the MOSFET, consider the inverter in the
figure. This inverter is intended to be used as an element in a logic
family with NAND and NOR gates.
The static discipline required for this family is:
VS=5.0V, VOH=4.5V, VIH=4.0V, VIL=1.5V, VOL=1.0V.
What is the low noise margin (in Volts)?

What is the high noise margin (in Volts)?
What is the width of the forbidden region (in Volts)?
Suppose that the threshold voltage for the MOSFET is VT=2.0V

and RON=7000.0Ω.
What is the minimum value of the pullup resistor RPuI (in Ohms) for

which this inverter can obey the required static discipline?
Now, consider the NAND gate of this family. What is the minimum
value of the pullup resistor RPuA (in Ohms) for which this inverter
can obey the required static discipline?
How about the NOR gate of this family. What is the minimum value of
the pullup resistor RPuO (in Ohms) for which this inverter can obey
the required static discipline?
Assume that we implemented this family with the minimum pullup

resistors that you have already calculated.
What is the maximum power (in Watts) consumed by the inverter?
What is the maximum power (in Watts) consumed by the NAND?
What is the maximum power (in Watts) consumed by the NOR?
2. H3P2: GRAPHICAL INVERTER MODEL

(7 points possible)
A calculator uses digital logic to perform math functions, but a
calculator was malfunctioning and not adding correctly. After much
debugging, we discovered there was an inverter that had been
malfunctioning. To fix the calculator we need to replace the inverter
with a new one. We can draw our calculator as the system shown in
Figure 1, where Network A has an output that is the input to our
inverter and the output of the inverter is the input to Network B.
Figure 1 shows the relevant static disciplines for Networks A and B.

Figure 2 shows the graphical models for three inverters.
Which one will ensure we invert correctly according to the static
discplines of the two networks? Enter the letter label of the correct
inverter.
Give the minimum value of VIL (in Volts) for the inverter to ensure
correct operation.
Give the maximum value of VIH (in Volts) for the inverter to ensure
correct operation.
Give the maximum value of VOL (in Volts) for the inverter to ensure
correct operation.
Give the minimum value of VOH (in Volts) for the inverter to ensure
correct operation.
What is the high noise margin, NMH (in Volts), from the minimum
and maximum values that you obtained?
What is the low noise margin, NML (in Volts), from the minimum

and maximum values that you obtained?
3. H3P3
(4 points possible)

A nonlinear device Z has the i-v relationship shown below.
This device is used in the circuit shown below, where "I" is the value
of the current source.
Assuming that I=10A, what is the value of the voltage vo (in Volts)?
Now assuming that I=−3A, what is the value of the voltage vo (in

Volts)?
Finally, for the last two parts assume that I=1A.

What is the value of the voltage vo (in Volts)?
What is the value of the voltage v1 (in Volts)?

4. H3P4: DIODE LIMITER
(4 points possible)

In the circuit shown there are two ideal diodes, two resistors, two DC
voltage sources, and an AC voltage source.
The resistors both have the resistance R=5.6kΩ. The voltage of the

DC sources is V1=3.25V and V2=3.0V.
An ideal diode has the characteristic shown:
The AC voltage source puts out a symmetrical triangle wave that

looks like:
The peak voltage of this waveform is 7.5V.
What is the maximum positive voltage (in Volts) that can appear
at v?
What is the minimum (negative) voltage (in Volts) that can appear
at v?
What is the maximum current (in Amperes) that can go through

diode D1?
What is the maximum current (in Amperes) that can go through

diode D2?
 Previous
 Next

Week3

Uploaded by

Copyright:

Available Formats

Week3

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Week3

Uploaded by

Copyright:

Available Formats

1.

H3P1: A LOGIC FAMILY

(9 points possible)

The static discipline required for this family is:

What is the low noise margin (in Volts)?

What is the width of the forbidden region (in Volts)?

Suppose that the threshold voltage for the MOSFET is VT=2.0V

What is the minimum value of the pullup resistor RPuI (in Ohms) for

Assume that we implemented this family with the minimum pullup

What is the maximum power (in Watts) consumed by the inverter?

What is the maximum power (in Watts) consumed by the NAND?

What is the maximum power (in Watts) consumed by the NOR?

2. H3P2: GRAPHICAL INVERTER MODEL

Figure 1 shows the relevant static disciplines for Networks A and B.

What is the low noise margin, NML (in Volts), from the minimum

(4 points possible)

Assuming that I=10A, what is the value of the voltage vo (in Volts)?

Now assuming that I=−3A, what is the value of the voltage vo (in

Finally, for the last two parts assume that I=1A.

What is the value of the voltage v1 (in Volts)?

(4 points possible)

The resistors both have the resistance R=5.6kΩ. The voltage of the

An ideal diode has the characteristic shown:

The AC voltage source puts out a symmetrical triangle wave that

What is the maximum current (in Amperes) that can go through

What is the maximum current (in Amperes) that can go through

You might also like