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    Asst. Lect. Hussein Ali Asst. Lect. Saif Ali: CC CQ CEQ CO E CC

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    This document is an exam for a second year Electrical Engineering class on Electronics I. It contains 5 questions covering various electronics concepts: 1) BJTs are current controlled devices while FETs are voltage controlled, explained with diagrams. A BJT voltage divider circuit is also designed. 2) Determine values for RB and RE given network parameters in Fig. 1. 3) Determine various network parameters for the circuit shown in Fig. 2. 4) Use a graphical approach to determine voltages and currents for the network in Fig. 3. 5) Derive network parameters for an n-channel JFET self-bias circuit and design a JFET fixed-bias amplifier meeting given specifications.

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    Asst. Lect. Hussein Ali Asst. Lect. Saif Ali: CC CQ CEQ CO E CC

    Uploaded by

    the crow
    37 views13 pages
    This document is an exam for a second year Electrical Engineering class on Electronics I. It contains 5 questions covering various electronics concepts: 1) BJTs are current controlled devices while FETs are voltage controlled, explained with diagrams. A BJT voltage divider circuit is also designed. 2) Determine values for RB and RE given network parameters in Fig. 1. 3) Determine various network parameters for the circuit shown in Fig. 2. 4) Use a graphical approach to determine voltages and currents for the network in Fig. 3. 5) Derive network parameters for an n-channel JFET self-bias circuit and design a JFET fixed-bias amplifier meeting given specifications.

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    اسئلة_وحلول_الكترونيك_فاينل_2013_2014

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    This document is an exam for a second year Electrical Engineering class on Electronics I. It contains 5 questions covering various electronics concepts: 1) BJTs are current controlled devices while FETs are voltage controlled, explained with diagrams. A BJT voltage divider circuit is also designed. 2) Determine values for RB and RE given network parameters in Fig. 1. 3) Determine various network parameters for the circuit shown in Fig. 2. 4) Use a graphical approach to determine voltages and currents for the network in Fig. 3. 5) Derive network parameters for an n-channel JFET self-bias circuit and design a JFET fixed-bias amplifier meeting given specifications.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    37 views13 pages

    Asst. Lect. Hussein Ali Asst. Lect. Saif Ali: CC CQ CEQ CO E CC

    Uploaded by

    the crow
    This document is an exam for a second year Electrical Engineering class on Electronics I. It contains 5 questions covering various electronics concepts: 1) BJTs are current controlled devices while FETs are voltage controlled, explained with diagrams. A BJT voltage divider circuit is also designed. 2) Determine values for RB and RE given network parameters in Fig. 1. 3) Determine various network parameters for the circuit shown in Fig. 2. 4) Use a graphical approach to determine voltages and currents for the network in Fig. 3. 5) Derive network parameters for an n-channel JFET self-bias circuit and design a JFET fixed-bias amplifier meeting given specifications.

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    Al-Mustansiriya University Class: Second year

    College of Engineering Subject: Electronics I


    Electrical Engineering Dept. Time: (3) hours
    Final Examination Examiners: Dr. Riyadh Ali
    Asst. Lect. Hussein Ali
    Asst. Lect. Saif Ali
    (2013-2014)

    NOTE: Answer Four questions only


    Q1:
    (A) BJTs are current controlled devices, while FETs are voltage controlled devices.
    Why? Explain with diagrams. (7 Marks)
    (B) Design a voltage divider circuit by using BJT (n-p-n) with VCC = 12 V,  = 80,
    ICQ = 2.5 mA and VCEQ = 6 V. Calculate the stability factor S(I CO) for the designed
    circuit. Choose VE = (1/10) VCC. (18 Mark)

    Q2: For the network shown in Fig.(1), determine RB, and RE if AV = -10 and
    re = 3.8 . Assume that Zb =  RE , ro = 90 k.
    (25 Mark)
    Q3: For the network shown in Fig.(2), determine re , Zi , Zo , AV , and Ai.
    (25 Mark)

    Q4: Use the graphical approach for the network of Fig.(3) to determine the following:
    IDQ, VGSQ, VDSQ, VD, VG and VS.
    (25 Mark)
    Q5:
    (A) Derive Zi , Zo , and AV for the n-channel JFET self-bias circuit.
    Hint: use the appropriate approximation.
    (10 Marks)
    (B) Design a JFET fixed-bias amplifier to give AV = -5.375, Zi = 1M, and
    Zo = 1.72 k if available FET has IDSS = 10mA, VP = -4v, VGSQ = -1.5 v, and rd
    = 40 k.
    (15 Mark)
    Fig.(1) Fig.(2)

    Fig.(3)

    GOOD LUCK

    Baghdad in 2014

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