Circuit Concepts and Network Simplification Techniques
Circuit Concepts and Network Simplification Techniques
Circuit Concepts and Network Simplification Techniques
com
Chapter
Circuit Concepts and
Network Simplification
1 Techniques
1.1 Introduction
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is now done using lasers and electronic range finders.
Circuit analysis is the foundation for electrical technology. An indepth knowledge of
circuit analysis provides an understanding of such things as cause and effect, feedback
and control and, stability and oscillations. Moreover, the critical importance is the fact
that the concepts of electrical circuit can also be applied to economic and social systems.
Thus, the applications and ramifications of circuit analysis are immense.
In this chapter, we shall introduce some of the basic quantities that will be used
throughout the text. An electric circuit or electric network is an interconnection
of electrical elements linked together in a closed path so that an electric current
may continuously flow. Alternatively, an electric circuit is essentially a pipe-line that
facilitates the transfer of charge from one point to another.
The most elementary quantity in the analysis of electric circuits is the electric charge.
Our interest in electric charge is centered around its motion results in an energy transfer.
Charge is the intrinsic property of matter responsible for electrical phenomena. The
quantity of charge q can be expressed in terms of the charge on one electron. which is
1:602 10 19 coulombs. Thus, 1 coulomb is the charge on 6:24 1018 electrons. The
current flows through a specified area A and is defined by the electric charge passing
through that area per unit time. Thus we define q as the charge expressed in coulombs.
Charge is the quantity of electricity responsible for electric phenomena.
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2 j Network Theory
The time rate of change constitutes an electric current. Mathemetically, this relation
is expressed as
dq (t)
i(t) = (1.1)
Z dt
t
or q (t) = i(x)dx (1.2)
1
The unit of current is ampere(A); an ampere is 1 coulomb per second.
Current is the time rate of flow of electric charge past a given point .
The basic variables in electric circuits are
current and voltage. If a current flows into
terminal a of the element shown in Fig. 1.1,
then a voltage or potential difference exists
between the two terminals a and b. Nor-
mally, we say that a voltage exists across Figure 1.1 Voltage across an element
the element.
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The voltage across an element is the work done in moving a positive charge
of 1 coulomb from first terminal through the element to second terminal. The
unit of voltage is volt, V or Joules per coulomb.
We have defined voltage in Joules per coulomb as the energy required to move a
positive charge of 1 coulomb through an element. If we assume that we are dealing with
a differential amount of charge and energy,
dw
then v= (1.3)
dq
Multiplying both the sides of equation (1.3) by the current in the element gives
dw dq dw
vi =
dq dt
) dt
=p (1.4)
which is the time rate of change of energy or power measured in Joules per second or
watts (W ).
p could be either positive or negative. Hence it
is imperative to give sign convention for power.
If we use the signs as shown in Fig. 1.2., the
current flows out of the terminal indicated by x,
Figure 1.2 An element with the current
which shows the positive sign for the voltage. In
leaving from the terminal
this case, the element is said to provide energy
with a positive voltage sign
to the charge as it moves through. Power is then
provided by the element.
Conversely, power absorbed by an element is p = vi, when i is entering through the
positive voltage terminal.
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Energy is the capacity to perform work. Energy and power are related to each
other by the following equation:
Z t
Energy = w = p dt
1
EXAMPLE 1.1
Consider the circuit shown in Fig. 1.3 with
v = 8e t V and i = 20e t A for t 0. Find
the power absorbed and the energy supplied
by the element over the first second of oper-
ation. we assume that v and i are zero for Figure 1.3
t < 0:
SOLUTION
The power supplied is
t
p = vi = (8e )(20e t )
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= 160e 2t
W
The excitation is the current, i and the response is the voltage, v . When the element
is subjected to a current i1 , it provides a response v1 . Furthermore, when the element is
subjected to a current i2 , it provides a response v2 . If the principle of superposition is
true, then the excitation i1 + i2 must produce a response v1 + v2 .
Also, it is necessary that the magnitude scale factor be preserved for a linear element.
If the element is subjected to an excitation i where is a constant multiplier, then if
principle of homogencity is true, the response of the element must be v .
We may classify the elements of a circuir into categories, passive and active, depending
upon whether they absorb energy or supply energy.
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4 | Network Theory
An element is said to be passive if the total energy delivered to it from the rest of the
circuit is either zero or positive.
Then for a passive element, with the current flowing into the positive (+) terminal as
shown in Fig. 1.4 this means that
t
w= vi dt ≥ 0
−∞
1.3.1.A Resistors
Resistance is the physical property of an ele-
ment or device that impedes the flow of cur-
rent; it is represented by the symbol R.
Figure 1.5 Symbol for a resistor R
Resistance of a wire element is calculated us-
ing the relation:
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ρl
A
where A is the cross-sectional area, ρ the resistivity, and l the length of the wire. The
(1.5)
Since i2 is always positive, the energy is always positive and the resistor is a passive
element.
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1.3.1.B Inductors
Whenever a time-changing current is passed through a coil or wire, the voltage across
it is proportional to the rate of change of current through the coil. This proportional
relationship may be expressed by the equation
di
v=L (1.10)
dt
Where L is the constant of proportionality known as induc-
tance and is measured in Henrys (H). Remember v and i are
both funtions of time.
Let us assume that the coil shown in Fig. 1.6 has N turns and
the core material has a high permeability so that the magnetic
fluk is connected within the area A. The changing flux
creates an induced voltage in each turn equal to the derivative Figure 1.6 Model of the
of the flux , so the total voltage v across N turns is inductor
d
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dt
N = Li (1.12)
Note that when t = 1; i( 1) = 0. Also note that w(t) 0 for all i(t); so the
inductor is a passive element. The inductor does not generate energy, but only stores
energy.
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6 j Network Theory
1.3.1.C Capacitors
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Zt
vi d
1
Remember that v and i are both functions of time and could be written as v (t) and
i(t).
dv
Since i=C
dt
Zt
dv
we have w= v C d
d
1
Zv(t)
1 2? ?v(t)
=C v dv = Cv ?
2 v ( 1)
v( 1)
Since the capacitor was uncharged at t = 1, v( 1) = 0.
Hence w = w (t)
1
= Cv 2 (t) Joules (1.15)
2
Since q = Cv; we may write
1 2
w (t) = q (t) Joules (1.16)
2C
Note that since w(t) 0 for all values of v(t), the element is said to be a passive
element.
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The circuit symbols for ideal independent sources are shown in Fig. 1.8.(a) and (b).
Note that a circle is used to represent an independent source. The circuit symbols for
dependent sources are shown in Fig. 1.8.(c), (d), (e) and (f). A diamond symbol is used
to represent a dependent source.
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8 | Network Theory
A Unilateral network is one whose properties or characteristics change with the direction.
An example of unilateral network is the semiconductor diode, which conducts only in one
direction.
A bilateral network is one whose properties or characteristics are same in either direc-
tion. For example, a transmission line is a bilateral network, because it can be made to
perform the function equally well in either direction.
In this section, we shall give the formula for reducing the networks consisting of resistors
connected in series or parallel.
When a number of resistors are connected in series, the equivalent resistance of the com-
bination is given by
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Thus the total resistance is the algebraic sum of individual resistances.
When a number of resistors are connected in parallel as shown in Fig. 1.10, then the
equivalent resistance of the combination is computed as follows:
1 1 1 1
= + + ....... + (1.18)
R R1 R2 Rn
Thus, the reciprocal of a equivalent resistance of a parallel combination is the sum of
the reciprocal of the individual resistances. Reciprocal of resistance is conductance and
denoted by G. Consequently the equivalent conductance,
G = G1 + G2 + · · · + Gn
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Consider a two branch parallel circuit as shown in Fig. 1.11. The branch currents I1 and
I2 can be evaluated in terms of total current I as follows:
IR2 IG1
I1 = = (1.19)
R1 + R2 G1 + G2
IR1 IG2
I2 = = (1.20)
R1 + R2 G1 + G2
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Figure 1.11 Current division in a parallel circuit
That is, current in one branch equals the total current multiplied by the resistance of the
other branch and then divided by the sum of the resistances.
EXAMPLE 1.2
The current in the 6Ω resistor of the network shown in Fig. 1.12 is 2A. Determine the
current in all branches and the applied voltage.
Figure 1.12
SOLUTION
Voltage across 6Ω = 6 × 2
= 12 volts
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10 j Network Theory
EXAMPLE
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1.3
= 46 Volts
Figure 1.13
SOLUTION
Voltage across 5Ω = 2:5 5 = 12:5 volts
Hence the voltage across the parallel circuit = 25 12.5 = 12.5 volts
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In the preceeding section, we have seen how simple resistive networks can be solved
for current, resistance, potential etc using the concept of Ohm’s law. But as the network
becomes complex, application of Ohm’s law for
solving the networks becomes tedious and hence
time consuming. For solving such complex net-
works, we make use of Kirchhoff’s laws. Gustav
Kirchhoff (1824-1887), an eminent German physi-
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cist, did a considerable amount of work on the
principles governing the behaviour of eletric cir-
cuits. He gave his findings in a set of two laws: (i)
current law and (ii) voltage law, which together Figure 1.14 A simple resistive network
are known as Kirchhoff’s laws. Before proceeding for difining various circuit
to the statement of these two laws let us familar- terminologies
ize ourselves with the following definitions encoun-
tered very often in the world of electrical circuits:
(i) Node: A node of a network is an equi-potential surface at which two or more circuit
elements are joined. Referring to Fig. 1.14, we find that A,B,C and D qualify as
nodes in respect of the above definition.
(ii) Junction: A junction is that point in a network, where three or more circuit elements
are joined. In Fig. 1.14, we find that B and D are the junctions.
(iii) Branch: A branch is that part of a network which lies between two junction points.
In Fig. 1.14, BAD,BCD and BD qualify as branches.
(iv) Loop: A loop is any closed path of a network. Thus, in Fig. 1.14, ABDA,BCDB and
ABCDA are the loops.
(v) Mesh: A mesh is the most elementary form of a loop and cannot be further divided
into other loops. In Fig. 1.14, ABDA and BCDB are the examples of mesh. Once
ABDA and BCDB are taken as meshes, the loop ABCDA does not qualify as a mesh,
because it contains loops ABDA and BCDB.
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12 j Network Theory
The first law is Kirchhoff’s current law(KCL), which states that the algebraic sum of
currents entering any node is zero.
Let us consider the node shown in Fig. 1.15. The sum of the currents entering the
node is
ia + ib ic + id = 0
Note that we have ia since the current ia is leaving the node. If we multiply the
foregoing equation by 1, we obtain the expression
ia ib + ic id = 0
which simply states that the algebraic sum of currents leaving a node is zero. Alternately,
we can write the equation as
ib + id = ia + ic
which states that the sum of currents entering a node
is equal to the sum of currents leaving the node. If the
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sum of the currents entering a node were not equal
to zero, then the charge would be accumulating at a
node. However, a node is a perfect conductor and
cannot accumulate or store charge. Thus, the sum of
Figure 1.15 Currents at a node
currents entering a node is equal to zero.
Kirchhoff’s voltage law(KVL) states that the algebraic sum of voltages around any closed
path in a circuit is zero.
In general, the mathematical representation of Kirchhoff’s voltage law is
X
N
vj (t) = 0
j =1
where vj (t) is the voltage across the j th branch (with proper reference direction) in a loop
containing N voltages.
In Kirchhoff’s voltage law, the algebraic sign
is used to keep track of the voltage polarity.
In other words, as we traverse the circuit, it is
necessary to sum the increases and decreases
in voltages to zero. Therefore, it is impor-
tant to keep track of whether the voltage is
increasing or decreasing as we go through each
element. We will adopt a policy of consider-
ing the increase in voltage as negative and a
decrease in voltage as positive. Figure 1.16 Circuit with three closed paths
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Consider the circuit shown in Fig. 1.16, where the voltage for each element is identified
with its sign. The ideal wire used for connecting the components has zero resistance,
and thus the voltage across it is equal to zero. The sum of voltages around the loop
incorporating v6 ; v3 ; v4 and v5 is
v6 v3 + v4 + v5 = 0
The sum of voltages around a loop is equal to zero. A circuit loop is a conservative
system, meaning that the work required to move a unit charge around any loop is zero.
However, it is important to note that not all electrical systems are conservative. Ex-
ample of a nonconservative system is a radio wave broadcasting system.
EXAMPLE 1.4
Consider the circuit shown in Fig. 1.17. Find each branch current and voltage across
each branch when R1 = 8Ω; v2 = 10 volts i3 = 2A and R3 = 1Ω. Also find R2 .
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Figure 1.17
SOLUTION
i1 = i2 + i3
v3 = R3 i3 = 1(2) = 2V
Applying KVL (Kirchhoff’s Voltage Law) for the loop EACDE, we get
10 + v1 + v3 = 0
) v1 = 10 v3 = 8V
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14 | Network Theory
EXAMPLE 1.5
Referring to Fig. 1.18, find the follow-
ing:
(a) ix if iy = 2A and iz = 0A
(b) iy if ix = 2A and iz = 2iy
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(c) iz if ix = iy = iz
5 + iy + iz = ix + 3
(a) ix = 2 + iy + iz
= 2 + 2 + 0 = 4A
(b) iy = 3 + ix − 5 − iz
= −2 + 2 − 2iy
⇒ iy = 0A
(c) This situation is not possible, since ix and iz are in opposite directions. The only
possibility is iz = 0, and this cannot be allowed, as KCL will not be satisfied (5 = 3).
EXAMPLE 1.6
Refer the Fig. 1.19.
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Figure 1.19
SOLUTION
(a) vy = 1 (3 vx + iz )
Since vx = 5V and iz = 3A;
we get vy = 3(5) 3 = 12V
(b) vy = 1 (3 vx + iz ) = 6
)
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= 3 vx + 0.5
3 vx = 6:5
Hence, vx = 2.167 volts
EXAMPLE 1.7
For the circuit shown in Fig. 1.20, find i1 and v1 , given R3 = 6Ω.
Figure 1.20
SOLUTION
Applying KCL at node A, we get
i1 i2 + 5 = 0
From Ohm’s law, 12 = i2 R3
) i2 =
12
R3
=
12
6
= 2A
Hence; i1 = 5 i2 = 3A
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16 j Network Theory
v1 6i1 + 12 = 0
) v1 = 12 6i1
= 12 6(3) = 6volts
EXAMPLE 1.8
Use Ohm’s law and Kirchhoff’s law to evaluate (a) vx , (b) iin , (c) Is and (d) the power
provided by the dependent source in Fig 1.21.
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Figure 1.21
SOLUTION
(a) Applying KVL, (Referring Fig. 1.21 (a)) we get
2 + vx + 8 = 0
) vx = 6V
Figure 1.21(a)
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8vx
Is + 4vx + =
4 2
) Is + 4( 6)
6
4
=4
) Is 24 1:5 = 4
) Is = 29:5A
2 vx
iin = + Is + 6
2 4
) iin = 1 + 29:5
6
4
6 = 23A
(d) The power supplied by the dependent current source = 8 (4vx ) = 8 4 6 = 192W
EXAMPLE 1.9
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Find the current i2 and voltage v for the circuit shown in Fig. 1.22.
Figure 1.22
SOLUTION
v
From the network shown in Fig. 1.22, i2 =
6
The two parallel resistors may be reduced to
36
Rp = = 2Ω
3+6
Hence, the total series resistance around the loop is
Rs = 2 + Rp + 4
= 8Ω
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18 j Network Theory
21 + 8i 3i2 = 0 (1.21)
i2 =
iR2
=
i 3
R1 + R2 3+6
3i i
= =
9 3
) i = 3i2 (1.22)
21 + 8(3i2 ) 3i2 = 0
Hence; i2 = 1A
and v = 6i2 = 6V
EXAMPLE www.allsyllabus.com
1.10
Find the current i2 and voltage v for resistor R in Fig. 1.23 when R = 16Ω.
Figure 1.23
SOLUTION
4 i1 + 3i2 i2 = 0
v v
Also; i1 = =
4+2 6
v v
i2 = =
R 16
v v v
Hence; 4 +3 =0
6 16 16
) v = 96volts
v 96
and i2 = = = 6A
6 16
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EXAMPLE 1.11
A wheatstone bridge ABCD is arranged as follows: AB = 10Ω, BC = 30Ω, CD = 15Ω
and DA = 20Ω. A 2V battery of internal resistance 2Ω is connected between points A
and C with A being positive. A galvanometer of resistance 40Ω is connected between B
and D. Find the magnitude and direction of the galvanometer current.
SOLUTION
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20 j Network Theory
Let us now learn how to reduce a network having multiple current sources and a number
of resistors in parallel. Consider the circuit shown in Fig. 1.24. We have assumed that
the upper node is v (t) volts positive with respect to the lower node. Applying KCL to
upper node yields
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Figure 1.24 Multiple current source network
Source transformation is a procedure which transforms one source into another while
retaining the terminal characteristics of the original source.
Source transformation is based on the concept of equivalence. An equivalent circuit is
one whose terminal characteristics remain identical to those of the original circuit. The
term equivalence as applied to circuits means an identical effect at the terminals, but not
within the equivalent circuits themselves.
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We are interested in transforming the circuit shown in Fig. 1.26 to a one shown in
Fig. 1.27.
Figure 1.26 Voltage source connected Figure 1.27 Current source connected
to an external resistance R to an external resistance R
We require both the circuits to have the equivalence or same characteristics between the
terminals x and y for all values of external resistance R. We will try for equivanlence of
the two circuits between terminals x and y for two limiting values of R namely R = 0
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and R = 1. When R = 0, we have a short circuit across the terminals x and y . It is
obligatory for the short circuit to be same for each circuit. The short circuit current of
Fig. 1.26 is
vs
is = (1.28)
Rs
When R = 1, from Fig. 1.26 we have vxy = vs and from Fig. 1.27 we have vxy = is Rp .
Thus, for equivalence, we require that
vs = is Rp (1.30)
vs
Also from equation (1.29), we require is = . Therefore, we must have
Rs
vs
vs = Rp
Rs
) Rs = Rp (1.31)
Equations(1.29) and (1.31) must be true simulaneously for both the circuits for the two
sources to be equivalent. We have derived the conditions for equivalence of two circuits
shown in Figs. 1.26 and 1.27 only for two extreme values of R, namely R = 0 and R = 1.
However, the equality relationship holds good for all R as explained below.
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22 j Network Theory
vs = iRs + v
Dividing by Rs gives
vs v
=i+ (1.32)
Rs Rs
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i in parallel with a resistor R can be replaced with a voltage source of value v = iR in
series with the resistor R.
The reverse is also true; that is, a voltage source v in series with a resistor R can be
v
replaced with a current source of value i = in parallel with the resistor R. Parameters
R
within the circuit are unchanged under these transformation.
EXAMPLE 1.12
A circuit is shown in Fig. 1.28. Find the current i by reducing the circuit to the right of
the terminals x y to its simplest form using source transformations.
Figure 1.28
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SOLUTION
The first step in the analysis is to transform 30 ohm resistor in series with a 3 V source
into a current source with a parallel resistance and we get:
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The parallel resistance of 12Ω and the current source of 0.1A can be transformed into
a voltage source in series with a 12 ohm resistor.
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24 j Network Theory
EXAMPLE 1.13
Find current i1 using source transformation for the circuit shown Fig. 1.29.
Figure 1.29
SOLUTION
Converting 1 mA current source in parallel with 47kΩ resistor and 20 mA current source
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in parallel with 10kΩ resistor into equivalent voltage sources, the circuit of Fig. 1.29
becomes the circuit shown in Fig. 1.29(a).
Figure 1.29(a)
Please note that for each voltage source, “+” corresponds to its corresponding current
source’s arrow head.
Using KVL to the above circuit,
EXAMPLE 1.14
Use source transformation to convert the circuit in Fig. 1.30 to a single current source in
parallel with a single resistor.
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Figure 1.30
SOLUTION
The 9V source across the terminals a0 and b0 will force the voltage across these two
terminals to be 9V regardless the value of the other 9V source and 8Ω resistor to its
left. Hence, these two components may be removed from the terminals, a0 and b0 without
affecting the circuit condition. Accordingly, the above circuit reduces to,
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Converting the voltage source in series with 4Ω resistor into an equivalent current
source, we get,
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26 j Network Theory
Since node b is at a potential E with respect to node a, the network can be redrawn
equivalently as in Fig. 1.31(b) or (c) depend on the requirements.
Figure 1.31(b) Networks after E-shift Figure 1.31(c) Network after the E-shift
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EXAMPLE 1.15
Use source shifting and transformation techiniques to find voltage across 2Ω resistor shown
in Fig. 1.33(a). All resistor values are in ohms.
Figure 1.33(a)
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28 j Network Theory
SOLUTION
The circuit is redrawn by shifting 2A current source and 3V voltage source and further
simplified as shown below.
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V =3 2 1 +4
1
1 +4 1
=3V
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EXAMPLE 1.16
Use source mobility to calculate vab in the circuits shown in Fig. 1.34 (a) and (b). All
resistor values are in ohms.
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Figure 1.34(a) Figure 1.34(b)
SOLUTION
(a) The circuit shown in Fig. 1.34(a) is simplified using source mobility technique, as
shown below and the voltage across the nodes a and b is calculated.
b a
1
Vab = =2V
3−1 + 10−1 + 15−1
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30 j Network Theory
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Figure 1.34(e)
12 1 6
Vbc =
12 1 + 10 1 + 15 1
12 = 24 V
EXAMPLE 1.17
Use mobility and reduction techniques to solve the node voltages of the network shown
in Fig. 1.35(a). All resistors are in ohms.
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Figure 1.35(a)
SOLUTION
The circuit shown in Fig. 1.35(a) can be reduced by using desired techniques as shown in
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Fig. 1.35(b) to 1.35(e).
Figure 1.35(b)
Va = 92= 18 V
and Ve = Va 22 20 = 42V
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32 j Network Theory
Figure 1.35(c)
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Figure 1.35(d)
Figure 1.35(e)
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Vb Vb Vd
45 + =0
2 8
Using the value of Vd in the above equation and rearranging, we get,
1 1 12
Vb + = 45
2 8 8
) Vb = 69:6 V
Vc Vc Ve
+ 45 + =0
5 10
1 1 42
Vc + = 45
5 10 10
) Vc = 164 V
Figure 1.36(a)
SOLUTION
The circuit shown in Fig. 1.36(a) can be reduced as follows and Vx is calculated.
Thus
Vx =
5
25
18 = 3:6V
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34 j Network Theory
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Before starting the concept of mesh analysis, we want to reiterate that a closed path or
a loop is drawn starting at a node and tracing a path such that we return to the original
node without passing an intermediate node more than once. A mesh is a special case of
a loop. A mesh is a loop that does not contain any other loops within it. The network
shown in Fig. 1.37(a) has four meshes and they are identified as Mi , where i = 1; 2; 3; 4.
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Figure 1.37(a) A circuit with four meshes. Each mesh is identified by a circuit
We may employ KVL around each mesh. We will travel around each mesh in the
clockwise direction and sum the voltage rises and drops encountered in that particular
mesh. We will adpot a convention of taking voltage drops to be positive and voltage rises
to be negative . Thus, for the network shown in Fig. 1.37(b) we have
Mesh 1 : v + i1 R1 + (i1 i2 )R3 = 0 (1.34)
Mesh 2 : R3 (i2 i1 ) + R2 i2 = 0 (1.35)
Note that when writing voltage across R3 in mesh 1, the current in R3 is taken as
i1 i2 . Note that the mesh current i1 is taken as ‘+ve’ since we traverse in clockwise
direction in mesh 1, On the other hand, the voltage across R3 in mesh 2 is written as
R3 (i2 i1 ). The current i2 is taken as +ve since we are traversing in clockwise direction
in this case too.
Solving equations (1.34) and (1.35), we can find the mesh currents i1 and i2 .
Once the mesh currents are known, the branch currents are evaluated in terms of
mesh currents and then all the branch voltages are found using Ohms’s law. If we have
N meshes with N mesh currents, we can obtain N independent mesh equations. This set
of N equations are independent, and thus guarantees a solution for the N mesh currents.
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36 j Network Theory
EXAMPLE 1.19
For the electrical network shown in Fig. 1.38, determine the loop currents and all branch
currents.
Figure 1.38
SOLUTION
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Applying KVL for the meshes shown in Fig. 1.38, we have
I1 = 0:11A
I2 = 2:53A
and I3 = 0:9A
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The negative sign for I2 and I3 indicates that the actual directions of these currents
are opposite to the assumed directions.
(R1 + R2 )i1 R2 i2 = v
Since i2 = is ;
we get (R1 + R2 )i1 + is R2 = v
v is R2 Figure 1.39(a) Circuit containing both inde-
) i1 =
R1 + R2 pendent voltage and current sources
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38 j Network Theory
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Figure 1.40
SOLUTION
Constraint equations:
I1 = 4 10 3 A
I2 = 2 10 3 A
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1.11 Supermesh
EXAMPLE 1.21
Find the current io in the circuit shown in Fig. 1.42(a).
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Figure 1.42(a)
SOLUTION
This problem is first solved by the techique explained in Section 1.10. Three mesh currents
are specified as shown in Fig. 1.42(b). The mesh currents constrained by the current
sources are
i=2 10 3
A
i2 i3 = 4 10 3
A
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40 j Network Theory
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6 + 1 103 i3 + 2 103 i2 + 2 103 (i2
i1 ) + 1 103 (i3 i1 ) = 0 (1.39)
Solving we get
10
i2 = mA
3
Thus; io = i1 i2
10
=2
3
4
= mA
3
The purpose of supermesh approach is to avoid introducing the unknown voltage vxy .
The supermesh is created by mentally removing the 4 mA current source as shown in
Fig. 1.42(c). Then applying KVL equation around the dotted path, which defines the
supermesh, using the orginal mesh currents as shown in Fig. 1.42(b), we get
Note that the supermesh equation is same as equation 1.39 obtained earlier by introduc-
ing vxy , the remaining procedure of finding io is same as before.
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EXAMPLE 1.22
For the network shown in Fig. 1.43(a), find the mesh currents i1 ; i2 and i3 .
Figure 1.43(b)
Figure 1.43(a)
SOLUTION
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The 5A current source is in the common
boundary of two meshes. The supermesh
is shown as dotted lines in Figs.1.43(b) and
1.43(c), the branch having the 5A current
source is removed from the circuit diagram.
Then applying KVL around the dotted path,
which defines the supermesh, using the orig-
inal mesh currents as shown in Fig. 1.43(c),
we find that
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42 j Network Theory
EXAMPLE 1.23
Find the mesh currents i1 ; i2 and i3 for the network shown in Fig. 1.44.
Figure 1.44
SOLUTION
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Here we note that 1A independent current source is in the common boundary of two
meshes. Mesh currents i1 ; i2 and i3 , are marked in the clockwise direction. The supermesh
is shown as dotted lines in Figs. 1.45(a) and 1.45(b). In Fig. 1.45(b), the 1A current
source is removed from the circuit diagram, then applying the KVL around the dotted
path, which defines the supermesh, using original mesh currents as shown in Fig. 1.45(b),
we find that
2 + 2(i1 i3 ) + 1(i2 i3 ) + 2i2 = 0
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i1 i2 = 1
The persence of one or more dependent sources merely requires each of these source
quantites and the variable on which it depends to be expressed in terms of assigned mesh
currents. That is, to begin with, we treat the dependent source as though it were an
independent source while writing the KVL equations. Then we write the controlling
EXAMPLE 1.24
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equation for the dependent source. The following examples illustrate the point.
(a) Use the mesh current method to solve for ia in the circuit shown in Fig. 1.46.
(b) Find the power delivered by the independent current source.
(c) Find the power delivered by the dependent voltage source.
Figure 1.46
SOLUTION
(a) We mark two mesh currents i1 and i2 as shown in Fig. 1.47. We find that i = 2:5mA.
Applying KVL to mesh 2, we find that
2400(i2 0:0025) + 1500i2 150(i2 0:0025) = 0 (∵ ia = i2 2:5 mA)
) 3750i2 = 6 0:375
= 5:625
) i2 = 1:5 mA
ia = i2 2:5 = 1:0mA
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44 j Network Theory
= 8.5 mW(delivered)
(c) Pdep.source = 150ia (i2 )
= 150( 1:0 10 3
)(1:5 10 3)
EXAMPLE 1.25
Find the total power delivered in the circuit using mesh-current method.
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Figure 1.48
SOLUTION
Let us mark three mesh currents i1 , i2 and i3 as shown in Fig. 1.49.
KVL equations :
Mesh 1: 17:5i1 + 2:5(i1 i3 )
+5(i1 i2 ) = 0
) 25i1 5i2 2:5i3 = 0
Mesh 2: 125 + 5(i2 i1 )
+7:5(i2 i3 ) + 50 = 0
) 5i1 + 12:5i2 7:5i3 = 75
Constraint equations :
i3 = 0:2Va
Va = 5(i2 i1 )
Thus; i3 = 0:2 5(i2 i1 ) = i2 i1 :
Figure 1.49
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Applying KVL through the path having 5Ω ! 2:5Ω ! vcs ! 125V source, we get,
5(i2 i1 ) + 2:5(i3 i1 ) + vcs 125 = 0
) vcs = 125 5(i2 i1 ) 2:5(i3 i1 )
= 125 48 2:5(9:6 3:6) = 62 V
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Pvcs = 62(9:6) = 595:2W (absorbed)
P50V = 50(i2 i3 ) = 50(13:2 9:6) = 180W (absorbed)
P125V = 125i2 = 1650W (delivered)
EXAMPLE 1.26
Use the mesh-current method to find the power delivered by the dependent voltage source
in the circuit shown in Fig. 1.50.
Figure 1.50
SOLUTION
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46 j Network Theory
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Figure 1.51
Also ia = i2 i3
Solving, i1 = 42A, i2 = 27A, i3 = 22A, ia = 5A.
Power delivered by the dependent voltage source = P20ia = (20ia )i2
= 2700W (delivered)
In the nodal analysis, Kirchhoff’s current law is used to write the equilibrium equations.
A node is defined as a junction of two or more branches. If we define one node of the
network as a reference node (a point of zero potential or ground), the remaining nodes of
the network will have a fixed potential relative to this reference. Equations relating to all
nodes except for the reference node can be written by applying KCL.
Refering to the circuit shown
in Fig.1.52, we can arbitrarily
choose any node as the reference
node. However, it is convenient
to choose the node with most con-
nected branches. Hence, node 3 is
chosen as the reference node here.
It is seen from the network of Fig. Figure 1.52 Circuit with three nodes where the
1.52 that there are three nodes. lower node 3 is the reference node
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Hence, number of equations based on KCL will be total number of nodes minus one.
That is, in the present context, we will have only two KCL equations referred to as node
equations. For applying KCL at node 1 and node 2, we assume that all the currents leave
these nodes as shown in Figs. 1.53 and 1.54.
Figure 1.53 Simplified circuit for Figure 1.54 Simplified circuit for
applying KCL at node 1 applying KCL at node 2
v1 va v1 v2 v1
) R1
+
R2
+
R4
0
=0
va
) v1
1
R1
+
1
R2
+
R4
1
v2
R2
1
=
R1
(1.40)
(ii) At node 2: i2 + i3 + i5 = 0
v2 v1 v2 vb v2
) R2
+
R3
+
R5
=0
vb
) v1
1
R2
+ v2
1
R2
+
1
R3
+
1
R5
=
R3
(1.41)
6 R1 + + 76 7 6 R1 7
6 R2 R4 R2 76 7=6 7
6 76 7 6 7
4 1 1 1 1 54 5 4 vb 5
+ + v2
R2 R2 R3 R5 R3
The above matrix equation can be solved for node voltages v1 and v2 using Cramer’s
rule of determinants. Once v1 and v2 are obtainted, then by using Ohm’s law, we can find
all the branch currents and hence the solution of the network is obtained.
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48 j Network Theory
EXAMPLE 1.27
Refer the circuit shown in Fig. 1.55. Find the three node voltages va , vb and vc , when all
the conductances are equal to 1S.
Figure 1.55
SOLUTION
At node a:
At node b:
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(G1 + G2 + G6 )va G2 v b
G2 va + (G4 + G2 + G3 )vb
G6 v c = 9
G4 v c = 3
3
P
where G is the sum of the conductances at node i, and Gij is the sum of conductances
i
conecting nodes i and j .
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The node voltage matrix equation for a circuit with k unknown node voltages is
Gv = is ;
2 3
va
6 vb 7
v=6 .
6 7
where; 7
4 .. 5
vk
is the vector consisting of k current sources and isk is the sum of all the source currents
entering the node k . If the k th current source is not present, then isk = 0.
EXAMPLE 1.28
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Use the node voltage method to find how much power the 2A source extracts from the
circuit shown in Fig. 1.56.
Figure 1.56
SOLUTION
Applying KCL at node a, we get
va va 55
2+ + =0
4 5
) va = 20V
P2Asource = 20(2) = 40W (absorbing)
Figure 1.57
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50 j Network Theory
EXAMPLE 1.29
Refer the circuit shown in Fig. 1.58(a).
(a) Use the node voltage method to find the branch currents i1 to i6 .
(b) Test your solution for the branch currents by showing the total power dissipated equals
the power developed.
SOLUTION
www.allsyllabus.com Figure 1.58(a)
(a) At node v1 :
v1 110 v1 v2 v1 v3
+ + =0
2 8 16
) 11v1 2v2 v3 = 880
At node v2 :
v2 v1 v2 v2 v3
+ + =0
8 3 24
) 3v1 + 12v2 v3 = 0
At node v3 :
v3 + 110 v3 v2 v3 v1
+ + =0
2 24 16
) 3v1 2v2 + 29v3 = 2640
Figure 1.58(b)
Solving the above nodal equations,we get
v1 = 74:64V; v2 = 11:79V; v3 = 82:5V
110 v1
Hence; i1 = = 17:68A
2
v2
i2 = = 3:93A
3
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v3 + 110
i3 = = 13:75A
2
v1 v2
i4 = = 7:86A
8
v2 v3
i5 = = 3:93A
24
v1 v3
i6 = = 9:82A
16
(b) Total power delivered = 110i1 + 110i3 = 3457:3W
Total power dissipated = i21 2 + i22 3 + i23 2 + i24 8 + i25 24 + i26 16
= 3457.3 W
EXAMPLE 1.30
(a)Use the node voltage method to show that the output volatage vo in the circuit of
Fig 1.59(a) is equal to the average value of the source voltages.
(b) Find vo if v1 = 150V, v2 = 200V and v3 = 50V.
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Figure 1.59(a)
SOLUTION
Applying KCL at node a, we get
vo v1 vo v2 vo v3 vo vn
+ + + + =0
R R R R
) nvo = v1 + v2 + + v n
= [v1 + v2 + + v ]
1
Hence; vo n
n
1X
n
= vk
n
k =1
1
(b) vo = (150 + 200 50) = 100V Figure 1.59(b)
3
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52 j Network Theory
EXAMPLE 1.31
Use nodal analysis to find vo in the circuit of Fig. 1.60.
Figure 1.60
Figure 1.61
SOLUTION
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Referring Fig 1.61, at node v1 :
v1 + 6 v1 v1 + 3
+ + =0
6 3 2
v1 v1 v1
) 6
+
3
+
2
= 2:5
) v1 = 2:5 V
v1
vo =
2+1
1
2:5
=
3
1
= 0:83volts
EXAMPLE 1.32
Refer to the network shown in Fig. 1.62. Find the power delivered by 1A current source.
Figure 1.62
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SOLUTION
Referring to Fig. 1.63, applying KVL
to the path va ! 4Ω ! 3Ω, we get
va = v1 v 3
v2 = 12V
v1 v1 v2
At node v1 : + 1=0
4 2
v1 v1
) 4
+
2
12
1=0
v1 = 9:33 V
v3 v3 v2
At node v2 : + +1=0
3 2 Figure 1.63
v3 v3
) 3
+
2
12
+1=0
) v3 = 6V
Hence; www.allsyllabus.com
va = 9:33 6 = 3:33 volts
P1A source = va 1
= 3:33 1 = 3:33W (delivering)
1.14 Supernode
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54 j Network Theory
Solving equations (1.42) and (1.43), we can find the values of va and vb .
When we apply KCL at the supernode, mentally imagine that the voltage source vs
is removed from the the circuit of Fig. 1.63, but the voltage at nodes a and b are held at
va and vb respectively. In other words, by applying KCL at supernode, we obtain
va G1 + va G2 = is
The equation is the same equation (1.43). As in supermesh, the KCL for supernode
eliminates the problem of dealing with a current through a voltage source.
Procedure for using supernode:
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1. Use it when a branch between non-reference nodes is connected by an independent
or a dependent voltage source.
2. Enclose the voltage source and the two connecting nodes inside a dotted ellipse to
form the supernode.
3. Write the constraint equation that defines the voltage relationship between the two
non-reference node as a result of the presence of the voltage source.
4. Write the KCL equation at the supernode.
5. If the voltage source is dependent, then the constraint equation for the dependent
source is also needed.
EXAMPLE 1.33
Refer the electrical circuit shown in Fig. 1.65 and find va .
Figure 1.65
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SOLUTION
The constraint equation is,
vb va = 8
) vb = va + 8
va + 8 (va + 8) 12 va12
+ +
500 125 250
va
+ =0
500
Therefore; va = 4V Figure 1.66
EXAMPLE 1.34
Use the nodal analysis to find vo in the network of Fig. 1.67.
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Figure 1.67
SOLUTION
Figure 1.68
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56 j Network Theory
v2 v1 = 12
) v1 = v2 12
KCL at supernode:
v2 12 (v2 12) v3 v2 v2 v3
1 10 1 10 1 10 1 103
3
+ 3
+ 3
+ =0
) 4 10 3 v2 2 10 3 v3 = 24 10 3
) 4v2 2v3 = 24
At node v3 :
v3 v2 v3 (v2 12)
= 2 10 3
1 103 1 103
+
) 2 10 3 v2 + 2 10 3 v3 = 10 10 3
2v2 + 2v3 = 10
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Solving we get v2 = 7V
v3 = 2V
Hence; vo = v3 = 2V
EXAMPLE 1.35
Refer the network shown in Fig. 1.69. Find the current Io .
Figure 1.69
SOLUTION
Constriant equation:
v3 = v1 12
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Figure 1.70
KCL at supernode:
v1 12 v1 v1 v2
3 10 2 10 3 103
3
+ 3
+ =0
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7
6
10 3 v1
1
3
10 3v2 = 4 10 3
) 7
6
v1
1
3
v2 = 4
KCL at node 2:
v2 v1 v2
+ 4 10 3
3 3 103
+ =0
103
) 1
3
10 3
v1 +
2
3
10 3
v2 = 4 10 3
) 1
3
v1 +
2
3
v2 = 4
Solving the above two matrix equations using Cramer’s rule, we get
v1 = 2V
v1
) Io =
2 103
=
2
2 103
= 1mA
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58 j Network Theory
EXAMPLE 1.36
Refer the network shown in Fig. 1.71. Find the power delivered by the dependent voltage
source in the network.
Figure 1.71
SOLUTION
Refer Fig. 1.72, KCL at node 1:
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v1
5
80
+
v1
50
+
v1 + 75ia
25
=0
v1
where ia =
50 v
1
v1 v1 v1 + 75
) 5
80
+
50
+
25
50 =0
Solving we get v1 = 50V
Figure 1.72
v1
) ia =
50
50
=
50
= 1A
v1 ( 75ia )
Also; i1 =
(10 + 15)
v1 + 75ia
=
(10 + 15)
50 + 75 1
= = 5A
(10 + 15)
P75ia = (75ia )i1
= 75 1 5
= 375W (delivered)
EXAMPLE 1.37
Use the node-voltage method to find the power developed by the 20 V source in the circuit
shown in Fig. 1.73.
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Figure 1.73
SOLUTION
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Figure 1.74
Constraint equations :
va = 20 v2
v1 31ib = v3
v2
ib =
40
Node equations :
(i) Supernode:
v1 v1 20 v3 v2 v3
+ + + + 3:125va = 0
20 2 4 80
v1 v1 (v1 35ib ) v2 (v1 35ib )
) 20
+
2
20
+
4
+
80
+ 3:125(20 v2 ) = 0
v2 v2
v1 v1 v1 35 v2 v1 35
) 20
+
2
20
+
4
40 +
80
40 + 3:125(20 v2 ) = 0
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60 j Network Theory
(ii) At node v2 :
v2 v2 v3 v2 20
+ + =0
40 4 1
v2 v2 (v1 35ib ) v2
) 40
+
4
+
1
20
=0
v2
v2 v2 v1 35 v2
) 40
+
4
40 +
1
20
=0
v1 = 20:25V; v2 = 10V
Then v3 = v1 35ib
v2
= v1 35
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40
20 v1 20 v2
Also; ig = +
2 1
20 + 20:25 (20 10)
= +
2 1
= 30.125 A
P20V = 20ig = 20(30:125)
= 602.5 W (delivered)
EXAMPLE 1.38
Refer the circuit shown in Fig. 1.75(a). Determine the current i1 .
Figure 1.75(a)
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SOLUTION
Constraint equation:
Applying KVL clockwise to the loop containing 3V source, dependent voltage source,
2A current source and 4Ω resitor, we get
v1 3 0:5i1 + v2 = 0
) v1 v2 = 3 0:5i1
v2 4
Substituting i1 = , the above equation becomes
2
4v1 3v2 = 8
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Figure 1.75(b)
v1 v2
4
+
2
4
= 2 ) v1 + 2v2 = 0
Solving the constraint equation and the KCL equation at supernode simultaneously,
we find that,
v2 = 727:3 mV
v1 = 2v2
= 1454:6 mV
v2 4
Then; i1 =
2
= 1:636A
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62 j Network Theory
EXAMPLE 1.39
Refer the network shown in Fig. 1.76(a). Find the node voltages vd and vc .
SOLUTION
vb vc
From the network, shown in Fig. 1.76 (b), by inspection,vb = 8 V, i1 =
2
Constraint equation: va = 6i1 + vd
va vb va vd vc
KCL at supernode: + + = 3vc
2 2 2
) va
1 1
+
2 2
1
2
1
vb + [vd
2
vc ] = 3vc (1.44)
Figure 1.76(b)
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Figure 1.77(a)
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64 j Network Theory
SOLUTION
Refer Fig 1.77(b), by inspection, v2 = 5V
Nodes 1 and 3 form a supernode.
Constraint equation:
v1 v3 = 6
Solving the constraint and the KCL equations at supernode simultaneously, we get
v1 = 4.091V
v3 = 1.909V
KCL at node 4 :
v4 v4 v2
+ 2=0
2 4
Substituting v2 = 5V, we get
v4 v4 5
+ 2=0
2 4
Solving we get, v4 = 4:333V:
Let us consider a general circuit with two accessible terminals, as shown in Fig. 1.78. If
the time domain voltage and current at the terminals are given by
v = vm sin(!t + v )
i = im sin(!t + i )
then the phasor quantities at the terminals are Figure 1.78 General phasor
circuit
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V = Vm v
I = Im i
Z = R + jX
where R = Real[Z] is the resistance and X = Im[Z] is the reactance. Both R and X , like
Z, are measured in ohms. p
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The magnitude of Z is written as |Z| = R2+ X
and the angle of Z is denoted as Z = tan
1
2
X
.
R
The relationships are shown graphically in Fig. 1.79.
The table below gives the various forms of Z for
different combinations of R; L and C . Figure 1.79 Graphical representation
of impedance
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66 j Network Theory
If a complex excitation, say vm ej (!t+) , is applied to a circuit, then complex voltages, such
as v1 ej (!t+1 ) ; v2 ej (!t+2 ) and so on, appear across the elements in the circuit. Kirchhoff’s
voltage law applied around a typical loop results in an equation such as
j(ωt+θ1 ) j(ωt+θ2 ) j (ωt+θN )
v1 e + v2 e + : : : + vN e =0
Dividing by ej!t , we get
v1 ej1 + v2 ej2 + : : : + vN ejN = 0
)
where
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V1 + V2 + : : : + VN = 0
Vi = Vi i ; i = 1; 2; N
EXAMPLE 1.41
Determine V1 and V2 , the node voltage phasors using nodal technique for the circuit
shown in Fig. 1.80.
Figure 1.80
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SOLUTION
First step in the analysis is to convert the circuit of Fig. 1.80 into its phasor version
(frequency domain representation).
5 cos 2t ) 5 / 0 ; ! = 2 rad=s
1
4
H ) j!L = j Ω
1
2
j j
1
2
F ) !C
= j 1Ω; 1F ) !C
=
1
j Ω
2
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Figure 1.80(a)
Figure 1.80(b)
Fig. 1.80(a) and (b) are the two versions of the phasor circuit of Fig. 1.80.
Z1 = j 1Ωjj
1
j Ω
2
1
j1 j
2
= = j 1Ω
1
j1 j
2
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68 j Network Theory
Z2 = j Ωjj1Ω
1
2
1
j (1)
2 1 + j2
= = Ω
1 5
j +1
2
KCL at node V1 :
5 /0 ) +
V1 V1 V2
2 (V1 + =0
j1 j1
) (2 + j 2)V1 j 1V2 = 10
KCL at node V2 :
= 5∠0
V2 V1 V2
+
j1 1 + j2
5
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)
)
j V2 j V1 + V2 2j V2 = 5
j 1V1+ (1 j 1)V2 = 5
V1 = 2 j1 V
V2 = 2 + j 4 V
In polar form,
p
26:6 V
V1 =
p5 /
V2 = 2 5 /63:4 V
In time domain,
F
v1 = 26.6 ) V
F5 cos(2t
v2 = 2 5 cos(2t + 63.4 ) V
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EXAMPLE 1.42
Find the source voltage Vs shown in Fig. 1.81 using nodal technique. Take I = 3 /45 A:
Figure 1.81
SOLUTION
Refer to Fig. 1.81(a).
KCL at node 1: www.allsyllabus.com
V1 Vs V1 V1 V2
+ + =0
10 j5 5 + j2
) (11 + j 12)V1 (5 + j 2)Vs = 10V2 (1.48)
Figure 1.81(a)
KCL at node 2:
V2 V1 V2
+I+ =0
5 + j2 8 + j3
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70 j Network Theory
EXAMPLE 1.43
Find the voltage v (t) in the network shown in Fig. 1.82 using nodal technique.
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Figure 1.82
SOLUTION
Converting the circuit diagram shown in Fig. 1.82 into a phasor circuit diagram, we get
Figure 1.83
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At node V1 :
V1 ( 1 + j ) V1 V1 V2
+ + =0
j2 2 j2
) V1 j V2 = 1 + j (1.51)
V2 V1 V2
At nodeV2 : + Ic = 0
j2 j2
2( 1 + j )
Also Ic = 2Ix = = 1 j
j2
V2 V1 V2
Hence; + = 1 j
j2 j2
) j V1 + j 2V2 = 2 j2 (1.52)
EXAMPLE 1.44
Refer to the circuit of Fig. 1.84. Using nodal technique, find the current i.
Figure 1.84
SOLUTION
1 1 1
Reactance of F capacitor = = = j 1kΩ
j 5000 10
5 j!C 1 6
5
The parallel combinations of 2kΩ and j 1kΩ is
2 103 ( j 103 ) 2
j 2)kΩ
2 10
Zp = = (1
3 j 10 3 5
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72 j Network Theory
Figure 1.85
V1 4 /0 V1 V2
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500
+
2
5
(1 j 2) 103
+
(2 j 1) 103
=0
V1 4 /0 V1 V1 + 3000I
(2 j 1) 103
+ + =0
500 2
5
(1 j 2) 103
Also,
4 /0 V1
I= (1.53)
500
Hence,
V1 4
4∠0
V1 + 3000
V1 V1 500
(2 j 1) 103
+ + =0
500 2
5
(1 j 2) 103
Solving for V1 and substituting the same in equation (1.53), we get I = 24 /53:1 mA
Hence, in time-domain, we have
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EXAMPLE 1.45
Use nodal analysis to find Vo in the circuit shown in Fig. 1.86.
Figure 1.86
SOLUTION
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The voltage source and its two connecting nodes form the supernode as shown in
Fig. 1.87.
Figure 1.87
Constraint equation:
Applying KVL clockwise to the loop formed by 12 /0 source, j 2Ω and j 4Ω we get
12 /0 + Vo V1 = 0
) V1 = Vo 12 /0
KCL at supernode:
V1 V1 V2 Vo V2 Vo
+ + + =0
j2 1 1 j4
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74 j Network Theory
V2
V1 V2 V2 Vo
KCL at V2 : + + =0
1 2 1
Substituting V1 = Vo 12 /0 in the above equation
V2 (Vo 12 /0 ) + V2 + V2 Vo = 0
1
we get,
2
) 2Vo + V2 = 12 /0
5
2
Solving the two nodal equations,we get
Vo = 11.056 j8.09 = 13.7 / 36.2 V
EXAMPLE 1.46
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Find i1 in the circuit of Fig. 1.88 using nodal analysis.
Figure 1.88
SOLUTION
V1
But I1 =
j 2:5
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Figure 1.88(a)
V2 V1 V2 2V1
Hence; +=
j4 j2 j 2:5
) j 0:55V1 j 0:75V2 = 0
V1 = 18:97 /18:43 V
V2 = 13:91 / 161:56 V
= 7:59 /108:4 A
V1
The current I1 =
j 2:5
Transforming this to the time-domain, we get
EXAMPLE 1.47
Use the node-voltage method to find the steady-state expression for vo (t) in the circuit
shown in Fig. 1.89 if
vg 1 = 10 cos(5000t + 53:13 )V
vg 2 = 8 sin 5000t V
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76 j Network Theory
Figure 1.89
SOLUTION
The first step is to convert the circuit of Fig. 1.89 into a phasor circuit.
Vo ( j 8)
+ =0
j4
Solving we get Vo = 12 /0 V
Figure 1.89(a)
EXAMPLE 1.48
Solve the example (1.47) using mesh-current method.
SOLUTION
Refer Fig. 1.90.
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Figure 1.90
Now;
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Vo = (I1 I2 )6 = 12
= 12 /0 V
Hence in time domain, vo = 12 cos 5000t Volts
EXAMPLE 1.49
Determine the current Io in the circuit of Fig. 1.91 using mesh analysis.
Figure 1.91
SOLUTION
Refer Fig 1.92
KVL for mesh 1 :
(8 + j 10 j 2)I1 ( j 2)I2 j 10I3 = 0
) (8 + j 8)I1 + j 2I2 = j 10I3 (1.54)
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78 j Network Theory
EXAMPLE 1.50
Find Voc using mesh technique.
Figure 1.93
SOLUTION
Applying KVL clockwise for mesh 1 :
600I1 j 300(I1 I2 ) 9=0
) (600 j 300)I1 + j 300I2 = 9
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Figure 1.94
EXAMPLE 1.51
p
Find the steady current i1 when the source voltage is vs = 10 2 cos(!t + 45 ) V and
the current source is is = 3 cos !t A for the circuit of Fig. 1.95. The circuit provides the
impedence in ohms for each element at the specified ! .
Figure 1.95
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80 j Network Theory
SOLUTION
Figure 1.96
The first step is to convert the circuit of Fig. 1.95 into a phasor circuit. The phasor
circuit is shown in Fig. 1.96.
p p
vs = 10 2 cos(!t + 45 ) ) Vs = 10 2 /45 = 10(1 + j )
is = 3 cos !t ) Is = 3 /0
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Figure 1.96(a)
Constraint equation:
I2 I1 = Is = 3 /0
Applying KVL clockwise around the supermesh we get
I1 Z1 + I2 (Z2 + Z3 ) Vs = 0
Substituting I2 = I1 + Is (from the constraint equation)
we get, I1 Z1 + (I1 + Is )(Z2 + Z3 ) = Vs
) (Z1 + Z2 + Z3 )I1 = Vs (Z2 + Z3 )Is
(10 + j 10) (2 j 2)3
) I1 =
Vs (Z2 + Z3 )Is
Z1 + Z2 + Z3
=
2
= 2 + j 8 = 8:25 /76 A
Hence in time domain,
i1 = 8.25 cos(ωt + 76 ) A
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EXAMPLE 1.52
p
Find the steady-state sinusoidal current i1 for the circuit of Fig. 1.97, when vs = 10 2 cos
(100t + 45 ) V:
Figure 1.97
SOLUTION
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The first step is to convert the circuit of Fig. 1.97 int to a phasor circuit. The phasor
circuit is shown in Fig. 1.98.
p
vs = 10 2 cos(100t + 45 )
p
) Vs = 10 2 /45 ; ! = 100 rad= sec
L = 30 mH ) XL = j!L
= j 100 30 10 3
= j 3Ω
C = 5 mF ) XC =
1
j!C
1
j 2Ω
j 100 5 10
= 3
=
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82 j Network Theory
I1 = 1:05 /71:6 A
Figure 1.98
EXAMPLE 1.53
Determine Vo using mesh analysis.
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Figure 1.99
SOLUTION
Figure 1.100
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I1 = 2Ia = 2(I2 − I3 )
I2 = 4 mA
we get, I3 = 2 mA
Then, Vo = 2 × 103 I3
= 4V
EXAMPLE 1.54
Find Vo in the network shown in Fig. 1.101 using mesh analysis.
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Figure 1.101
SOLUTION
Figure 1.102
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84 j Network Theory
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reduction techniques. That is the reason for this topic.
Consider the networks shown in Fig. 1.103 and 1.104.
Figure 1.103 Delta resistance network Figure 1.104 Wye resistance network
It may be noted that resistors in Fig. 1.103 form a Δ (delta), and resistors in Fig.
1.104. form a Υ (Wye). If both these configurations are connected at only the three
terminals a, b and c, it would be very advantageous if an equivalence is established be-
tween them. It is possible to relate the resistances of one network to those of the other
such that their terminal characteristics are the same. The relationship between the two
configurations is called Υ Δ transformation.
We are interested in the relationship between the resistances R1 , R2 and R3 and the
resitances Ra , Rb and Rc . For deriving the relationship, we assume that for the two
networks to be equivalent at each corresponding pair of terminals, it is necessary that
the resistance at the corresponding terminals be equal. That is, for example, resistance
at terminals b and c with a open-circuited must be same for both networks. Hence, by
equating the resistances for each corresponding set of terminals, we get the following set
of equations :
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R2 (R1 + R3 )
) Ra + Rb =
R2 + R1 + R3
(1.57)
R3 (R1 + R2 )
) Rb + Rc =
R3 + R1 + R2
(1.58)
R1 (R2 + R3 )
) Rc + Ra =
R1 + R2 + R3
(1.59)
Rc = (1.62)
R1 + R2 + R3
Hence, each resistor in the Υ network is the product of the resistors in the two adjacent
Δ branches, divided by the sum of the three Δ resistors.
To obtain the conversion formulas for transforming a wye network to an equivalent
delta network, we note from equations (1.60) to (1.62) that
R1 R2 R3 (R1 + R2 + R3 ) R1 R2 R3
Ra Rb + Rb Rc + Rc Ra = = (1.63)
(R1 + R2 + R3 )2 R1 + R2 + R3
Dividing equation (1.63) by each of the equations (1.60) to (1.62) leads to the following
relationships :
Ra Rb + Rb Rc + Ra Rc
R1 = (1.64)
Rb
Ra Rb + Rb Rc + Ra Rc
R2 = (1.65)
Rc
Ra Rb + Rb Rc + Ra Rc
R3 = (1.66)
Ra
Hence each resistor in the Δ network is the sum of all possible products of Υ resistors
taken two at a time, divided by the opposite Υ resistor.
Then Υ and Δ are said to be balanced when
R1= R2 = R3 = RΔ and Ra = Rb = Rc = RΥ
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86 j Network Theory
EXAMPLE 1.55
Find the value of resistance between the terminals a b of the network shown in
Fig. 1.105.
SOLUTION
Let us convert the upper Δ to Υ
(6k)(18k)
Ra 1 = = 3 kΩ
6k + 12k + 18k
(6k)(12k)
Rb1 = = 2 kΩ
6k + 12k + 18k
(12k)(18k)
R c1 = = 6 kΩ
6k + 12k + 18k Figure 1.106
The network shown in Fig. 1.106 is now reduced to that shown in Fig. 1.106(a)
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Figure 1.106(a)
EXAMPLE 1.56
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Find the resistance Rab using Υ Δ transformation.
Figure 1.107
SOLUTION
Figure 1.108
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88 j Network Theory
Let us convert the upper Δ between the points a1 , b1 and c1 into an equivalent Υ.
6 18
Ra 1 = = 3:6Ω
6 + 18 + 6
66
Rb1 = = 1:2Ω
6 + 18 + 6
6 18
R c1 = = 3:6Ω
6 + 18 + 6
Figure 1.108 now becomes
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Figure 1.109
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SOLUTION
Let us convert Υ between the terminals a, b and c into an equivalent Δ.
Ra Rb + Rb Rc + Rc Ra
Rab =
Rc
10 20 + 20 5 + 5 10
= = 70Ω
5
Ra Rb + Rb Rc + Rc Ra
Rbc =
Ra
10 20 + 20 5 + 5 10
= = 35Ω
10
Ra Rb + Rb Rc + Rc Ra
Rca =
Rb
10 20 + 20 5 + 5 10
= = 17:5Ω
20
The circuit diagram of Fig. 1.109 now becomes the circuit diagram shown in Fig.
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1.109(a). Combining three pairs of resistors in parallel, we obtain the circuit diagram of
Fig. 1.109(b).
Figure 1.109(a)
70 30
70jj30 = = 21Ω
70 + 30
12:5 17:5
12:5jj17:5 = = 7:292Ω
12:5 + 17:5
15 35
15jj35 = = 10:5Ω
15 + 35
Rab = (7:292 + 10:5)jj21 = 9:632Ω
vs
Thus; i= = 12:458 A Figure 1.109(b)
Rab
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90 j Network Theory
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methods have limitations. For example, while analysing a transistor circuit, only mesh
method is suited and while analysing an Op-amp circuit, nodal method is only applicable.
Mesh technique is applicable for planar1 networks. However, nodal method suits to both
planar and nonplanar 2 networks.
Reinforcement Problems
R.P 1.1
Find the power dissipated in the 80Ω resistor using mesh analysis.
Figure R.P.1.1
1
A planar network can be drawn on a plane without branches crossing each other.
2
A nonplanar network is one in which crossover is identified and cannot be eliminated by redrawing
the branches.
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SOLUTION
KVL clockwise to mesh 1 :
I3 = 5A
Thus; P80 = 2
I3 R80 = 52 80 = 2000W(dissipated)
R.P 1.2
Refer the circuit shown in Fig. R.P. 1.2. The current io = 4A. Find the power dissipated
in the 70 Ω resistor.
Figure R.P.1.2
SOLUTION
By inspection, we find that the mesh current i3 = io = 4A
KVL clockwise to mesh 1 : 75i1 70i2 5i3 = 180
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92 j Network Theory
i1 = 12A; i2 = 10A
P70 = (i1 i2 )2 70 = 4 70
= 280 W (dissipated)
R.P 1.3
Solve for current I in the circuit of Fig. R.P. 1.3 using nodal analysis.
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Figure R.P.1.3
SOLUTION
KCL at node V1 :
20 / 90
+ 5 /0 = 0
V1 V1 V1 V2
+ +
2 j2 j1
) (0:5 j 0:5)V1 + j V2 = 5 j 10
KCL at node V2 :
5 /0 = 0
V2 V1 V2
+ 2I
j1 4
V1
Also, I=
j2
5 /0 = 0
V2 V1 V2 2
Hence, + + V1
j1 4 j2
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) (0:25 j )V2 = 5
) V2 =
5
0:25 j
Making use of V2 in the nodal equation at node V1 ; we get
j5
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5 j 10
0:25 j
= 0:5(1 j )V1
j 40
) (1 j )V1 = 10 j 20
1 j4
) V1 = 15:81 / 46:5 V
V1 15:81 / 46:5
Hence;
2 / 90
I= =
j2
= 7:906 /43:5 A
R.P 1.4
Find Vo shown in the Fig. R.P. 1.4 using Nodal technique.
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94 j Network Theory
SOLUTION
We find from Fig RP 1.4(a) that,
V1 = Vo
Constraint equation:
Applying KVL clockwise along the path consisting of voltage source, capacitor, and 2Ω
resistor, we find that
12 /0 + V2 V1 = 0
) V1 = V2 + 12 /0
or V2 = V1 12
KCL at Supernode :
V1 V3V1 V2 V2 V3
+ + + =0
j2 2 j4 4
) (2 j 2)V1 + (1 + j )V2 + ( 1 + j 2)V3 = 0
KCL at node 3 :
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j2
V1
+
V3
4
V2
0:2Vo = 0 (1.67)
Substituting Vo = V1 , we get
(0:8 j 2)V1 + V2 + ( 1 + j 2)V3 = 0 (1.68)
Subtracting equation (1.68) from (1.67), we get
1:2V1 + j V2 = 0 (1.69)
Substituting V2 = V1 12 (from the constraint equation), we get
1:2V1 + j (V1 12) = 0
j 12
) V1 =
1:2 + j
= Vo
Hence Vo = 7.68 /50.2 V
R.P 1.5
Solve for i using mesh analysis.
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SOLUTION
The first step in the analysis is to draw the phasor circuit equivalent of Fig. R.P.1.5.
! = 2
10 cos 2t ) 10 /0 V
6 sin 2t = 6 cos(2t 90) ) 6 / 90 = j 6V
L = 2H ) XL = j!L = j 4Ω
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C = 0:25F ) XC =
j!C
1
=
j2
1
= j 2Ω
1
4
10 + (4 j 2)I1 + j 2I2 = 0
) (2 j 1)I1 + j I2 = 5
j 2I1 + (j 4 j 2)I2 + ( j 6) = 0
I1 + I2 = 3
I1 = 2 + j 0:5;
I2 = 1 j 0:5;
Io = I1 I2 = 1 + j = 1:414 /45
Hence io (t) = 1:414 cos (2t + 45 ) A
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96 j Network Theory
R.P 1.6
Refer the circuit shown in Fig. R.P. 1.6. Find I using mesh analysis.
Figure R.P.1.6
SOLUTION
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Figure R.P.1.6(a)
Constraint equation:
I3 I2 = 2I
) I3 I2 = 2(I1 I2 )
) I3 = 2I1 I2
Also, for mesh 4, I4 = 5 A
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I1 = (5:44 + j 4:26) A
I2 = (11:18 + j 9:7) A
I = I1 I2
= 5:735 + j 5:44
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R.P 1.7
Calculate Vo in the circuit of Fig. R.P. 1.7 using the method of source transformation.
SOLUTION
Transform the voltage source to a
current source and obtain the circuit
shown in Fig. R.P.1.7(a).
20 / 90
Is = = 4 / 90 A
5
Figure R.P.1.7(a)
5 (3 + j 4)
Zp = 5Ωjj3 + j 4 = = 2:5 + j 1:25Ω
5 + (3 + j 4)
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98 j Network Theory
Converting the current source in Fig. R.P. 1.7(b) to a voltage source gives the circuit
as shown in Fig. R.P. 1.7(c).
Vs = Is Zp = 4j (2:5 + j 1:25)
=5 j 10V
Vo = 10I
Vs
= 10
Zp + Z2 + 10
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=
5 j 10
[2:5 + j 1:25 + 4 j 13 + 10]
10
= 5.519 / 28 V
R.P 1.8
Find vx and ix in the circuit shown in Fig. R.P. 1.8.
SOLUTION
vx
Constraint equation: i2 i1 = 3 +
4
v3
) i2 = i1 + 3 +
4
The above equation becomes very clear if one writes KCL equation at node B of Fig.
R.P. 1.8(a).
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R.P 1.9
Obtain the node voltages v1 , v2 and v3 for the following circuit.
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SOLUTION
We have a supernode as shown in Fig. R.P. 1.9(a). By inspection, we find that V2 = 12V.
Refer Fig. R.P. 1.9(b) for further analysis.
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Figure R.P.1.9(a) Figure R.P.1.9(b) .
R.P 1.10
Find the equivalent resistance Rab for the circuit shown in Fig. R.P.1.10.
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SOLUTION
The circuit is redrawn marking the nodes c to j in Fig. R.P. 1.10(a). It can be seen that
the network consists of four identical stars :
(i) ae; ef; cb
(ii) ac; cf; cd
(iii) dg; gf; gj
(iv) bh; f h; hj
Converting each stars in to its equivalent delta, the network is redrawn as shown in
Fig. R.P. 1.10(b), noting that each resistance in delta is 100 3 = 300Ω, eliminating
nodes c, e, g , h.
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Reducing the parallel resistors, we get the circuit as in Fig. R.P. 1.10(c).
Figure R.P.1.10(c)
Hence, there are two identical deltas af d and bf j . Converting them to their equivalent
stars, we get the circuit as shown in Fig. R.P.1.10(d).
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300 150
Rak = Rbl = Rkd = Rlj = = 75 Ω
600
1502
Rkf = Rf l = = 37:5 Ω
600
The circuit is further reduced to Fig. R.P. 1.10(e) and then to Fig. R.P. 1.10(f) and
(g). Then the equivalent resistance is
214:286 300
Rab =
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= 125 Ω
R.P 1.11
Obtain the equivalent resistance Rad for the circuit shown in Fig. R.P.1.11.
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SOLUTION
The circuit is redrawn as shown Fig. 1.11(a), marking the nodes a to f to identify the
deltas in it. It contains 3 deltas abc, bde and def with 3 equal resistors of 30 Ω each. For
30
each delta, their equivalent star contains 3 resistors each of value = 10Ω. Then the
3
circuit becomes as shown in Fig. R.P. 1.11(b) where f is isolated.
On simplification, we get the circuit as shown in Fig. R.P.1.11(c) and further reduced
to Fig. R.P.1.11(d).
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Figure R.P.1.11(b) Figure R.P.1.11(c)
Figure R.P.1.11(d)
R.P 1.12
Draw a network for the following mesh equations in matrix form :
2 32 3 2 3
5 + j5 j5 0 I1 30 / 0
6 7 6 7 6 7
4 j5 8 + j8 6 5 4 I2 5 = 4 0 5
0 6 10 I3 20 / 0
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SOLUTION
The general form of the mesh equations in matrix form for a network having three mashes
is given by 2 32 3 2 3
Z11 Z12 Z13 I1 V1 1
6 Z 7
4 21 Z22 Z23 7 6 7 6
5 4 I2 5 = 4 V2 2 5
Z31 Z32 Z33 I3 V3 3
and, Z11 = Z10 + Z12 + Z13
Similiar difenitions hold good for Z22 and Z33 : Also, Zij = Zji
For the present problem,
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Z12 = Z21 = j 5Ω
Z13 = Z31 = 0Ω
Z23 = Z32 = 6Ω
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R.P 1.13
Draw a network for the following nodal equations in matrix form.
2 3
1 1 1 2 3 2 3
6 + 7 Va 10 /0
6 j 10 10 10 74 5 4 5
4 1 1 1 5 Vb = 0
(1 j) +
10 5 10
SOLUTION
The general form of the nodal equations in matrix form for a network having two nodes
is given by
Y11 Y12 V1 I1 1
=
Y21 Y22 V2 I2 2
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Y10 = sum of admittances connected at node 1 alone.
Y12 = Y21 = sum of admittances common to nodes 1 and 2.
Y20 = sum of admittances connected at node 2 alone:
) 1
j 10
+
1
10
= Y10 +
1
10
) Y10 =
1
j 10
S
Similarly; Y22 = Y20 + Y21
) 1
5
(1 j ) +
1
10
= Y20 +
1
10
) 1
Y20 = (1 j ) S
5
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Making use of the above admittances, we can configure a network as shown below :
Exercise problems
E.P 1.1
Refer the circuit shown in Fig. E.P.1.1. Using mesh analysis, find the current delivered
by the source. Verify the result using nodal technique.
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Ans : 5A
E.P 1.2
For the resistive circuit shown in Fig. E.P. 1.2. by using source transformation and mesh
analysis, find the current supplied by the 20 V source.
Ans : 2.125A
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E.P 1.3
Find the voltage v using nodal technique for the circuit shown in Fig. E.P. 1.3.
Ans : v = 5V
E.P 1.4
Refer the network shown in Fig. E.P. 1.4. Find the currents i1 and i2 using nodal analysis.
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Ans : i1 = 1 A, i2 = 1A
E.P 1.5
For the network shown in Fig. E.P. 1.5, find the currents through the resistors R1 and
R2 using nodal technique.
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E.P 1.6
Use the mesh-current method to find the branch currents i1 ; i2 and i3 in the circuit of
Fig. E.P. 1.6.
E.P 1.7
Refer the network shown in Fig. E.P. 1.7. Find the power delivered by the dependent
voltage source in the network.
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E.P 1.8
Find the current Ix using (i) nodal analysis and (ii) mesh analysis.
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E.P 1.9
Determine the current ix in the circuit shown in Fig. E.P. 1.9
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E.P 1.12
Determine the current in the galvanometer branch of the bridge network shown in Fig.
E.P. 1.12.
Ans :
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10.62μA
Figure E.P. 1.12
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