General Description: Quad 2-Input AND Gate

74ABT08
Quad 2-input AND gate

Rev. 4 — 7 October 2020 Product data sheet
1. General description
The 74ABT08 is a quad 2-input AND gate. This device is fully specified for partial power down
applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging
backflow current through the device when it is powered down.
2. Features and benefits

• Supply voltage range from 4.5 V to 5.5 V
• BiCMOS high speed and output drive
• Direct interface with TTL levels
• IOFF circuitry provides partial Power-down mode operation
• Latch-up protection exceeds 500 mA per JESD78B class II level A
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Specified from -40 °C to +85 °C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74ABT08D -40 °C to +85 °C SO14 plastic small outline package; 14 leads; SOT108-1
body width 3.9 mm
74ABT08PW -40 °C to +85 °C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1
body width 4.4 mm
Nexperia 74ABT08
4. Functional diagram
1
& 3
2
4
& 6
1 1A
1Y 3 5
2 1B
4 2A
2Y 6 9
5 2B & 8
9 3A 10
3Y 8
10 3B
A
12 4A 12
4Y 11 & 11 Y
13 4B 13
B
mna222 mna223 mna221
Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram (one gate)
5. Pinning information
5.1. Pinning
74ABT08
1A 1 14 VCC 74ABT08
1B 2 13 4B
1A 1 14 VCC
1Y 3 12 4A 1B 2 13 4B
2A 4 11 4Y 1Y 3 12 4A
2A 4 11 4Y
2B 5 10 3B 2B 5 10 3B
2Y 6 9 3A 2Y 6 9 3A
GND 7 8 3Y
GND 7 8 3Y
aaa-010397 aaa-010398
Fig. 4. Pin configuration SOT108-1 (SO14) Fig. 5. Pin configuration SOT402-1 (TSSOP14)
5.2. Pin description

Table 2. Pin description
Symbol Pin Description
1A, 2A, 3A, 4A 1, 4, 9, 12 data input
1B, 2B, 3B, 4B 2, 5, 10, 13 data input
1Y, 2Y, 3Y, 4Y 3, 6, 8, 11 data output
GND 7 ground (0 V)
VCC 14 supply voltage
74ABT08 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 4 — 7 October 2020 2 / 10

Nexperia 74ABT08
6. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Input Output
nA nB nY
L X L
X L L
H H H
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage -0.5 +7.0 V
VI input voltage [1] -1.2 +7.0 V
VO output voltage output HIGH or LOW [1] -0.5 +5.5 V
IIK input clamping current VI < 0 V -18 - mA
IOK output clamping current VO < 0 V -50 - mA
IO output current output in LOW-state - 40 mA
Tj junction temperature - 150 °C
Tstg storage temperature -65 +150 °C
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
8. Recommended operating conditions

Table 5. Operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 4.5 - 5.5 V
VI input voltage 0 - VCC V
VIH HIGH-level input voltage 2.0 - - V
VIL LOW-level input voltage - - 0.8 V
IOH HIGH-level output current -15 - - mA
IOL LOW-level output current - - 20 mA
Δt/ΔV input transition rise and fall rate 0 - 5 ns/V
Tamb ambient temperature in free air -40 - +85 °C

Nexperia 74ABT08
9. Static characteristics
Table 6. Static characteristics
Symbol Parameter Conditions 25 °C -40 °C to +85 °C Unit
Min Typ Max Min Max
VIK input clamping voltage VCC = 4.5 V; IIK = -18 mA -1.2 -0.9 - -1.2 - V
VOH HIGH-level output VCC = 4.5 V; IOH = -15 mA; 2.5 2.9 - 2.5 - V
voltage VI = VIL or VIH
VOL LOW-level output VCC = 4.5 V; IOL = 20 mA; - 0.35 0.5 - 0.5 V
voltage VI = VIL or VIH
II input leakage current VCC = 5.5 V; VI = GND or 5.5 V - ±0.01 ±1.0 - ±1.0 μA
IOFF power-off leakage VCC = 0 V; VI or VO ≤ 4.5 V - ±5.0 ±100 - ±100 μA
current
ICEX output high leakage HIGH-state; VO = 5.5 V; VCC = 5.5 V; - 5.0 50 - 50 μA
current VI = GND or VCC
IO output current VCC = 5.5 V; VO = 2.5 V [1] -50 -75 -180 -50 -180 mA
ICC supply current VCC = 5.5 V; VI = GND or VCC - 2 50 - 50 μA
ΔICC additional supply per input pin; VCC = 5.5 V; [2] - 0.25 500 - 500 μA
current one input at 3.4 V;
other inputs at VCC or GND
CI input capacitance VI = 0 V or VCC - 3 - - - pF
[1] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
[2] This is the increase in supply current for each input at 3.4 V.
10. Dynamic characteristics

Table 7. Dynamic characteristics
GND = 0 V; for test circuit, see Fig. 7.
Symbol Parameter Conditions 25 °C; VCC = 5.0 V -40 °C to +85 °C; Unit
VCC = 5.0 V ± 0.5 V
Min Typ Max Min Max
tPLH LOW to HIGH nA, nB to nY; see Fig. 6 1.0 2.4 3.4 1.0 4.0 ns
propagation delay
tPHL HIGH to LOW nA, nB to nY; see Fig. 6 1.0 1.9 2.8 1.0 3.0 ns
propagation delay
tsk(o) output skew time [1] - 0.4 0.5 - 0.5 ns
[1] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.

Nexperia 74ABT08
10.1. Waveforms and test circuit

VI
nA, nB input VM
GND
t PHL t PLH
VOH
nY output VM
VOL
mna224
VM = 1.5 V
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 6. Propagation delay input (nA, nB) to output (nY) and output skew time
tW
VI
90 % 90 %
negative
pulse VM VM
10 % 10 %
0V VEXT
tf tr VCC
tr tf RL
VI VO
VI G
90 % 90 % DUT
positive
pulse VM VM
RT CL RL
10 % 10 %
0V
tW
001aai298 mna616
a. Input pulse definition b. Test circuit

Test data is given in Table 8.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 7. Test circuit for measuring switching times
Table 8. Test data

Input Load VEXT
VI fi tW tr, tf CL RL tPHL, tPLH
3.0 V 1 MHz 500 ns ≤ 2.5 ns 50 pF 500 Ω open

Nexperia 74ABT08
11. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
D E A
X
y HE v M A
14 8
Q
A2
(A 3) A
A1
pin 1 index
θ
Lp
1 7 L
e w M detail X
bp
0 2.5 5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ
max.
0.25 1.45 0.49 0.25 8.75 4.0 6.2 1.0 0.7 0.7
mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1
0.10 1.25 0.36 0.19 8.55 3.8 5.8 0.4 0.6 0.3 8
o
o
0.010 0.057 0.019 0.0100 0.35 0.16 0.244 0.039 0.028 0.028 0
inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004
0.004 0.049 0.014 0.0075 0.34 0.15 0.228 0.016 0.024 0.012
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION
99-12-27
SOT108-1 076E06 MS-012
03-02-19
Fig. 8. Package outline SOT108-1 (SO14)

Nexperia 74ABT08
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
D E A
X
y HE v M A
14 8
Q
A2 (A 3 )
A
A1
pin 1 index
θ
Lp
L
1 7
detail X
w M
e bp
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ
max.
mm
0.15 0.95 0.30 0.2 5.1 4.5 6.6 0.75 0.4 0.72 8o
1.1 0.25 0.65 1 0.2 0.13 0.1
0.05 0.80 0.19 0.1 4.9 4.3 6.2 0.50 0.3 0.38 0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION
99-12-27
SOT402-1 MO-153
03-02-18
Fig. 9. Package outline SOT402-1 (TSSOP14)

Nexperia 74ABT08
12. Abbreviations
Table 9. Abbreviations
Acronym Description
BiCMOS Bipolar Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
13. Revision history

Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74ABT08 v.4 20201007 Product data sheet - 74ABT08 v.3
Modifications: • The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
• Section 1 and Section 2 updated.
• Type number 74ABT08DB (SOT337-1 / SSOP14) removed.
Modifications: • Type number 74ABT08N (SOT27-1) removed.
Modifications: • The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
74ABT08 v.1 19950918 Product specification - -

Nexperia 74ABT08
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Nexperia 74ABT08
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................2
5.1. Pinning.........................................................................2
5.2. Pin description............................................................. 2
6. Functional description................................................. 3
7. Limiting values............................................................. 3
8. Recommended operating conditions..........................3
9. Static characteristics....................................................4
10. Dynamic characteristics............................................ 4
10.1. Waveforms and test circuit........................................ 5
11. Package outline.......................................................... 6
12. Abbreviations.............................................................. 8
13. Revision history..........................................................8
14. Legal information........................................................9
© Nexperia B.V. 2020. All rights reserved

For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 7 October 2020

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74ABT08

Quad 2-input AND gate

2. Features and benefits

5.2. Pin description

Product data sheet Rev. 4 — 7 October 2020 2 / 10

8. Recommended operating conditions

Product data sheet Rev. 4 — 7 October 2020 3 / 10

10. Dynamic characteristics

Product data sheet Rev. 4 — 7 October 2020 4 / 10

10.1. Waveforms and test circuit

a. Input pulse definition b. Test circuit

Table 8. Test data

Product data sheet Rev. 4 — 7 October 2020 5 / 10

11. Package outline

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

OUTLINE REFERENCES EUROPEAN

Fig. 8. Package outline SOT108-1 (SO14)

Product data sheet Rev. 4 — 7 October 2020 6 / 10

DIMENSIONS (mm are the original dimensions)

OUTLINE REFERENCES EUROPEAN

Fig. 9. Package outline SOT402-1 (TSSOP14)

Product data sheet Rev. 4 — 7 October 2020 7 / 10

13. Revision history

Product data sheet Rev. 4 — 7 October 2020 8 / 10

Product data sheet Rev. 4 — 7 October 2020 9 / 10

© Nexperia B.V. 2020. All rights reserved

Product data sheet Rev. 4 — 7 October 2020 10 / 10

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