Fds6986S: Dual Notebook Power Supply N-Channel Powertrench Syncfet
Fds6986S: Dual Notebook Power Supply N-Channel Powertrench Syncfet
Fds6986S: Dual Notebook Power Supply N-Channel Powertrench Syncfet
April 2001
FDS6986S
Dual Notebook Power Supply N-Channel PowerTrench SyncFET™
General Description Features
The FDS6986S is designed to replace two single SO-8 • Q2: Optimized to minimize conduction losses
MOSFETs and Schottky diode in synchronous DC:DC Includes SyncFET Schottky body diode
power supplies that provide various peripheral voltages
for notebook computers and other battery powered 7.9A, 30V RDS(on) = 20 mΩ @ VGS = 10V
electronic devices. FDS6986S contains two unique RDS(on) = 28 mΩ @ VGS = 4.5V
30V, N-channel, logic level, PowerTrench MOSFETs
designed to maximize power conversion efficiency. • Q1: Optimized for low switching losses
Low gate charge (6.5 nC typical)
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the low- 6.5A, 30V RDS(on) = 29 mΩ @ VGS = 10V
side switch (Q2) is optimized to reduce conduction
losses. Q2 also includes an integrated Schottky diode RDS(on) = 38 mΩ @ VGS = 4.5V
using Fairchild’s monolithic SyncFET technology.
D2
Q2
D2
D 5 4
/S
1
/S
D
1
D1
D 6 3
D1
D
7 Q1 2
SO-8
G
G 8 1
2
S2
S
G
S
1 2
S1
Pin 1 SO-8 S
/D
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
Dynamic Characteristics
Ciss Input Capacitance VDS = 10 V, VGS = 0 V, Q2 1233 pF
f = 1.0 MHz Q1 695
Coss Output Capacitance Q2 344 pF
Q1 117
Crss Reverse Transfer Capacitance Q2 106 pF
Q1 58
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
50 2.6
VGS = 10V
6.0V VGS = 4.0V
5.0V
40 4.5V 2.2
30 1.8 4.5V
5.0V
4.0V
20 1.4
6.0V
8.0V
1 10V
10
3.5V
0.6
0
0 10 20 30 40 50
0 1 2 3
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
1.9 0.06
ID = 10A ID = 5A
VGS = 10V
0.05
1.6
0.04
1.3
0.03 o
TA = 125 C
1
0.02
o
0.7 TA = 25 C
0.01
0.4
0
-50 -25 0 25 50 75 100 125 150
2 4 6 8 10
o
TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V)
50 10
VGS = 0V
VDS = 5V o
TA = -55 C o
25 C
40 1 o
o TA = 125 C
125 C
o
30 25 C
0.1
o
-55 C
20
0.01
10
0 0.001
10 2000
ID =10A VDS = 5V f = 1MHz
10V VGS = 0 V
8 1600
15V
CISS
6 1200
4 800
COSS
2 400
CRSS
0 0
0 3 6 9 12 15 18 21 0 5 10 15 20 25 30
100 50
RDS(ON) LIMIT
100µs SINGLE PULSE
1ms 40 RθJA = 135°C/W
10 10ms TA = 25°C
100ms
30
1s
1
10s
DC 20
VGS = 10V
0.1 SINGLE PULSE
o
RθJA = 135 C/W 10
o
TA = 25 C
0.01 0
0.1 1 10 100 0.001 0.01 0.1 1 10 100 1000
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
20 2.25
VGS = 10V
DRAIN-SOURCE ON-RESISTANCE
4.5V 2
6.0V 3.5V VGS = 3.0V
ID, DRAIN CURRENT (A)
RDS(ON), NORMALIZED
15 3.0V
1.75
10 1.5
3.5V
1.25 4.5V
5 6.0V
2.5V 1 10V
0.75
0
0 5 10 15 20
0 0.5 1 1.5 2 2.5 3
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
1.8 0.075
DRAIN-SOURCE ON-RESISTANCE
ID = 6.5A ID = 3.3 A
RDS(ON), ON-RESISTANCE (OHM)
1.4 0.055
TA = 125oC
1.2
0.045
1
0.035
TA = 25oC
0.8
0.025
0.6
-50 -25 0 25 50 75 100 125 150 0.015
o 2 4 6 8 10
TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V)
Figure 13. On-Resistance Variation with Figure 14. On-Resistance Variation with
Temperature. Gate-to-Source Voltage.
100
20
VGS = 0V
TA = -55oC
IS, REVERSE DRAIN CURRENT (A)
VDS = 5V o
25 C 10
16
ID, DRAIN CURRENT (A)
125oC TA = 125oC
1
12 25oC
0.1
-55oC
8
0.01
4 0.001
0.0001
0
0 0.2 0.4 0.6 0.8 1 1.2
1.5 2 2.5 3 3.5
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
10 1000
VDS = 5V f = 1MHz
ID = 6.5A
VGS, GATE-SOURCE VOLTAGE (V)
VGS = 0 V
10V
8 800
15V CISS
CAPACITANCE (pF)
6 600
4 400
2 200
COSS
CRSS
0 0
0 3 6 9 12 0 4 8 12 16 20
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
100 50
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
100µs RθJA = 135°C/W
40
ID, DRAIN CURRENT (A)
10 1ms TA = 25°C
RDS(ON) LIMIT
10ms
100ms 30
1 1s
10s
DC 20
VGS = 10V
0.1 SINGLE PULSE
RθJA = 135oC/W 10
TA = 25oC
0.01 0
0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100
VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)
Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum
Power Dissipation.
1
TRANSIENT THERMAL RESISTANCE
D = 0.5
r(t), NORMALIZED EFFECTIVE
TJ - TA = P * RθJA(t)
SINGLE PULSE
Duty Cycle, D = t1 / t2
0.001
0.0001 0.001 0.01 0.1 1 10 100 1000
0.01
0.001
o
0.0001 25 C
3A/DIV
0.00001
0 10 20 30
0V
10nS/DIV
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
Definition of Terms
Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Rev. H1
This datasheet has been download from:
www.datasheetcatalog.com