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Microelectronics

Lesson 3
CMOS Technology
Introduction to CMOS
In 1963, Frank Wanlass patented CMOS while he was working with Fairchild
Semiconductor. The term CMOS stands for complementary metal-oxide semiconductor.
Complementery – combining something to enhance. Combining PMOS and NMOS to
enhance its capabilities when applied to whichever it will be applied for. CMOS
technology is one of the most popular technology in the computer chip design industries
and broadly used today to form integrated circuits in numerous and varied applications.

Logic Families
Before going into more details of CMOS, let us briefly understand what are logic
families. IC is a device that has number of circuits integrated as one entity. Since IC is a
way to simplify the complexity, there are many types of circuit configurations that are used
in the production of integrated circuits.

All these circuit configuration approaches are known as Logic Families. The idea behind
logic families is that different logic functions of a circuit when fabricated as an IC that are
put together using a single approach will have same electrical characteristics.
Pag finabricate na yung different components with different electrical
characteristics nagiging isa nlang yung mga electrical characteristics nila. They
function as one in terms of electrical characteristics.

Some of these characteristics are power dissipation, power supply, speed, noise, etc.
There are many components that has different power dissipation or magkakaiba
yung amount of heat or wasted energy na pinoproduce, may mas konti, may mas
maraming maglabas ng heat pero pag finabricate as IC nagkakaparepareho na sila.
Ganun din sa ibang characteristics like power supply, speed, noise, etc.

As most of the ICs are manufactures using either Bipolar Devices or MOS Devices, the logic
families are also divided into two: The Bipolar families and the MOS families.

Bipolar Logic Families MOS Logic Families

Diode Logic (DL) PMOS Family
Resistor Transistor Logic (RTL) NMOS Family
Diode Transistor Logic (DTL) CMOS Family
Transistor Transistor Logic (TTL)
Emitter Coupled Logic (ECL)
Integrated Injection Logic (IIL)
Since our topic is about CMOS Technology we will dig deeper in MOS Logic Families

MOS
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Metal-oxide semiconductor is the basic element in the design of a large scale integration IC
and it is a voltage controlled device. MOS transistor consists of three (3) regions: source,
drain, and gate.

PMOS and NMOS

Before the extensive use of CMOS Technology for implementing logic gates and in
fabrication of ICs, PMOS and NMOS logic were widely used. In fact, the Intel 4004 and the
initial version of Intel 8008 are fabricated using PMOS technology.

PMOS was later replaced by the NMOS technology, which is one of the widely used IC
Fabrication technologies (before CMOS). Initially, even CMOS was slower and expensive
than NMOS.

NMOS became the “standard process” for integrated circuits. The main advantages of NMOS
technology are simple physical process, high functional density, good speed (initially
faster than CMOS) and easier to manufacture.

The main drawbacks of NMOS technology are its electrical asymmetry and static power
dissipation. All these drawbacks are minimized by the CMOS Technology.

CMOS Technology
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The CMOS Technology uses both NMOS and PMOS to realize various logic functions. Both
the N-channel MOSFET and the P-channel MOSFET are design in such a way that they have
matching characteristics (during ON and OFF state).

The main advantages of CMOS technology over Bipolar or the previous popular NMOS
technologies is its extremely low power consumption in static conditions as they draw
power only during switching operation.

This allows integrating much larger number of logic gates on the VLSI IC when compared to
Bipolar or NMOS technologies.

Today, CMOS technology is the dominant IC fabrication technology in VLSI industry and is
used for making high end microprocessors, microcontroller, memory modules, sensors and
ASICs. Yung mga MP, MC, Memory natin today is made of CMOS technology

The combination of NMOS and PMOS devices in a CMOS logic makes it easier to design
different logic functions. With the improvements in CMOS IC fabrication technologies, the
size of the transistor can be scaled down in size.

Downscaling the size of the transistor implies that more logical functions can be integrated
into the same IC without compromising the speed and power.

Initially, the CMOS IC Technology was used in the fabrication of Digital Logic ICs. The
development towards low cost and increased functionality has led to CMOS technology
being used in Analog ICs and Mixed Signal Designs.

CMOS Logic
Static CMOS circuits consists of combinational logic gates with one or more inputs and one
output. Let us see a few important CMOS Logic gates.

 Inverter
The simplest of the logic gates is the Inverter. It is an essential part of digital design
and understanding the operation and properties of an Inverter will make it
significantly easier to study NAND Gates, Adders, Multiplexers and even
Microprocessors.

Following is the circuit of a CMOS Inverter Gate along with its symbols.
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CMOS Inverter is also known as the NOT Gate. From the above circuit, you can see
that a CMOS Inverter consists of an N-channel MOSFET (NMOS) and a P-channel
MOSFET (PMOS).

When the input A is LOW i.e. Logic 0, the NMOS Transistor is OFF and the PMOS
Transistor is ON. The P-channel MOSFET provides a path for the V DD to appear at the
Output. Hence, the output is HIGH i.e. Logic 1.

Similarly, when the input is HIGH, NMOS is ON and PMOS is OFF. The output is
connected to GND and the output is LOW.

 NAND
The following circuit shows a 2-input CMOS NAND Gate. As seen in the image, a 2-
input NAND gate consists of two N-channel MOSFETs connected in series between
output and GND and two P-channel MOSFETs connect in parallel between V DD and
output.

When any of the inputs A or B is LOW, atleast one of the NMOS Transistors will be
OFF. For the output to be LOW, both the inputs should be HIGH. For all the other
combinations of the inputs, the output will be HIGH.
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Based on the same principle as a 2-input NAND gate, a 3-input CMOS NAND Gate can
be designed, where there are 3 NMOS Transistors in series between output and GND
and 3 PMOS Transistors in parallel between VDD and output.

 NOR
Circuit of a 2-input CMOS NOR Gate is shown below. It consists of two P-channel
MOSFETs connected in series between V DD and Output and two N-channel MOSFETs
connected in parallel between Output and GND.

When either of the inputs A or B is HIGH, the output is LOW as atleast one NMOS
Transistor is ON. For the output to be HIGH, both the inputs must be LOW.

Similar to the 3-input NAND gate, a 3-input NOR gate can also be designed as shown
in the following circuits.
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Principle behind CMOS Logic

The name complementary in CMOS refers to the fact that
both NMOS and PMOS Transistors are used in the same
design. The main principle behind a CMOS logic gate is
that the NMOS Transistors act as Pull-down network to
connect Output to GND and the PMOS Transistors act as
Pull-up network to connect VDD to Output.

CMOS logic is arranged in such a way that only one of the

pull-up or pull-down networks is ON while the other is
OFF with the help of a single input.

CMOS IC Processing Design and Layout

The CMOS circuit design process consists of
defining circuit inputs and outputs, hand
calculations, circuit simulations, circuit layout,
simulations including parasitics, reevaluation of
circuit inputs and outputs, fabrication, and
testing. A flowchart of this process is shown.

The circuit specifications are rarely set in

concrete; that is, they can change as the project
matures. This can be the result of trade-offs
made between cost and performance, changes in
the marketability of the chip, or simply changes
in the customer's needs. In almost all cases,
major changes after the chip has gone into
production are not possible. This text
concentrates on custom IC design. Other
(noncustom) methods of designing chips,
including field-programmable-gate-arrays and
standard cell libraries, are used when low
volume and quick design turnaround are
important. Most chips that are mass produced,
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including microprocessors and memory, are examples of chips that are custom designed.
The task of laying out the IC is often given to a layout designer. However, it is extremely
important that the engineer can lay out a chip (and can provide direction to the layout
designer on how to layout a chip) and understand the parasitics involved in the layout.
Parasitics are the stray capacitances, inductances, pn junctions, and bipolar transistors,
with the associated problems (breakdown, stored charge, latch-up, etc.). A fundamental
understanding of these problems is important in precision/high-speed design.