Tutorial CH 3
Tutorial CH 3
Tutorial CH 3
Fig.1
Solution:
Therefore C=15
Fig.1(b)
2. Obtain the output voltage of an op-amp summer shown in Fig.2
Fig.2
Solution:
3. Obtain the value of resistor R for the condition that both inputs V− and V+ should be amplified
by the same amount in Fig.3
Fig.3
Solution:
4. Obtain the voltage vo for the circuit of Fig.4.Calculate the gain if R1= R2= R3= 1K Ω and
R4=10Ω.
Fig.4
This illustrates that using only few kilo ohm resistances in the form of T-network
provides very large feedback resistance resulting into very large gain.
5. How much is the output voltage in the circuit of Fig. 5
Fig. 5
Solution:
Writing node equation at the inverting input terminal of the op-amp results as
The time at wich the vo = −15
Solution:
2. For the instrumentation amplifier shown in Fig. 15.101, using two ideal op-amps
verify the following equation
Solution:
From Fig. 15.102
3. Show that the cross coupled differential voltage follower instrumentation amplifier
shown in Fig. 15.102 produces output voltage vo = (1 + a + b) (v2 − v1).
Solution:
This illustrates that using only few kilo ohm resistances in the form of T-network
provides very large feedback resistance resulting into very large gain.
Solution:
Solution:
Solution:
Solution:
This input resistance comes in parallel to the op-amp's internal input resistance Ri.
10. For the dc level shifter circuit shown in Fig. 15.108(a), determine the level shift
between input and output voltages.
Solution:
Solution:
12. Draw the output wave shapes of the voltage follower using op-amp with 1 V/ms slew
rate with the square wave input shown in Fig. 15.109(a).
Solution:
It is seen from the wave shapes of vo that remarkable distortion occurs for slew rate
at high frequency. Fig. 15.109(b) is100 Hz signal that does not produce appreciable
distortion. A 10 kHz signal produces appreciable distortion as shown in Fig.
15.109(c). A 1 MHz signal becomes sawtooth wave as in Fig. 15.109(c).
13. A square wave input of 8 V peak to peak magnitude and frequency 2 MHz is applied
to a voltage follower which produces the triangular output as shown in Fig. 15.110.
What is its slew rate?
Solution:
Figure 15.110. Figure 15.110
14. The 741 op-amp is used as an inverting amplifier with its gain = 50. What would be
the maximum input signal magnitude applied to it if its voltage gain is flat upto 100
kHz?
Solution:
The maximum input signal to get undistorted output should be = 15.9 mV.
15. A peak to peak input signal of 500 mV has to produce a peak to peak undistorted
output voltage of 3 V with a rise time of 4 ms. Can 741 be used for such application?
Solution:
16. The characteristic of the diode is given by the relationship as ID = IS(eqV/ηKT – 1),
where V is the forward voltage and η is the ideality factor = 1 (Ge) and 2 (Si).
Express Vo as a function of Vi. What is the value of input voltage to result in output
Solution:
(a) When the switch changes from B to Af times per second, the charge
transferred to the capacitor C1 = Qf = C1Vf. The capacitor charges
exponentially, but the time constant of charging is zero and hence capacitor
charges instantaneously.
(b)
(c)
Equating dVo yields as ,
The integration of the steady input voltage gives ramp (rate of change)
voltage.
(d)
18. Show that the circuit in Fig. 15.113 simulates an inductance across its input
terminals.
Solution:
When input is changing from −12 V to +12 V, the capacitor gets charged to the
maximum voltage exponentially with the time constant = 12 K × 0.1 × 10−6 = 1.2
ms. In order to find out the time taken by the capacitor to reach final value = 12 V,
19. Draw the waveform of vo(t) as function of vi. Specifying the output voltage vo(t),
determine the voltage levels and time constants involved.
As the capacitor gets charged from −12 V to slightly above 0 V, the output amplifier
gets saturated.
When the capacitor is charged to +12 V, the capacitor starts discharging through
saturated transistor with a time constant = 100 × 0.1 × 10−6 = 0.01 ms
20. Show that circuit of Fig. 15.115 simulates an inductor i.e. is inductive.
Solution:
21. How much is the output voltage in the circuit of Fig. 15.116.
Solution:
Writing node equation at the inverting input terminal of the op-amp results as
22. Obtain the value of resistor R for the condition that both inputs V− and V+ should be
amplified by the same amount in Fig. 15.117.
23. Derive a relationship between the input and output voltages for the circuit shown
in Fig. 15.118. Also obtain the output waveform for a symmetrical square wave
input voltage of amplitude Vp and frequency f.
Solution:
If the input voltage is square wave, the output voltage is a triangular wave of
magnitude ±VP and frequency f.
24. Find out the value of two resistors used in a non-inverting op-amp to result in the
voltage gain of 21 dB.
Solution:
25. Obtain the transfer function between input and output voltages of Fig. 15.119.
What will be the value of the capacitor required to yield a phaseshift of 270° at a
frequency of 1 kHz with R = 10 K?
Solution:
The plots of magnitude and phase shift are shown in Fig. 15.120.
Solution:
The plots of its magnitude and phase-shift are shown in Fig. 15.122.
27. What value of the resistance RB will provide balance of the bridge yielding Vo = 0
for RA = RC = RD = 1 KΩ. What will be the value of output voltage, if now RB is set to
0.5 K?
Solution:
28. Sketch the waveform of the output voltage for the circuit of Fig. 15.124. What
portion of the current io coming out from the operational amplifier flow as the load
current iL?
Solution:
29. Determine the output voltage vo for the circuit shown in Fig. 15.125.
30. Show that the system shown in Fig. 15.126 is a double integrator. In other words,
Solution:
31. Obtain the voltage transfer function between output and input voltages of Fig.
15.127. When switch is open, the opamp does not draw any current and hence I2 =
0.
Solution:
When the switch is closed, the non-inverting input terminal is pulled to ground and
hence its gain
32. Obtain voltage gain under the control of voltage applied at the gate of the JFET
in Fig. 15.128. When control signal = 0, the JFET offers minimum drain resistance
and hence non-inverting input terminal is pulled to approximately ground.
Thus, .
Solution:
When the control signal is high, it reduces the channel width and provides very large
resistance to provide open circuit, thus V1 = V2 =Vi.
33. Find the condition of input voltage for making the LED ON in Fig. 15.129.
Solution:
Hence, LED will glow if Vi > 5 V.
34. What will be the value of input voltage Vi such that the LED in Fig. 15.130 starts
glowing.
35. An op-amp with a slew rate of 1.5 V/ms has been used as an inverting amplifier with
gain of 10. What is the maximum input signal if the frequency of input signal is 1
kHz?
38. The switch was closed initially for 0.5 minutes and then opened. What will be the
input voltage if the output in Fig. 15.133 is initially 0 and −5.4 V after the switch is
opened.
39. A differential amplifier converted to difference amplifier has feedback and input
resistor of equal values as in Fig. 15.134. What will be the output, if inputs to
inverting and non-inverting terminals are 1.5sin ωt and 1.5 cos ωt.
Solution:
Solution:
42. The offset voltage to the circuit of Fig. 15.137 is 1 mV. How much output voltage
will be displayed?
Solution:
43. What would be the frequency of oscillation in Fig. 15.138, if μF and R = 1 K?
What would be the minimum gain of the amplifier to sustain oscillations?
44. Calculate the ratio of ON duration to OFF duration of the output waveform of circuit
in Fig. 15.139.
46. Obtain the output voltage of the amplifier shown in Fig. 15.141
47. The output voltage of Schmitt trigger drawn in Fig. 15.142 is limited to 10 V and −5
V connecting suitably chosen Zener diodes across the output. What are the upper
trip and lower trip voltages of the circuit?
Solution:
49. Obtain the output voltage of Fig. 15.144. What is the name of this circuit?
Solution:
For Vi < 0, D1 is reverse biased and D2 is forward biased, . The circuit is a half
wave rectifier and conducts for negative half cycle only.
53. Show that in Fig. 15.148 assuming all op-amps are ideal. Also show
that D represents a frequency dependent negative resistance.
The circuit of Fig. 15.148 can now be analyzed for its input impedance as
= negative conductance.
54. Find out the output voltage vo for the circuit in Fig. 15.149.
Figure 15.149. Figure 15.149
55. Obtain the output voltage of an op-amp summer shown in Fig. 15.150.
Output Waveform
Design
The required frequency of oscillation fo=1kHz
we have,