Project

An Inductive Hybrid UPQC for Power Quality Management in Premium-
Power-Supply- Required Applications
AN INDUCTIVE HYBRID UPQC FOR POWER QUALITY

MANAGEMENT IN PREMIUM- POWER-SUPPLY- REQUIRED
APPLICATIONS
A Thesis
Submitted in partial fulfillment of the
Requirements for the award of the Degree of
BACHELOR OF TECHNOLOGY
in
ELECTRICAL & ELECTRONICS ENGINEERING
By
Y. PRADEEP REDDY (18705A0220)
G. PAVAN KALYAN (18705A0219)
K. RAJESH REDDY (18705A0225)
HR. DATTA KIRAN (18705A0207)
Under the esteemed guidance of

Dr.B.Madhusudhan Reddy,M.Tech,Ph.d
Assistant professor
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

ANNAMACHARYA INSTITUTE OF TECHNOLOGY AND SCIENCES, RAJAMPET
(An Autonomous Institution)
Approved by AICTE, NEWDELHI & Affiliated to J.N.T.U, Anantapur.
Accredited by NAAC of UGC, BANGALORE.
Rajampet, Kadapa (Dist), A.P-516126.
2018-2019
Dept. of electrical Engineering, AITS, RJPT 1

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

ANNAMACHARYA INSTITUTE OF TECHNOLOGY AND SCIENCES
(An Autonomous Institution)
Approved by AICTE, NEWDELHI & Affiliated to J.N.T.U, Anantapur.
Accredited by NAAC of UGC, BANGALORE.
Rajampet, Kadapa (Dist), A.P-516126.
CERTIFICATE
Certified that this is a bonafide record of the dissertation work entitled, “ AN INDUCTIVE
HYBRID UPQC FOR POWER QUALITY MANAGEMENT ”, done by

XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX bearing Admn. No:XXXXXsubmitted
to the faculty of Electrical Engineering, in partial fulfillment of the requirements for the
Degree of BACHELOR OF TECHNOLOGY with specialization in ELECTRICAL
&ELECTRONICS ENGINEERINGfrom Annamacharya Institute of Technology and
Sciences, Rajampet.
Signature of the Supervisor Signature of the Head of the Department

Dr.B.Madhusudhan Reddy,M.Tech,Ph.d Dr. M. Padma Lalitha, M.Tech,
Ph.D,
Assistant professor Professor and Head of theDepartment

CERTIFICATE OF EXAMINATION
This is to certify that I had examined the concept and hereby accord, my approval of
it as a project carried out and presented in a manner required for its acceptance in partial
fulfillment for the award of Degree of BACHELOR OF TECHNOLOGY in
ELECTRICAL & ELECTRONICS ENGINEERING for which it has been submitted.
This approval does not necessarily endorse every statement made, conclusion drawn as
recorded in report, and it only signifies the acceptance of report for the purpose for which it is
submitted.
EXTERNAL VIVA VOCE EXAMINATION HELD ON_________________
INTERNAL EXAMINER EXTERNAL EXAMINER

ACKNOWLEDGEMENT
The needs and deeds of a person are only achieved with the effective advises and
suggestions, here I take this opportunity to express thanks to some of them.
I express my heartful thanks to my guide, Mr.B.MADHUSUDHAN REDDY, Assistant
professor, Department of E.E.E, Annamacharya Institute of Technology and Sciences,
Rajampet, for his/her close observations and valuable guidance during my project work,
without which I couldn’t have completed the project work successfully.
My special thanks to Dr. M. Padma Lalitha, M.Tech, Ph.D, Professor and Head of the
Department, Department of E.E.E, Annamacharya Institute of Technology and Sciences,
Rajampet, during the progress of project work, for her timely suggestions in spite of her busy
schedule.
I wish to express my sincere gratefulness to Dr.S.M.V. Narayana, Principal, Annamacharya
Institute of Technology and Sciences, Rajampet for his continuous cooperation to complete
the project work.
I indebted to the Management of Annamacharya Institute of Technology and Sciences,
Rajampet for providing an opportunity with excellent academic, infrastructure facilities to
carry out my Post Graduate Project successful.
And I would like to express my sincere thanks to Faculty members of E.E.E Department,
Lab Technicians and Friends, one and all who has helped me directly or indirectly in
successful completion of the project.
As a gesture of respect for my family members and for the support I received from them, I
dedicate this work to them.
Finally, I thank GOD for giving me everything I needed to carry out the project with
my complete effort.
PROJECT ASSOCIATES
1. Y. PRADEEP REDDY (18705A0220)
2. G. PAVAN KALYAN (18705A0219)
3. K. RAJESH REDDY (18705A0225)
4. HR. DATTA KIRAN (18705A0207)

AN INDUCTIVE HYBRID UPQC FOR POWER QUALITY MANAGEMENT IN

PREMIUM- POWER-SUPPLY- REQUIRED APPLICATIONS
ABSTRACT:
Voltage sag and harmonic pollution have a serious impact on the medium-voltage premium
power- supply-required park represented by optical semiconductors, data storage, precision
instruments and biopharmaceuticals. Which makes existing equipment require higher voltage
capacity of power electronics, higher economic cost and compensation performance. In this
paper, an Inductive Hybrid Unified Power Quality Conditioner (IH-UPQC), which is
characterized as high integration, reduced DC-link voltage and satisfactory harmonic
isolation of transformer, is presented to realize the bi-directional power quality improvement
for medium-voltage premium-power-supply-required park. First, the three-phase equivalent
circuit and mathematical model are established to reveal the mechanism of harmonic
suppression and voltage regulation. Based on the theoretical analysis, the compound control
strategy of series and shunt Hybrid Active Power Filter (HAPF) as well as the synchronous
method sliding Goertzel discrete Fourier transformation-pre-filtering Phase Lock Loop (PLL)
are designed. Then, the main circuit components design including Double Resonant Passive
Filter (DRPF), L-C-R low pass filter and the special designed filtering winding for
implementing inductive filtering method are described. Finally, the performance of IHUPQC
is validated in 10kV distribution network by MATLAB/Simulink. The simulation results
demonstrate that the IH-UPQC is effective to perform grid voltage regulation, load harmonic
current suppression and reactive power compensation.
Keywords: Inductive filtering method, Unified Power Quality Conditioner (UPQC), Double
Resonant Passive Filter (DRPF), Neutral Point Converter (NPC), Synchronous Reference
Frame (SRF), Hybrid Active Power Filter (HAPF), Power Quality (PQ), Phase Lock Loop
(PLL).

CONTENTS
SL.NO Name of the Chapter Page
No
1. INTRODUCTION 5
1.1. LITERATURE 7
1.2. EXISTING METHOD 11
2. IH-TOPOLOGY(PROPOSED MODEL) 12
2.1. FLEXIBLE AC TRANSMISSION SYSTEM (FACTS) 14
2.2. UNIFIED POWER QUALITY CONDITIONER(UPQC) 15
2.2.1. TYPES OF CONVERTERS USED IN UPQC 16
2.2.2. SUPPLY SYSTEM AND LOAD SYSTEM 17
3. IH-UPQC OPERATING PRINCIPLE 25
3.1. EQUIVALENT CIRCUIT MODEL 25
3.2. HORMONIC CURRENT COMPENSATION MECHANISM 25
3.3. VOLTAGE COMPENSATION MECHANISM 27
4. SRF-BASED COMPOUND CONTROL 29
4.1. SGDFT-PRE-FILTERING PLL 29
4.2. COMPOUND CONTROL SCHEME FOR SHUNT HAPF 30
4.3. COMPOUND CONTROL SCHEME FOR SERIES HAPF 32
5. MAIN CIRCUIT COMPONENTS DESIGN 34
5.1. ZERO IMPEDANCE DESIGN OF FILTERING WINDING 34
5.2. DRPF DESIGN FOR SHUNT HAPF 35
5.3. LCR- LPF DESIGN FOR SERIES APF 37
6. PHASE LOCKED LOOP(PLL) 38
6.1. PI-CONTROLLER 44
7. ADVANTAGES AND DISADVANTAGES 46
8. SOFTWARE REQUIREMENTS 46
9. SIMULATION STUDY 47
CONCLUSION 52

FUTURE SCOPE 52
REFRENCES 53
LIST OF FIGURES
FlG . NO Name of the Figure
PageNO
1.1 DIFFERENT UPQC WIRING SCHEME IN NETWORK 10
1.2 TRADITIONAL UPQC LOCATED AT GRID SIDE 14
1.3 TRADITIONAL UPQC LOCATED AT NL/REG SIDE 14
2.1 BASIC SYSTEM CONFIGURATION OF THE IH-UPQC 16
2.2 THE EQUIVALENT CIRCUIT OF BASIC SYSTEM 16
2.3 NEUTRAL POINT CONVERTER 22
4.1 BLOCK DAIGRAM OF SGDFT-PRE-FILTERING PLL 32
4.2 REALIZATION DAIGRAM OF SHUNT HAPF 33
4.2 CONTROL DIAGRAM OF SHUNT HAPF 34
4.4 DETAIL DIAGRAM OF CBPWM 35
4.5 CONTROL DIAGRAM OF SERIES APF 36
5.1 WINDING ARRANGEMENT IN SECTIONAL VIEW 38
5.2 BODE PLOT OF Z(S) 38
6.1 BLOCK DIAGRAM OF PLL 41
6.2 EXCLUSIVE OR PHASE DETECTOR 42
6.3 EXCLUSIVE OR PHASE DETECTOR WAVEFORM 42
6.4 BLOCK DIAGRAM OF PLL 45
7.1 HORMONIC COMPENSATION OF GRID VOLTAGE &LOAD 49
CURRENT
7.2 GRID CURRENT OF THD 50

7.3 LOAD CURRENT OF THD 50
7.4 VOLTAGE SAG COMPENSATION 51
7.5 VOLTAGE SWELL COMPENSATION 52
7.6 DYNAMIC PERFORMANCE OF THE IH-UPQC UNDER

SUDDEN LOAD CHANGE 53

7.7 POWER WAVEFORM OF GRID AND LOAD 54

7.8 COMPARISION RESULTS UNDER SUDDEN LOAD CHANGE 55
7.9 COMPARISION RESULT OF REACTIVE POWER
COMPENSATION 56
CHAPTER-1
INTRODUCTION
Currently, the extensive use of Nonlinear Load (NL) and increasing penetration of
Renewable Energy Generation (REG) make the medium-voltage premium-power-
supplyrequired park highly vulnerable to Power Quality (PQ) problems. As the key
component of NL and REG, power electronic devices are the most responsible ones for
abnormal harmonic currents and reactive demand in distribution network, whereas they also
require ideal supply voltage for proper operation. The Unified Power Quality Conditioner
(UPQC) can not only compensate harmonics and reactive power, but also ensure a regulated
load voltage, which makes it the most attractive compensator at distribution network level [1-
6].
Generally, the traditional UPQC is installed at grid side or NL/REG side, different UPQC
wiring schemes in distribution network are shown in Fig.1. In Fig.1 (a), the UPQC is
installed at grid side and the NL/REG interfaces with grid via a special transformer.
Assuming that the grid voltage and load current are distorted, by analyzing the harmonic
flowing path in Fig.1 (a), it can be found that the load harmonic current flows into the special
transformer and then induces harmonic leakage flux in transformer, which inevitably causes a
series of problems to the transformer, such as additional iron and copper losses, noise,
vibration and temperature rise, etc. For this typical wiring scheme, the UPQC is effective in
isolating harmonics away from public grid and maintaining a regulated load voltage, but it
cannot mitigate the negative effects of harmonics on the transformer. In Fig.1 (b), the UPQC
is installed at NL/REG side. The special transformer still has to suffer all the distorted
voltages, which definitely introduces harmonic leakage flux in the transformer. More
importantly, when UPQC is directly parallel with the converter-based REG, it may results in
stability problem according to the Extra Element Theorem of R. D. Middlebrook [7].
UPQC systems can perform, simultaneously, the series– parallel active power-line
compensation by using both series and parallel Active Power Filters (APFs) [8]. The practical
implementation of a 3P4W distribution system based on UPQC topology is presented in [9],

which can be connected either in 3P3W or in 3P4W distribution power systems, to perform
active power-line conditioning by dual compensating strategy implementation, while it only
suitable for low voltage system. In [10], a simplified control technique for a dual three-phase
topology of a unified power quality conditioner is proposed, which has the series filter
controlled as a sinusoidal current source and the shunt filter controlled as a sinusoidal voltage
source and can deal with a well-known frequency spectrum, while it cannot inherit traditional
UPQC shown in Fig.1 (a) and Fig.1 (b). Literature [11] proposes a new reduced switch
UPQC system topology that comprises of ten switches to reduce the overall switch count of
the back-to-back UPQC system while retaining its operational features without any
performance tradeoff, while the two shared switches bear much switching loss. To reduce the
devices voltage requirements, literature [12] presents a topology that has a reduced DC-link
voltage without compromising its compensation capability and helps to match the DC-link
voltage requirement of the shunt and series active filters of the UPQC, it also can be applied
to higher voltage situation. To enhance the power quality in the medium/high voltage
distribution power systems and reduce the devices voltage requirements, a single-phase
UPQC based on the M3C is presented in [13], while it increases control complexity for
digital implementation. L. B. G. Campanhol etl. [14], [15] proposes a single-stage three-
phase four-wire gridconnected Photo Voltaic (PV) system operating with a dual
compensating strategy and feed forward control loop, the three level Neutral Point Converter
(NPC) power circuit gives lower economic cost and better output performance, while this
system may results in stability problem between loads and PV system.
Inductive Power Filtering (IPF) method proposed by Li and Luo can mitigate the negative
effects of harmonics on the transformer and achieve harmonic suppression near the harmonic
sources [16, 17]. The original IPF method adopts a set of single tuned filters to compensate
harmonics, but the performance of these passive filters is limited. In fact, harmonic
suppression conducted by inductive filtering method has been effectively addressed, but very
few of these researches have been undertaken for simultaneous voltage regulation.
Unlike the aforementioned UPQC wiring schemes, this article presents an Inductive Hybrid
UPQC (IH-UPQC) shown in Fig.1 (c), which is characterized as high integration, reduced
DC-link voltage and satisfactory harmonic isolation of transformer for medium-voltage
premium-power-supply-required park. The IH-UPQC integrates the shunt Hybrid Active
Power Filter (HAPF) with the Inductive Filtering Transformer (IFT) to implement the

inductive filtering method for mitigating the negative effects of harmonics on the
transformer. Moreover, the IH-UPQC has a natural advantage of damping resonance due to
the isolation characteristic of transformer.
The rest of the article is organized as follows. Section II proposes the IH-UPQC topology.
Section III establishes the equivalent circuit and mathematical mode. Section IV gives
Sliding Goertzel Discrete Fourier Transformation (SGDFT)-based Phase Lock Loop (PLL),
the series APF and shunt HAPF digital control method. Section V. describes the main circuit
components design method. The detailed simulation cases in 10kV distribution network are
conducted in Section VI. Finally, the conclusion is given in Section VII.
FIGURE 1. 1.Different UPQC wiring schemes in distribution network. (a) Traditional UPQC
located at grid side, (b) Traditional UPQC located at NL/REG side, (c) IH-UPQC topology
1.1. LITERATURE SURVEY:
E. Hossain, M. R. Tür, S. Padmanaban, S. Ay and I. Khan are proposed to discusses the
power quality issues for distributed generation systems based on renewable energy sources,
such as solar and wind energy. A thorough discussion about the power quality issues is
conducted here. This paper starts with the power quality issues, followed by discussions of

basic standards. A comprehensive study of power quality in power systems, including the
systems with dc and renewable sources is done in this paper. Power quality monitoring
techniques and possible solutions of the power quality issues for the power systems are
elaborately studied. Then, we analyze the methods of mitigation of these problems using
custom power devices, such as D-STATCOM, UPQC, UPS, TVSS, DVR, etc., for micro grid
systems. For renewable energy systems, STATCOM can be a potential choice due to its
several advantages, whereas spinning reserve can enhance the power quality in traditional
systems. At Last, we study the power quality in dc systems. Simpler arrangement and higher
reliability are two main advantages of the dc systems though it faces other power quality
issues, such as instability and poor detection of faults.
B. B. Ambati and V. Khadkikar, are proposed to introduces an optimum method to design a
unified power-quality conditioner (UPQC) system with the minimum possible VA rating
based on the compensation requirements. A set of generalized VA loading equations for the
UPQC is derived, which are valid for all of the UPQC control approaches (such as UPQC-P,
UPQC-Q, and UPQC-VA min ). The variation in series and shunt inverters VA loadings of
UPQC for the given compensation requirements is analyzed for all existing control
approaches. A novel design method and the corresponding algorithm are proposed to size the
major components in an UPQC, such as the series inverter, shunt inverter, and series
transformer corresponding to the minimum possible overall VA rating. The VA rating and
the utilization of power-electronic converters using the proposed design method are
compared with those of UPQC-P, and UPQC-VAmin approaches to show the effectiveness
of the proposed design method.
S. K. Khadem, M. Basu and M. F. Conlon are proposed to the placement, integration, and
control of unified power quality conditioner (UPQC) in distributed generation (DG)-based
grid connected/autonomous microgrid/microgeneration (μG) system has been presented here.
The DG converters (with storage) and the shunt part of the UPQC Active Power Filter (APF
sh ) is placed at the Point of Common Coupling (PCC). The series part of the UPQC (APF
se ) is connected before the PCC and in series with the grid. The dc link can also be
integrated with the storage system. An intelligent islanding detection and reconnection
technique (IR) are introduced in the UPQC as a secondary control. Hence, it is termed as
UPQC μG-IR . The advantages of the proposed UPQC μG-IR over the normal UPQC are to
compensate voltage interruption in addition to voltage sag/swell, harmonic, and reactive

power compensation in the interconnected mode. During the interconnected and islanded
mode, DG converter with storage will supply the active power only and the shunt part of the
UPQC will compensate the reactive and harmonic power of the load. It also offers the DG
converter to remain connected during the voltage disturbance including phase jump.
Y. Lu, G. Xiao, X. Wang, F. Blaabjerg and D. Lu, are proposed to The unified power
quality conditioner (UPQC) is known as an effective compensation device to improve PQ for
sensitive end-users. This paper investigates the operation and control of a single-phase three-
leg UPQC (TL-UPQC), where a novel space vector modulation method is proposed for
naturally solving the coupling problem introduced by the common switching leg. The
modulation method is similar to the well-known space vector modulation widely used with
three-phase voltage source converters, which thus brings extra flexibility to the TL-UPQC
system. Two optimized modulation modes with either reduced switching loss or harmonic
distortion are derived, evaluated, and discussed, in order to demonstrate the flexibility
brought by the space vector modulated TL-UPQC. Simulations and experimental results are
presented to verify the feasibility and effectiveness of the proposed space vector modulation
approach as well as two mentioned modulation modes.
S. Devassy and B. Singh, are proposed to proposes a modified p-q theory based control of
solar photovoltaic array integrated unified power quality conditioner (PV-UPQC-S). The
fundamental frequency positive sequence (FFPS) voltages are extracted using generalized
cascaded delay signal cancellation (GCDSC) which is used in p-q theory based control to
generate reference grid currents for the shunt compensator. The solar PV (SPV) array
integrated at the DC-bus of the UPQC, provides a part of active load power. The series VSC
operates such that it shares a part of the reactive power of the load even under nominal grid
conditions. The dynamic performance of proposed system is verified by simulating it in
Matlab-Simulink using a combination of linear and non-linear load.
Bruno W. França, Leonardo F. da Silva, Maynara A. Aredes, et al: presents an improved
controller for the dual topology of the unified power quality conditioner (iUPQC) extending
its applicability in power-quality compensation, as well as in microgrid applications. By
using this controller, beyond the conventional UPQC power quality features, including
voltage sag/swell compensation, the iUPQC will also provide reactive power support to
regulate not only the load-bus voltage but also the voltage at the grid-side bus. In other
words, the iUPQC will work as a static synchronous compensator (STATCOM) at the grid

side, while providing also the conventional UPQC compensations at the load or microgrid
side. Experimental results are provided to verify the new functionality of the equipment.
R. A. Modesto, S. A. O. da Silva, A. A. de Oliveira and V. D.Bacon, the study, analysis,
and practical implementation of a versatile unified power quality conditioner (UPQC), which
can be connected in both three-phase three-wire (3P3W) or three-phase four-wire distribution
systems for performing the series-parallel power-line conditioning. Thus, even when only a
3P3W power system is available at a plant site, the UPQC is able to carry out power-line
compensation for installed loads that require a neutral conductor to operate. Different from
the control strategies used in the most of UPQC applications in which the controlled
quantities are nonsinusoidal, this UPQC employs a dual compensation strategy such that the
controlled quantities are always sinusoidal. Thereby, the series converter is controlled to act
as a sinusoidal current source, whereas the parallel converter operates as a sinusoidal voltage
source. Thus, because the controlled quantities are sinusoidal, it is possible to reduce the
complexity of the algorithms used to calculate the compensation references. Therefore, since
the voltage and current controllers are implemented into the synchronous reference frame,
their control references are continuous, decreasing the steady-state errors when traditional
proportional-integral controllers are employed. Static and dynamic performances, as well as
the effectiveness, of the dual UPQC are evaluated by means of experimental results.
R. J. Millnitz dos Santos, J. C. da Cunha and M. Mezaroba are proposed to presents a
simplified control technique for a dual three-phase topology of a unified power quality
conditioner-iUPQC. The iUPQC is composed of two active filters, a series active filter and a
shunt active filter (parallel active filter), used to eliminate harmonics and unbalances.
Different from a conventional UPQC, the iUPQC has the series filter controlled as a
sinusoidal current source and the shunt filter controlled as a sinusoidal voltage source.
Therefore, the pulse width modulation (PWM) controls of the iUPQC deal with a well-known
frequency spectrum, since it is controlled using voltage and current sinusoidal references,
different from the conventional UPQC that is controlled using non sinusoidal references. In
this paper, the proposed design control, power flow analysis, and experimental results of the
developed prototype are presented.
A. M. Rauf, A. V. Sant, V. Khadkikar and H. H. Zeineldin are proposed to a new
topological configuration for a unified power quality conditioner (UPQC). Generally, the
power structure of three-phase-three-wire UPQC consists of two back-to-back connected six

switch inverters. For this configuration, out of twelve switches, six of the series inverter
switches will be under-utilized most of the time. To improve the semiconductor utilization
and consequently to reduce the total switch count, this paper proposes a new reduced switch
topology for UPQC. The proposed topology is realized using only ten switches and retains all
the performance merits of the twelve-switch UPQC while minimizing its underutilization
without increasing the switch VA rating. The paper provides a detailed analytical study and
evaluation by comparing the proposed topology with the twelve and nine switches based
UPQC system configurations. The feasibility of the proposed topology is validated through
experimental investigation.
1.2.EXISTING METHOD
In existing system, to regulate the dc-link voltage and harmonics in the load , single-stage
three-phase four-wire grid connected Photo Voltaic (PV) system operating with a dual
compensating strategy and feed forward control loop, the three level Neutral Point Converter
(NPC) power circuit is proposed.
FIG.1.2.Traditional UPQC located at grid side

FIG.1.3.Traditional UPQC located at NL/REG side
CHAPER-2
IH-UPQC TOPOLOGY (PROPOSED METHOD)
The basic system configuration of IH-UPQC is illustrated in Fig. 2. The system is
composed of an IFT, a series transformer, an UPQC consisted of a series APF and a shunt
HAPF, and the premium-power-supply-required applications, such as wind generation,
photovoltaic generation and other sensitive nonlinear load, etc. The shunt HAPF and series
APF are based on neutral point converter and connected back-to-back. The passive filter of
shunt HAPF is a Double Resonant Passive Filter (DRPF) which has two resonant frequencies
and can bear more voltage, while the output filter of series APF is a LCR-Low Pass Filter
(LPF). The IFT with YYD wiring has a three-winding structure, its Primary Winding (PW) is
connected to public grid via the series transformer, the Secondary Winding (SW) is
connected with the premium-power-supply-required applications, and the Filtering Winding
(FW) is connected with the shunt HAPF. The IFT and shunt HAPF are used to implement
inductive filtering method, where the harmonic magnetic potential balance between SW and
FW is reached, which means that the harmonic leakage flux in SW will be offset by the one
in FW, thus there are few harmonics in the PW. Furthermore, the series APF is controlled as
a non-sinusoidal voltage source to tackle all voltage-related problems for the load, such as
voltage harmonics, voltage unbalance, and voltage sag/swell.
Benefited from this integrated configuration, the IHUPQC inherits the advantages of
traditional UPQC, i.e., it suppresses harmonics and compensates reactive power for grid (bus
A), and ensure a regulated load voltage for NL/REG (bus B). Moreover, the IH-UPQC gives
three main special features: 1) high integration; 2) low DC-link voltage; 3) satisfactory
harmonic isolation of transformer.

FIGURE 2.1. Basic system configuration of the IH-UPQC.
FIGURE .2.2. The equivalent circuit of basic system.

2.1.FLEXIBLE AC TRANSMISSION SYSTEMS (FACTS CONTROLLERS)

Introduction
The ability to control power flow in an electric power system without generation
rescheduling or topology changes can improve the power system performance using
controllable components. The line flows can be changed in such a way that thermal limits are
not exceeded, losses are minimized, stability margins are increased and contractual
requirements are fulfilled without violating the economic generation dispatch. Flexible AC
Transmission systems (FACTS) technology is the ultimate tool for getting the most out of
existing equipment via faster control action and new capabilities. The most striking feature is
the ability to directly control transmission line flows by structurally changing parameters of
the grid and to implement high-gain type controllers based on fast switching. The application
of FACTS devices to power system security has been an attractive ongoing area of research.
In most of the reported studies, attention has been focused on the ability of these devices to
improve the power system security by damping system oscillations and minimal attempts
have been made to investigate the effect of these devices on power system reliability. The
opportunities arise through the ability of FACTS controllers to control the interrelated
parameters that governs the operation of transmission systems including series impedance
and shunt impedance, current, phase angle and damping of oscillations at various frequencies
below the rated frequency. These constraints cannot be overcome otherwise, while
maintaining the required system stability, by mechanical means without lowering the useable
transmission capacity. By providing added flexibility, FACTS controller can enable a line to
carry power closer to its thermal rating. Mechanical switching needs to be supplemented by
rapid-response power electronics. The FACTS technology can certainly be used to overcome
any of the stability limits, in which case the ultimate limits would be thermal and dielectric.
Static VAR controllers control only one of three important parameters (voltage, impedance,
phase angle) determining the power flow in the AC power system viz. the amplitude of
voltage at selected terminals of transmission line . It has long been realized that an all solid-
state or advanced, static VAR compensator, which is true equivalent of ideal synchronous
condenser, is technically feasible with the use of Gate Turn-Off (GTO) Thyristor. The UPFC
is recently introduced FACTS controller which has the capability to control all the four
transmission parameters.

Types of FACTS Controllers

The different types of FACTS Controllers are: Static VAR compensator (SVC ) Thyristor
Controlled Series Compensator (TCSC) Thyristor Controlled Phase Angle
Regulator(TCPAR) Static Synchronous Compensator(STATCOM) Solid State series
Compensator(SSSC) Unified Power Flow Compensator(UPFC) Interline power flow
controller ( IPFC) Generalized Interline power flow controller (GIPFC).
FACTS controllers can be used in all the three states of the power system namely
1. Steady state
2. Transient state and
3. Post transient state.
However, the conventional devices find little application during system transient or
contingency condition. The main benefits of FACTS controllers are (a) Environmental
benefit (b) Increased stability (c) Increased quality of supply (d) Flexibility (e) Financial
benefit.
2.2.UNIFIED POWER QUALITY CONDITIONER (UPQC):
Introduction:
The UPQC system contains two major parts. One is the power electronic converters module
where the series and shunt converters are integrated together, and the other one is the series
transformer which handles the series injected voltage. Since then, UPQC has become one of
the most attractive solutions to improve power quality in the distribution system due to its
superior performance in mitigating almost all major power quality problems. However,
UPQC is still at the research stage, which has not been widely utilized so far. The reason is
that the UPQC system contains two sets of power converters and a transformer. This
significantly increases the cost of producing and marketing the system. It is important to
reduce the rating of the UPQC system without any compromise of the compensating
capabilities. In this manner, it will increase the utilization of the UPQC and reduce the cost of
the system, which enhance the competitiveness of the whole system. Based on the review of
the existing UPQC topologies and techniques, it is noted that there is no generalized strategy
to optimize the rating of a UPQC system. The research works in this thesis focus on optimal
design of the UPQC system and the corresponding control implementation of the designed
UPQC without compromising its compensating capabilities.

In order to provide a clear demonstration of the state-of-the-art techniques in the UPQCs, the
existing UPQC topologies and techniques are classified according to their physical structures
and compensating techniques. The overview of the classification of the UPQC is illustrated
as follows:
A. Physical Structures:
A1. Type of Converters Used in the UPQC: 1) Voltage Source Converter; 2) Current
Source Converter.
A2. Supply System and Load System: 1) Single-Phase Two-Wire; 2) Three-Phase Three-
Wire; 3) Three-Phase Four-Wire; 4) Three-Phase Three-Wire to Three-Phase Four-Wire; 5)
Single-Phase to Three-Phase.
A3. Configurations of the UPQC: 1) Left and Right Shunt UPQC; 2) Interline UPQC; 3)
Multiconverter UPQC; 4) Modular Multilevel UPQC; 5) Distributed Generation Integrated
UPQC.
PHYSICAL STRUCTURES
The classification of the UPQCs can be attributed to their physical structures.
Specifically, the major parameters utilized for the classification are: 1) the type of converters
used in the UPQC; 2) the supply system and load system; and 3) the configurations of the
UPQC.
2.2.1 TYPE OF CONVERTERS USED IN THE UPQC
As illustrated in Figure 1-6, the UPQC consists of two back to back connected power
electronic converters and a shared DC link. Based on the type of converters used in the
UPQC, they can be classified into two categories:
1. Voltage Source Converter
The voltage source converter (VSC) is the most popular type of converters utilized in the
UPQCs. The VSC based UPQC consists of two back to back connected VSCs and a shared
DC capacitor. The DC capacitor is maintained at the reference voltage value and responsible
for the power coordination between the two VSCs. Most of the reports about the UPQC topic
use the VSC based topologies . The advantages of utilizing the VSCs in the UPQCs are: 1)
low weight, 2) low capital cost, and 3) ability of
multilevel operating.
2. Current Source Converter

The UPQC can also consist of two back to back connected current source converters (CSCs)
which share a DC link through an inductor . This inductor is utilized to regulate the input
power such that it is equal to the sum of the losses associated with the UPQC operation and
the output power. The CSCs are not widely used in the UPQC topologies, as the CSCs have
the disadvantages: 1) high capital cost, 2) high operating loss, and 3) cannot provide
multilevel operating.
2.2.2 SUPPLY SYSTEM AND LOAD SYSTEM
As we know, the ac power sources can be classified into three categories, i.e., singlephase
two-wire, three-phase three-wire, and three-phase four-wire arrangement. The ac power loads
can also be single-phase or three-phase. In order to mitigate the power quality problems in
the aforementioned single-phase and three-phase power systems, the UPQC is classified
according to the supply system and load system as follows:
1. Single-Phase Two-Wire
To deal with the power quality problems in the single-phase systems, the single-phase two-
wire UPQC may consist of two H-bridge converters . In the two H-bridge converters based
topologies of UPQC, the number of the semiconductor switches is eight. the authors propose
two types of semiconductor switches reduced topologies for the single phase UPQC, i.e.,
three-leg single-phase UPQC and half-bridge single-phase UPQC. The number of the
semiconductor switches in the three-leg single-phase UPQC and the half-bridge singlephase
UPQC is reduced to six and four, respectively . However, the power quality improving
abilities of the UPQC are affected due to the reduced semiconductor switches.
2. Three-Phase Three-Wire
In the three-phase three-wire power system, the common three-phase loads, e.g., electric
motor, space heating, electric boilers, electric lighting, arc furnace, electric stoves, are
designed to be operated on a three-phase three-wire power source, where the aforementioned
power quality problems exist. The three-phase three-wire UPQCs, which are the most
popular UPQC topology, are utilized to mitigate the power quality problems..
3. Three-Phase Four-Wire
For the industrial plant, it may contain combined the single-phase and three-phase load
systems, which are operated on a three-phase four-wire power source. Several three-phase
four-wire UPQC topologies, i.e., three H-bridge four-leg and two split capacitors are utilized
to deal with the existing power quality problems. The comparison between the

aforementioned three-phase four-wire UPQC topologies is conducted, that the three

configurations are suitable for working in the three-phase four-wire system.
In the three H-bridge based UPQC topology, the shunt converter consists of three single-
phase H-bridge converters connected at the common DC link. The number of semiconductor
switches increases significantly, as well as the corresponding capital cost and operating
losses of the whole systems. In the four-leg UPQC configuration, two semiconductor
switchers are utilized to deal with the load side neutral current. In the two split capacitor
UPQC topology, the DC link of the UPQC comprises of two split capacitors. The midpoint of
the two split capacitors is connected to the neutral wire of the systems. An additional control
algorithm is required to regulate the voltage of the DC link capacitor, thus the voltages across
the two split capacitors are equal. In this way, the circulating current is avoided in the two
split capacitors UPQC topology.
4. Three-Phase Three-Wire to Three-Phase Four-Wire
The three-phase three-wire to three-phase four-wire UPQC topology is basically a
combination of the three-phase three-wire UPQC and the three-phase four-wire UPQC
configurations. The source side is the three-phase three-wire power supply, while the load
side is the three-phase four-wire load system. By connecting the threephase three-wire to
three-phase four-wire UPQC in the power system, the three-phase three-wire power source is
able to support the three-phase four-wire load, as the series injection transformer and the
shunt converter of the UPQC share the common neutral.
5. Single-Phase to Three-Phase
For some power systems in Brazil, New Zealand, and Australia, the electric power is supplied
from a single-phase power source and supports the combined single-phase and three-phase
loads. The single-phase to three-phase UPQC is proposed to mitigate the power quality
problem in the aforementioned power systems. In the singlephase to three-phase UPQC
topology, the single-phase series converter is implemented utilizing a half-bridge converter,
and the three-phase shunt converter is developed utilizing a three-leg converter . The single-
phase to three-phase UPQC is able to achieve the conversion of the single-phase source to the
three-phase source and realize the series and shunt power quality compensation as in the
traditional UPQCs.

Neutral Point Converter (NPC):

Neutral point clamped (NPC) inverters are widely used topology of multilevel inverters in
high-power applications. This kind of inverters are able to be used for up to several
megawatts applications. See below links for more information.
Structure
Fig 2.3.Neutral Point Converter

The classic NPC stage features four IGBTs and six diodes. The blocking voltage is 600 V /
650 V or 1200 V. All modules are equipped with an NTC or PTC alongside the power
semiconductors.
Application
Modules with an NPC topology are used mainly in three-phase PV inverters and
uninterruptible power supplies, and rarely also in frequency inverters with a high output
frequency.
How it works
An NPC module is often called a three-level module.
When an NPC module is used as in inverter operation, the DC-link voltage can be converted
into a variable alternating voltage and variable frequency. In contrast to a half-bridge or
sixpack, an NPC topology offers an additional voltage level at the output. The potential not
only jumps to DC+ and DC-; it can also have a status of 0. The inner IGBT switches are
called NP (neutral point) IGBTs and the center-point of the DC-link is switched to the output.

At real or active power, these are switched at just 50 Hz and thus correspond to the positive
or negative sinusoidal half-wave. Usually operated at a higher 16 kHz frequency, the outer
switches generate the sine wave. This requires from components half the blocking voltage
capability needed for conventional topologies.
It is to be noted that semiconductors with a higher blocking voltage capability switch slower
than semiconductors with lower blocking voltage capability. NPC topologies with 600 V
components can therefore be operated at higher switching frequencies than 1200 V half-
bridges. Furthermore, double the frequency is applied to the output filter.
The MNPC module is an alternative to the NPC module. It also works with three levels at the
output. Each topology has its advantages, depending on the switching frequency.
Active Power Filter:
Active power filters (APF) are filters, which can perform the job of harmonic elimination.
Active power filters can be used to filter out harmonics in the power system which are
significantly below the switching frequency of the filter. The active power filters are used to
filter out both higher and lower order harmonics in the power system.
The main difference between active power filters and passive power filters is that APFs
mitigate harmonics by injecting active power with the same frequency but with reverse phase
to cancel that harmonic, where passive power filters use combinations of resistors (R),
inductors (L) and capacitors (C) and does not require an external power source or active
components such as transistors. This difference, make it possible for APFs to mitigate a wide
range of harmonics.
Power quality:
Electric power quality, or simply power quality, involves voltage, frequency, and waveform.
Good power quality can be defined as a steady supply voltage that stays within the prescribed
range, steady a.c. frequency close to the rated value, and smooth voltage curve waveform
(resembles a sine wave). In general, it is useful to consider power quality as the compatibility
between what comes out of an electric outlet and the load that is plugged into it.[1] The term
is used to describe electric power that drives an electrical load and the load's ability to
function properly. Without the proper power, an electrical device (or load) may malfunction,
fail prematurely or not operate at all. There are many ways in which electric power can be of
poor quality and many more causes of such poor quality power.

The electric power industry comprises electricity generation (AC power), electric power
transmission and ultimately electric power distribution to an electricity meter located at the
premises of the end user of the electric power. The electricity then moves through the wiring
system of the end user until it reaches the load. The complexity of the system to move
electric energy from the point of production to the point of consumption combined with
variations in weather, generation, demand and other factors provide many opportunities for
the quality of supply to be compromised.
While "power quality" is a convenient term for many, it is the quality of the voltage—rather
than power or electric current—that is actually described by the term. Power is simply the
flow of energy and the current demanded by a load is largely uncontrollable.
Power Quality Deviations
Voltage
• Variations in the peak or RMS voltage are both important to different types of
equipment.
• When the RMS voltage exceeds the nominal voltage by 10 to 80% for 0.5 cycle to 1
minute, the event is called a "swell".
• A "dip" (in British English) or a "sag" (in American English the two terms are
equivalent) is the opposite situation: the RMS voltage is below the nominal voltage by 10 to
90% for 0.5 cycle to 1 minute.
• Random or repetitive variations in the RMS voltage between 90 and 110% of nominal
can produce a phenomenon known as "flicker" in lighting equipment. Flicker is rapid visible
changes of light level. Definition of the characteristics of voltage fluctuations that produce
objectionable light flicker has been the subject of ongoing research.
• Abrupt, very brief increases in voltage, called "spikes", "impulses", or "surges",
generally caused by large inductive loads being turned off, or more severely by lightning.
• "Under voltage" occurs when the nominal voltage drops below 90% for more than 1
minute. The term "brownout" is an apt description for voltage drops somewhere between full
power (bright lights) and a blackout (no power – no light). It comes from the noticeable to
significant dimming of regular incandescent lights, during system faults or overloading etc.,
when insufficient power is available to achieve full brightness in (usually) domestic lighting.
This term is in common usage has no formal definition but is commonly used to describe a

reduction in system voltage by the utility or system operator to decrease demand or to

increase system operating margins.
• "Overvoltage" occurs when the nominal voltage rises above 110% for more than 1
minute.
Frequency
• Variations in the frequency.
• Nonzero low-frequency impedance (when a load draws more power, the voltage
drops).
• Nonzero high-frequency impedance (when a load demands a large amount of current,
then stops demanding it suddenly, there will be a dip or spike in the voltage due to the
inductances in the power supply line).
• Variations in the wave shape – usually described as harmonics at lower frequencies
(usually less than 3 kHz) and described as Common Mode Distortion or Interharmonics at
higher frequencies.
Waveform
• The oscillation of voltage and current ideally follows the form of a sine or cosine
function, however it can alter due to imperfections in the generators or loads.
• Typically, generators cause voltage distortions and loads cause current distortions.
These distortions occur as oscillations more rapid than the nominal 60 Hz, and are referred to
as harmonics.
• The relative contribution of harmonics to the distortion of the ideal waveform is
called total harmonic distortion (THD).
• Low harmonic content in a waveform is ideal because harmonics can cause
vibrations, buzzing, equipment distortions, and losses and overheating in transformers.
Each of these power quality problems has a different cause. Some problems are a result of the
shared infrastructure. For example, a fault on the network may cause a dip that will affect
some customers; the higher the level of the fault, the greater the number affected. A problem
on one customer’s site may cause a transient that affects all other customers on the same
subsystem. Problems, such as harmonics, arise within the customer’s own installation and
may propagate onto the network and affect other customers. Harmonic problems can be dealt
with by a combination of good design practice and well proven reduction equipment.

Linear and non linear loads :

Harmonics:
Defined as deviations from the fundamental frequency sine wave, expressed as additional
sine waves of frequencies that are a multiple of the generated frequency. They are expressed
as third, fifth, seventh etc harmonics, denoting their frequency as a multiple of the primary
wave frequency.
Harmonic Distortion:
Non linear distortion of a waveform characterized by the appearance in the output of
harmonics other than the fundamental component when the input wave is sinusoidal.
Harmonic Content:
A measure of the presence of harmonics in the waveform expressed as a percentage of the
fundamental frequency. The total harmonic content is expressed as the square root of the sum
of each of the harmonics amplitudes, expressed as percentage of the fundamental. Non linear
distortion of a waveform characterized by the appearance in the output of harmonics other
than the fundamental component when the input wave is sinusoidal.
Linear Load :
AC electrical loads where the voltage and current waveforms are sinusoidal. The current at
any time is proportional to voltage. Linear Loads are: POWER FACTOR IMPROVEMENT
CAPACITORS, INDESCENT LAMPS, HEATERS ETC
Non-Linear Load :
Applies to those ac loads where the current is not propotional to the voltage. Foremost
among loads meeting their definition are gas discharge lighting having saturated ballast coils
and thyritor (SCR) controlled loads. The nature of non-linear loads is to generate harmonics
in the current waveform. This distortion of the current waveform leads to distortion of the
voltage waveform. Under these conditions, the voltage waveform is no longer proportional to

the current. Non Linear Loads are : COMPUTER, LASER PRINTERS, SMPS,
REACTIFIER, PLC, ELECTRONIC BALLAST, REFRIGERATOR, TV ETC.
Effects Of Harmonics On Neutral Earthing
In a 4-wire three phase system, the fundamental currents at any instant will always add up to
zero in the neutral. However, the third harmonic of each phase is always in phase with those
of the other two phases. As a result, rather than canceling each other (as is the case with the
fundamental), they are additive and may well lead to serious neutral loading problems. As an
example: a three phase system has 100 amperes load and each phase contains 30% third
harmonic. The harmonic current flowing through the neutral will be three times. 30% of 100,
or 90 amperes at the three times of the fundamental frequency (150 Hz for 50 Hz systems)
Ref. current wave diagram. Therefore, it is recommended to use neutral of minimum double
the capacity since total load on the system in consideration of Linear loads and Non Linear
loads. It is also advised to use single phase UPS/Loads wherever possible with individual
neutral in place of using three phase UPS/Loads. Due to the high frequency and skin effect
the current flows on the other surface of the conductor and also to minimize neutral
impedance, it is preferred to use number of conductors in parallel in place of single neutral
conductor.
Earth fault:
The system shall be earthed through conducting material suitable to carry the fault current.
The minimum cross section of the earth conductor shall be calculated based on maximum
current, which can flow at the time of short circuit/earth fault.

CHAPTER-3
IH-UPQC OPERATING PRINCIPLE
3.1. EQUIVALENT CIRCUIT MODEL
According to Fig. 2, the NL/REG, especially current-source type NL/REG, can be seen as a
non-sinusoidal current source connected in parallel with an impedance. Similar like the
current-source type NL/REG, the shunt HAPF is described as a non-sinusoidal current source
in parallel with its output impedance. The series APF is equivalent to a controlled voltage
source. Thus, the three-phase equivalent circuit model for IH-UPQC is established, as shown
in Fig.3. In Fig. 2, us[ab,bc,ca] represent grid line-to-line voltages, uc[ab,bc,ca] represent
line-to-line compensation voltages of series APF, ul[ab,bc,ca] represent line-to-line voltages
of the NL/REG. In Fig. 3, us[a,b,c] represent grid voltages, uc[a,b,c] represent compensation
voltages of series APF, is[a,b,c] represent grid currents, u[a,b,c]n1 represent voltages on PW.
il[a,b,c] represent load currents, u[a,b,c]o represent voltages on SW. u[ab,bc,ca]f represent
voltages on FW, i[a,b,c]f represent currents on FW, ic[a,b,c] represent compensation
currents, ir[a,b,c] represent reference currents of shunt HAPF, iz[a,b,c] represent currents in
output impedance Zo of shunt HAPF. The equivalent impedances of PW, SW and FW are
Z1, Z2, Z3, respectively. Besides, as the IH-UPQC is installed between high-voltage power
system and low-voltage NL/REG, series transformer and IFT are both step-down
transformer, the ratios are N1:N2 and Ni1:Ni2:Ni3, respectively.
3.2.HARMONIC CURRENT COMPENSATION MECHANISM
The shunt HAPF operates to compensate harmonics generated by NL/REG and make grid
current is[a,b,c] sinusoidal. The detailed harmonic current compensation mechanism will be
revealed in this section. According to transformer magnetic potential balance principle, the
currents in three windings satisfy the following equations:

Also, voltage equations of multi-winding transformer can be obtained as follows,
According to Kirchhoff’s Current Law (KCL), the knotvoltage equations in FW and knot-
current equations can be written as:
Similarly, the knot-voltage equations in FW are given by,
According to the mathematical model expressed by (1)-(4), grid currents can be deduced as
follows:

According to equation (5), grid currents are mainly affected by the primary voltages,
reference currents of shunt HAPF, and load currents in NL/REG. Assuming that the primary
harmonic voltages are compensated completely, i.e., for harmonic currents, uuah = uubh =
uuch = 0. in order to ensure that no load harmonic currents induct into primary winding, i.e.,
for harmonic currents, isa = isb = isc = 0, the shunt HAPF reference currents (ira, irb, irc)
should meet the following expressions[18]:
Actually, in order to eliminate the adverse effect of Z3 on filtering performance and stability,
Z3 is designed close to zero-impedance, which is the precondition for the implementation of
inductive filtering method. Therefore, reference currents can be simplified as (7).
3.3. VOLTAGE COMPENSATION MECHANISM

The series APF operates to maintain NL/REG voltages balanced and sinusoidal with the
desired amplitude. The proposed series APF regulates NL/REG voltages by controlling
secondary open circuit voltages of IFT. In noload condition, secondary open circuit voltages
can be described as,

According to the principle of electromagnetic induction and Kirchhoff’s Voltage Law (KVL),
the primary voltages can be expressed as,
Equations (8) and (9) indicate that once primary voltages deviates from the rated value, series
APF will inject series voltages uc[a,b,c] to promise a regulated load voltage. Combining
equations (8) and (9), the reference voltages ucr[a,b,c] are given by,
where uL[a,b,c]* are the nominal-NL/REG voltages.

CHAPTER-4
SRF-BASED COMPOUND CONTROL
The proposed IH-UPQC compound control structure is based on Synchronous Reference
Frame (SRF), where the shunt HAPF and series APF are regulated in an independent way.
The shunt HAPF compensates harmonic current and regulates DC-link voltage by dual-loop
feedback and voltage feedforward scheme. The series APF utilizes voltage feedback and
current feedforward scheme to regulate deviated load voltage.
FIGURE 4.1. Block diagram of SGDFT-pre-filtering PLL.

4.1.SGDFT-PRE-FILTERING PLL
As both series and shunt HAPF need to keep synchronization with grid, while the
traditional SRF-PLL gives poor performance under non-ideal grid voltage, this article
introduces a pre-filtering SRF-PLL based on SGDFT. The block diagram of SGDFT-pre-
filtering PLL is illustrated in Fig. 4. Its structure is composed of three parts: Fundamental
Positive Sequence Components Separation (FPSCS), voltage normalization and SRF-
PLL. The FPSCS module uses SGDFT filter [20] and symmetrical component method
[19] to separate FPSC even under abnormal grid voltage. SRF-PLL is adopted in order to
calculate grid fundamental positive sequence phase. Voltage normalization is employed
to remove the adverse effect of variable input voltage amplitude on SRF-PLL.
In Fig. 4, Tln is used to achieve equivalent transform from line-to-line voltages to
phase voltages, and its expression is,
The transformation expressions of abc-αβ, αβ-dq and voltage normalization are as follows,

SGDFT filter has satisfactory filtering ability at the frequencies that are integer times of
fundamental frequency. Its transfer function and realization diagram are shown below,
where k is frequency domain index and N is the sampling number.
FIGURE 4.2. Realization diagram of SGDFT.

According to the symmetrical component method, fundamental positive sequence
components uα + uβ + are obtained
By the SGDFT-pre-filter, this PLL can operate satisfactorily under seriously abnormal grid
voltage as long as the Proportional Integral (PI) gains are properly tuned.
4.2.COMPOUND CONTROL SCHEME FOR SHUNT HAPF
Fig. 6 shows the control block diagram of the shunt HAPF. It consists of six blocks:
reference current calculation, DClink voltage control, output current control, voltage feed
forward control, Neutral Point (NP) voltage balance and Carrier-Based Pulse Width
Modulation (CBPWM).

The reference current is extracted from the load current by SGDFT and then calculated
according to (7). The DClink voltage is maintained at a constant reference value udc* by a PI
controller and the regulated current is overlaid on the reactive axis. Aiming at tracking the
current reference, the Proportional Resonant (PR) controller is designed, its transfer function
in discrete domain can be deduced by impulse invariant method [21]
FIGURE 4.3. Control diagram of shunt HAPF.
where kpi is proportional coefficient, kin is integral coefficient, Ts is sampling period, mf is

duty cycle. Considering that the dominated harmonic orders in load current are 5th, 7th, 11th
and 13th, the 6th and 12th PR controllers in dq are adopted. Moreover, voltage feed forward
control is employed to eliminate grid voltage disturbances. The NP voltage balance strategy
is realized by modulating signals reconstruction. The modulation signals are determined by
the variation direction of reference voltage ur[a,b,c], splitting DC-link voltage deviation and
output current [22, 23], that is,
where um[a,b,c]p and um[a,b,c]n are reconstructed reference voltages and can be obtained as
follows,

uc[a,b,c]off are the voltage deviations expressed by,
where kt is regulation factor.

It determines voltage unbalance regulation degree. The final driving signals are obtained by
logical judgment of modulation signals um[a,b,c;p,n] in CBPWM. The detailed realization
diagram of CBPWM method is shown in Fig. 7. Combining the above strategy with
CBPWM, NP voltage can be well balanced.
FIGURE 4.4. Detail diagram of CBPWM

4.3. COMPOUND CONTROL SCHEME FOR SERIES HAPF
Fig. 8 shows the detailed control block diagram for series APF. The control scheme of series
APF contains four blocks: reference voltage calculation, output voltage control, current feed
forward control and CBPWM.

FIGURE 4.5. Control diagram of series APF.

According to (10), the reference voltages ucr[a,b,c] are deduced by grid voltages us[ab,ca]
and desired load voltages uL[a,b,c] *, which are calculated by fundamental positive sequence
phase θp + and nominal load phase voltage amplitude uln *. Similar like the current control
of shunt HAPF, 6th and 12th PR controllers expressed as Gudq(z) are employed to track the
reference voltages. The current feedforward control is also adopted to eliminate the NL/REG
current disturbances. Different from shunt HAPF, series APF is not responsible for regulating
DC-link and NP voltage. Therefore, there is no need to modify its reference voltage, i.e., uma
of series APF acts the same role as umap and uman of shunt HAPF, so as to umb and umc.

CHAPTER-5
MAIN CIRCUIT COMPONENTS DESIGN
In principle, harmonic suppression of NL/REG is performed mainly by passive filter of shunt
HAPF coordinated with zero impedance designed FW, the active part is responsible for
filtering performance improvement. While the voltage regulation is accomplished by active
part of series APF, the passive filter only acts as an output filter. These passive components
design are discussed in the following subsections.
5.1.ZERO IMPEDANCE DESIGN OF FILTERING WINDING
According to the analysis in Section III-B, zero impedance design of FW is the precondition
to implement inductive filtering method. Thus, practical design method must be introduced
[18]. It is known that the equivalent impedance of transformer can be calculated by the short-
circuit impedance, that is,
where Z12, Z13, Z23 are short circuit impedance between PW and SW, PW and FW, SW and
FW, respectively. The percentage of short-circuit impedance is proportional to the geometry
size of windings and the isolation distance between the two corresponding windings. The
geometry size of windings are fixed within a certain scale in transformer design. Thus, the
desired equivalent impedance can be achieved by adjusting isolation distance. According to
the special transformer design theory [24], equivalent impedance Z3 can be simplified as Z3=
kx(d13+d23-d12), where d13, d23 and d12 are the isolation distances between PW and FW,
SW and FW, PW and FW, respectively. Obviously, if isolation distance satisfies this
condition d13+d23=d12, zero impedance can be achieved [18]. Fig. 9 shows the winding
arrangement of the IFT.

FIGURE 5.1. Winding arrangement in sectional view.

5.2.DRPF DESIGN FOR SHUNT HAPF
The DRPF which can be equal to two shunt single resonant circuit is adopted in shunt
HAPF. DRPF gives three functions for shunt HAPF: 1) low-impedance circuit for two
specific harmonics; 2) fixed reactive power compensation; 3) high fundamental voltage
dividing ability. Taking phase A as an example, its impedance transfer function is,
Fig. 10 shows bode plot of Z(s), it can be observed that Z(s) has two minimum and one
maximum at the series resonant frequencies f1, f2 and shunt resonant frequency fr,
respectively. In order to obtain satisfactory filtering characteristics at f1 and f2, fr is
recommended to be set as (f1 + f2)/2.
FIGURE 5.2. Bode plot of Z(s).

When the DRPF occurs series resonance, it can be obtained that,
The resonant angular frequency ω1, ω2 can further be expressed as follows:
When the DRPF occurs parallel resonance, the reference resonant angular frequency ωr
can be deduced as,
If the demanded reactive power is Qc, the fundamental impedance is,
where ωf is the fundamental angular frequency and Uph is input phase voltage RMS of
the DRPF. Combining (22), (23) with (24), it can be figured out that,
Consequently, design rule of Li2a, Li1a and Ci1a can be obtained from (22), (23) and (25),

5.3. LCR-LPF DESIGN FOR SERIES APF

LCR-LPF is utilized to reduce the high order harmonics in the injected voltages of series
APF. The voltage transfer function between inverter voltage and compensation voltage is,
And the resonance frequency is,
The design of inductor Lu is the same as the conventional LCL filters, and its value is depend
on the bandwidth and filtering performance at low frequency. When the required
compensation harmonic frequency frch is assigned, fr should meet the constraint that: frch <
fr < fs/2. And then, Lu and Cu can be figured out by the above expressions. Moreover, Ru
affects the system stability and harmonic tracking ability, a tradeoff between these two
aspects should be made in the choice of Ru.
CHAPTER-6

PHASE LOCKED LOOP (PLL)

The concept of Phase Locked Loops (PLL) first emerged in the early 1930’s.But the
technology was not developed as it now, the cost factor for developing this technology was
very high. Since the advancement in the field of integrated circuits, PLL has become one of
the main building blocks in the electronics technology. In present, the PLL is available as a
single IC in the SE/NE560 series (560, 561, 562, 564, 565 and 567) to further reduce the
buying cost ,the discrete IC’s are used to construct a PLL.
PLL applications
 Frequency Modulation (FM) stereo decoders, FM Demodulation networks for FM
operation.
 Frequency synthesis that provides multiple of a reference signal frequency.
 Used in motorspeed controls, tracking filters.
 Used in frequency shift keying (FSK) decodes for demodulation carrier frequencies
FIG 6.1.Block Diagram of PLL

Phase Detector
This comparator circuit compares the input frequency and the VCO output frequency
and produces a dc voltage that is proportional to the phase difference between the two
frequencies. The phase detector used in PLL may be of analog or digital type. Even though
most of the monolithic PLL integrated circuits use analog phase detectors, the majority of
discrete phase detectors are of the digital type. One of the most commonly used analog phase
detector is the double balanced mixer circuit. Some of the common digital type phase
detectors are
Exclusive OR Phase Detector

An exclusive OR phase detector is shown in the figure below.
FIG 6.2.Exclusive-OR Phase Detector
It is obtained as a CMOS IC of type 4070. Both the frequencies are provided as an input to
the EX OR phase detector. Obeying the EX-OR concept the output becomes HIGH only if
either of the inputs fi or fo becomes HIGH. All other conditions will produce a LOW output.
Let us consider a waveform where the input frequency leads the output frequency by θ
degrees. That is, fi and fo has a phase difference of θ degrees. The dc output voltage of the
comparator will be a function of the phase difference between its two inputs.
The figure shows the graph of DC output voltage as a function of the phase difference
between fi and fo. The output DC voltage is maximum when the phase detector is 180°.This
type of phase detector is used when both fi and fo are square waves.
Fig .6.3.Exclusive-OR Phase Detector-Waveform

Edge Triggered Phase Detector

Edge triggered phase detector is used when fi and fo are pulse waveforms with less
than 50% duty cycles. The figure of such a phase detector using an R-S Flip Flop is shown
below. Two NOR Gate (CD4001) are cross-coupled to form an R-S Flip Flop. The output of
the phase detector changes it’s logic state by triggering of the R-S Flip Flop. That is, the
output of the phase detector changes its logic state on the positive edge of the input fi and fo.
The advantage of such a detector can be understood from the graph below. It is clear that the
DC output voltage is linear over 360°.
Monolithic Phase Detectors

`The monolithic type phase detector uses a CMOS type 4044 IC ,Which is highly
advantages as the harmonic sensitivity and duty cycle problems are neglected and the circuit
will be respond only to the transition in the input signals. This is the most preferred phase
detector in the critical applications as the phase error and the output error voltage are
independent of variations in the amplitude and duty cycles of the input waveforms.
Low Pass Filter (LPF)

A Low Pass Filter (LPF) is used in Phase Locked Loops (PLL) to get rid of the high
frequency components in the output of the phase detector. It also removes the high frequency
noise. All these features make the LPF a critical part in PLL and helps control the dynamic
characteristics of the whole circuit. The dynamic characteristics include capture and lock ranges,
bandwidth, and transient response. The lock range is the tracking range where the range of
frequencies of the PLL system follows the changes in the input frequency. The capture range is
the range in which the Phase Locker Loops attains the Phase Lock.
When the filter bandwidth is reduced, the response time increases .But this reduces the capture
range. But it also helps in reducing noise and in maintaining the locked loop through momentary
losses of signal. Two types of passive filter are used for the LPF circuit in a PLL. An amplifier
is used also with LPF to obtain gain. The active filter used in PLL is shown below
Voltage Controlled Oscillator (VCO)

The main function of the VCO is to generate an output frequency that is directly
proportional to the input voltage. The connection diagram of a SE/NE 566 VCO is shown in the
figure below. The maximum frequency of the VCO is 500 KHz.
This VCO provides simultaneous square wave and triangular wave outputs as a function of the
input voltage. The frequency of oscillation is determined by the resistor R and capacitor C along
with the voltage Vc applied to the control terminal.
PLL working
Let us consider the free running frequency to be fr. Let fr be the frequency at which
the Voltage Controlled Oscillator (VCO) is running without input signal. Let the input signal
fi that is increasing from zero be applied to the phase comparator.
A graph between the error voltage and input frequency is shown below. It can be seen
that when the input frequency is lesser than fi1,the error voltage Ver is reduced to zero. At this
time the VCO will operate at the free running frequency, fr. When the input frequency, fi
increases and reaches fi1, the error voltage jumps from zero to a negative voltage. This value
will be equal to the difference between the input frequency and actual VCO output frequency (fi
– fo).This resulting error voltage is then processed by filtering, amplifying, and applying the
amplified voltage Vd to the control terminals of the VCO.
The instantaneous frequency of VCO decreases because fo falls for negative values of Vd and
increases for positive values of Vrf. At some instant of time, the decreasing frequency of the
VCO equals fin1 (lower edge of the capture range), then lock results-in, and the output signal
frequency of the
VCO may be equal to the input signal frequency (that is, fo = fi). The VCO frequency locks
with input signal frequency up to fi2 (the upper end of the lock range). If the input signal
frequency exceeds fi2 then error voltage Vg will fall to zero and the VCO will operate at the
free running frequency fr, as illustrated in figure. If the input signal frequency is now slowly
swept back and it attains the value of fd1 then the loop (VCO frequency) locks with the input
signal frequency, causing a positive jump of the error voltage Ver. So the VCO output
frequency increases from fr continuously till fo becomes equal to fi. The VCO frequency fo

locks with the input signal frequency fi upto fd2 (the lower edge of the lock range) as shown in
figure by dotted lines. Now if the frequency of the input signal falls below fd2, then the error
voltage Ver will fall to zero and the VCO will operate at the free running frequency
Introduction:
Digital phase-locked loops constitute an important block in communication circuits.

They are used to recover the clock signal of the transmitted signal at the receiver end, thus
provide data synchronization at both sides of communication circuits.
The block diagram of a PLL is shown in fig. 1. ‘Data in’ is the reference signal, which
is either the received signal or the output of a local oscillator. The phases of the reference
signal and the dynamically corrected clock are compared at the phase detector (PD), where a
high output signal is produced in conjunction with the phase difference of the input
waveforms. The resulting signal is passed through a loop filter, which is a low-pass filter
used to add a pole to the overall system. The introduction of an extra pole in addition to the
one introduced by the voltage-controlled oscillator (VCO) is necessary to the end of gaining
further control over the feedback loop, thus preventing the locking of the output waveform on
higher harmonics of the reference clock. VCO transforms the phase information into actual
clock signals whose oscillation frequency is controlled via the voltage output of the PD after
being averaged by the loop filter. The oscillations at the output of the VCO are fed back to
the PD after a specified number of cycles, N. This number is set via the counter and controls
the multiplication factor over the reference clock that the output signal is locked onto.
Figure 6.4: Block Diagram of a PLL

The closed loop gain of the PLL can be estimated using the gains of the individual sub-
blocks:
 Phase detector: K PD
K LPF
K F=
s
1+
 Loop filter: p
K VCO
 VCO: s
Φ clock K PD K VCO K F
H (s )= =
Φ data 1
s+ K K K
The overall closed loop gain becomes: N PD VCO F
This is a second order transfer function due to the s terms introduced by the VCO and the loop
filter. Theoretically, a first order PLL, without a loop filter, can also work. However, as it was
pointed out, the second order system is easier to control and would allow tracking of fast
variations in the time domain, thus preventing the system from locking onto higher harmonics of
the reference signal.
6.1.PI CONTROLLER:
Introduction
PI control is becoming more popular because of its ability to maintain exact set point. This
chapter aims at establishing the design and implementation of the conventional PI controllers
at various operating points of the buck and boost converter. Simulation is done by using
MATLAB 7.1 and the controller is subjected to various disturbances of input voltage and
load changes.
Pi Control Mode
Proportional-Integral controller mode results from the combination of the proportional and
the integral mode. Certain advantages of both control actions can be obtained from this mode.
This mode is also called as the proportional plus reset action controller. Equations for the

proportional mode and integral mode are combined, to have an analytic expression for this
mode, which is given below:
The proportional gain, by design, also changes the net integration mode gain, but the
integration gain, can be independently adjusted. It is understood that the proportional offset
occurred, when a load change required a new nominal controller output, and this could not be
provided except by a
fixed error from the set point. In the present mode, the integral function provides the required
new controller output, thereby allowing the error to be zero after a load change. The integral
feature effectively provides a ‘reset’ of the zero error output, after the load change occurs. At
time t1 a load change occurs, that produces the error. The accommodation of the new load
condition requires a new controller output. The controller output is provided through a sum
of Proportional plus integral action that finally leaves the error at zero. The proportional part
is obviously just an image of the error.
Characteristics Of The Pi Mode

When the error is zero, the controller output is fixed at the value that the integral term had,
when the error reduced to zero. This output is given by pt(0) simply because we choose to
define the time at which observation starts, as t = 0. If the error is not zero, the proportional
term contributes a correction and the integral term begins to increase or decrease the
accumulated value [initial pt(0)], depending on the sign of the error and its direct or reverse
direction. The integral term annot become negative; thus it will saturate at zero, if the error
and the action try to drive the area to a net negative value.
The transfer function is given by

The integral action adjustment is the integral time T1 (=KI). For a step deviation ‘e’, the
integral time or reset time is the time for proportional action. ‘Reset rate’ is defined as the
number of times per minute that the proportional part of the response is duplicated. Reset
Rate is therefore called ‘repeats per minute’, and is the inverse of integral type. During the
design of the PI controller for the buck and boost converter, a closed loop operation is
performed. The open loop operation is insensitive to load and line disturbances. So this
operation is ineffective. Therefore the closed loop operation is selected. The closed loop
control uses a feedback signal from the process, a desired value or set point (output voltage)
and a control system that compares the two and derives an error signal. The error signal is
then processed and used to control the converter to try to reduce the error. The error signal
processing can be very complex because of delays in the system. The error signal is usually
processed using a Proportional - Integral (PI) controller whose parameters can be adjusted to
optimize the performance and stability of the system. Once a system is set up and is stable,
very efficient and accurate control can be achieved. Input is the voltage error (reference
voltage subtracted from the actual voltage) Output is the incremental duty ratio.
The controller specifications of a converter are
 Minimum steady state error.
 Less settling time.
ADVANTAGES & APPLICATIONS

Advantages:
 Harmonics are reduced effectively in the load.
 Voltage is regulated effectively.
Applications:
 Transmission related applications.
 Distribution related applications.
 Power quality improvement applications.
SOFTWARE REQUIREMENTS
Software Configuration:
Operating System : Windows 7/8/10
Application Software: Matlab / Simulink 2018a

Hardware Configuration:
RAM : 8 GB / 4 GB (Min)
Processor : I3 / I5 (Mostly prefer)
CHAPTER-7
SIMULATION STUDY
HARMONIC COMPENSATION FOR GRID VOLTAGE AND LOAD CURRENT:
FIGURE 7.1. Harmonic compensation for grid voltage and load current.
(a) Grid phase voltages
(b) Load phase voltages
(c) Output compensation voltages
(d) Load currents,

(e) Grid currents

(f) Output compensation currents
(g) Splitting DC-link voltages
Signal Available signals
10 4 Selected signal: 20 cycles. FFT window (in red): 1 cycles Refresh
1
Name: V
Signal mag.
0.5
0 Input: input 1
-0.5
Signal number: 1
-1
Display: Signal
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
Time (s) FFT window
FFT analysis FFT settings
Fundamental (50Hz) = 1.414e+04 , THD= 6.00% Start time (s): 0.2
Number of cycles: 1
6
Fundamental frequency (Hz): 50
5
Mag (% of Fundamental)
Max frequency (Hz): 1000
Max frequency for THD computation:

4
Nyquist frequency
3 Display style:
Bar (relative to fundamental)
2
Base value: 1.0
Frequency axis: Harmonic order

1
Display Export
0
0 2 4 6 8 10 12 14 16 18 20
Help Close
Harmonic order
7.2.Grid Current Thd

Signal Available signals
Selected signal: 20 cycles. FFT window (in red): 1 cycles Refresh
20 Name: V
Signal mag.
0 Input: input 2
Signal number: 1
-20
Display: Signal
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
Time (s) FFT window
FFT analysis FFT settings
Fundamental (50Hz) = 30.76 , THD= 28.87% Start time (s): 0.2
Number of cycles: 1
20
18 Fundamental frequency (Hz): 50

Mag (% of Fundamental)
16 Max frequency (Hz): 1000
14 Max frequency for THD computation:
12 Nyquist frequency
10 Display style:
8 Bar (relative to fundamental)
6 Base value: 1.0
4 Frequency axis: Harmonic order
2
Display Export
0
0 2 4 6 8 10 12 14 16 18 20
Help Close
Harmonic order
7.3. Load current thd

The performance of IH-UPQC under the condition of grid voltages distortion and nonlinear
loads is illustrated in Fig 7.1.
In this condition, distorted grid voltages with characteristic harmonics of 5th, 7th, 11th and 13th
are deliberately introduced. The diode rectifier with RL load is also considered in the system.
The distorted grid voltage and load current waveforms are given in Fig. 7.1(a) and (d),
respectively. As viewed from Fig. 7.1(b) and (e), with the IH-UPQC in operation, source
currents and load voltages become smooth and sinusoidal. In Fig.7.1 (g), it is also noticed that
both of the splitting NP voltages are regulated at reference value 200 V, which verifies the
effectiveness of NP voltage balance method.
For better visualization of compensation performance, Fast Fourier Transform (FFT) analysis
of the load voltage and grid current are shown in Fig. 13. Fig. 13 demonstrates that 5 th, 7th,
11th and 13th harmonics are eliminated close to zero, and Total Harmonic Distortion (THD) of
load voltage and grid current are decreased from 13.51% to 2.53% and 25.78% and 4.64%,
respectively
ASYMMETEIC VOLTAGE SAG AND SWELL COMPENSATION:

The performance of IH-UPQC under asymmetric voltage sag and swell are given in Fig 7.4
and Fig 7.5, respectively
FIGURE 7.4. Voltage sag compensation.

(b) Output compensation voltages
(c) Load voltages
(d) Splitting DC-link voltages.

FIGURE 7.5. Voltage swell compensation.

(b) Output compensation voltages
(c) Load voltages
(d) Splitting DC-link voltages
For voltage sag condition, unbalanced grid voltages with a 20% sag on phase A and C and a
10% sag on phase B are introduced at 0.4s. Similarly, for voltage swell condition, unbalanced
grid voltages with a 20% swell on phase A and a
10% swell on phase B and C are introduced at 0.4s. A pure resistive load is considered in the
two conditions. As shown in Fig. 7.4(b) and Fig. 7.5(b), the IH-UPQC acts immediately to
inject appropriate compensating voltages after voltage sag/swell occurs. Consequently, the
load voltages are regulated balanced and at the rated value, which can be noticed from Fig.
7.4(c) and Fig. 7.5(c). In Fig. 7.4(d) and Fig. 7.5(d), both of the splitting NP voltages are
maintained at reference value of 400 V within 3% overshoot in two cycles. It is evident that
the IH-UPQC is able to maintain the load voltage at its rated value under 20% sag and swell
condition.

DYNAMIC PERFORMANCE OF THE IH-UPQC UNDER SUDDEN LOAD

CHANGE:
This dynamic response is examined in harmonic, unbalance and sag grid voltage with nonlinear
load followed by RL load, as it is a more challenging scenario.
As shown in Fig. 16(a), the IH-UPQC puts into operation at 0.3s. Before 0.4s, the series APF
regulates the load voltages at the rated value and free of distortion in Fig. 16(b), while the shunt
HAPF outputs reference current to isolate harmonic currents from flowing into grid shown in
Fig. 16(e). At 0.4s, an extra resistive load is suddenly connected in parallel with the nonlinear
load, which gives birth to a load current amplitudes increase shown in Fig. 16(d).
FIGURE 7.6. Dynamic performance of the IH-UPQC under sudden load change.
(b) Load phase voltages
(c) Output compensation voltages
(d) Load currents
(e) Grid currents
(f) Output compensation currents
(g) Splitting DC-link voltages

From Fig.16(c) and (f), it can be observed that the output voltages and currents of IH-UPQC do
not change with load active power increasing. The changing process of grid current and DC-link
voltage are satisfactory: within 3% overshoot and 2 cycles’ response time, which can be
observed from Fig. 16(e) and (g). The sudden load change does not impose any considerable
effect on DC-link voltage. It is evident that the changeover from one operating condition to
another is smooth, the IH-UPQC maintain excellent compensation performance irrespective of
load change.
FIGURE 7.7. Power waveform of grid and load.

(a) Normalized phase A voltage, grid current, load current
(b) Active power
(c) Reactive power
To clearly recognize the power variation under load change, the active and reactive power
relationships are shown in Fig. 7.7. As shown in Fig. 7.7(a) and (c), before load change, the grid
voltage and current are in phase, the grid instantaneous reactive power are stabilized around
zero, which means that the load reactive power demand is supplied by the shunt HAPF. In
Fig.7.7, load instantaneous active and reactive power are fluctuant due to the distorted load
currents. After load change, the load fundamental active power is still approximately equal to
grid instantaneous active power, and grid instantaneous reactive power is approximately equal
to zero, which once again strengthens that IH-UPQC do not influence active power flow and it
mainly output reactive and harmonic currents.

The simulation indicators are summarized in Table II. Compensation Rate indicates load
voltage deviate from nominal voltage after compensation.
COMPARISON RESULTS BETWEEN IH-UPQC AND THE CONVENTIONAL
UPQC:
To elaborate the suitability and ability of replacing conventional UPQC with this approach, this
subsection gives out the comparison results between IH-UPQC and the conventional UPQC.
As shown in Fig. 7.8, subscript 1 and 2 represents IHUPQC and the conventional UPQC,
respectively. Grid voltage and load condition are same as the aforementioned conditions. It can
be figured out that IH-UPQC can obtain similar steady compensation performance with
conventional UPQC. While the conventional UPQC obtains higher overshoot and regulating
time than IH-UPQC in voltage compensation and DC voltage regulation. Moreover, IHUPQC
just require half DC-link voltage of conventional UPQC. In Fig. 7.9, IH-UPQC has another
advantage that it can compensate reactive power without increasing inverters capacity.
FIGURE 7.8. Comparison results under sudden load change.

(a) Load phase voltages of IH-UPQC
(b) Load phase voltages of conventional UPQC
(c) Grid currents of IH-UPQC
(d) Grid currents of conventional UPQC
(e) DC link voltages of H-UPQC
(f) DC link voltage of conventional UPQC

The cost of IH-UPQC mainly contains IFT, series transformer, back-to-back inverter, passive
hybrid filter. In distribution networks, the cost of distribution transformer in traditional
transformer gives a little lower price than IFT, while the higher capacity back-to-back inverter
are more expensive than hybrid back-to-back inverter. Thus, IHUPQC has suitability and ability
for replacing traditional UPQC in medium-voltage scenario.
FIGURE 7.9. Comparison results of reactive power compensation

(a) Normalized phase A voltage, grid current, load current of IH-UPQC
(b) Normalized phase A voltage, grid current, load current of conventional UPQC

CHAPTER-8
CONCLUSION
This article proposes an IH-UPQC to improve grid PQ and provide premium power supply
for sensitive NL and REG in medium-voltage park. Different from the conventional UPQC,
the IH-UPQC integrates shunt HAPF with IFT to implement inductive filtering, which is
rewarding to reduce adverse effects of harmonics on the transformer and beneficial to system
stability. The three-phase equivalent circuit and mathematical model are established to clarify
the mechanism of harmonic suppression and voltage regulation, the realization aspects of
control strategy and main circuit components design are discussed. The simulation results
indicate that the IH-UPQC not only suppresses harmonics and compensates reactive power
near the harmonic source, but also compensate grid voltage harmonics, unbalance and sag
simultaneously, which makes the overall distribution power system more clean and healthy.
The proposed method has a wide application potentials in industrial DC power supply
system, REG systems and HVDC transmission system
FUTURE SCOPE
The work in this thesis is limited to PI controller. With others, the Adaptive Neuro Fuzzy
inference system (ANFIS),sliding mode controllers, optimization techniques like genetic
algorithm(GA), particle swarm optimization(PSO), artificial bee colony algorithm(ABC) etc
controllers are used for tuning of PI controller.
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An Inductive Hybrid UPQC for Power Quality Management in Premium-

Power-Supply- Required Applications

AN INDUCTIVE HYBRID UPQC FOR POWER QUALITY

Under the esteemed guidance of

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

Dept. of electrical Engineering, AITS, RJPT 1

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

HYBRID UPQC FOR POWER QUALITY MANAGEMENT ”, done by

Signature of the Supervisor Signature of the Head of the Department

Assistant professor Professor and Head of theDepartment

Dept. of electrical Engineering, AITS, RJPT 2

EXTERNAL VIVA VOCE EXAMINATION HELD ON_________________

INTERNAL EXAMINER EXTERNAL EXAMINER

Dept. of electrical Engineering, AITS, RJPT 3

Dept. of electrical Engineering, AITS, RJPT 4

AN INDUCTIVE HYBRID UPQC FOR POWER QUALITY MANAGEMENT IN

Dept. of electrical Engineering, AITS, RJPT 5

Dept. of electrical Engineering, AITS, RJPT 6

7.2 GRID CURRENT OF THD 50

7.5 VOLTAGE SWELL COMPENSATION 52

7.6 DYNAMIC PERFORMANCE OF THE IH-UPQC UNDER

Dept. of electrical Engineering, AITS, RJPT 7

7.7 POWER WAVEFORM OF GRID AND LOAD 54

Dept. of electrical Engineering, AITS, RJPT 8

Dept. of electrical Engineering, AITS, RJPT 9

Dept. of electrical Engineering, AITS, RJPT 10

Dept. of electrical Engineering, AITS, RJPT 11

Dept. of electrical Engineering, AITS, RJPT 12

Dept. of electrical Engineering, AITS, RJPT 13

FIG.1.2.Traditional UPQC located at grid side

Dept. of electrical Engineering, AITS, RJPT 14

FIG.1.3.Traditional UPQC located at NL/REG side

Dept. of electrical Engineering, AITS, RJPT 15

FIGURE 2.1. Basic system configuration of the IH-UPQC.

FIGURE .2.2. The equivalent circuit of basic system.

Dept. of electrical Engineering, AITS, RJPT 16

2.1.FLEXIBLE AC TRANSMISSION SYSTEMS (FACTS CONTROLLERS)

Dept. of electrical Engineering, AITS, RJPT 17

Types of FACTS Controllers

Dept. of electrical Engineering, AITS, RJPT 18

2. Current Source Converter

Dept. of electrical Engineering, AITS, RJPT 19

Dept. of electrical Engineering, AITS, RJPT 20

aforementioned three-phase four-wire UPQC topologies is conducted, that the three

Dept. of electrical Engineering, AITS, RJPT 21

Neutral Point Converter (NPC):

Fig 2.3.Neutral Point Converter

Dept. of electrical Engineering, AITS, RJPT 22

Dept. of electrical Engineering, AITS, RJPT 23

Dept. of electrical Engineering, AITS, RJPT 24

reduction in system voltage by the utility or system operator to decrease demand or to

Dept. of electrical Engineering, AITS, RJPT 25

Linear and non linear loads :

Dept. of electrical Engineering, AITS, RJPT 26

Dept. of electrical Engineering, AITS, RJPT 27

Dept. of electrical Engineering, AITS, RJPT 28

Also, voltage equations of multi-winding transformer can be obtained as follows,

Similarly, the knot-voltage equations in FW are given by,