Ec8691 Unit I - PPT

EC8691 - MICROPROCESSORS AND
MICROCONTROLLERS
U.Vinothkumar
Asst Prof
Dept of ECE
Dr.N.G.P.Institute of Technology
Coimbatore.
UNIT I - THE 8086 MICROPROCESSOR (9 Hrs)
Introduction to 8086 – Microprocessor architecture –
Addressing modes - Instruction set and
assembler directives – Assembly language
programming – Modular Programming - Linking and
Relocation - Stacks - Procedures – Macros – Interrupts
and interrupt service routines – Byte and
String Manipulation.
2
Architecture
8086 Microprocessor
Architecture
Execution Unit (EU) Bus Interface Unit (BIU)
EU executes instructions that have BIU fetches instructions, reads data

already been fetched by the BIU. from memory and I/O ports, writes
data to memory and I/ O ports.
BIU and EU functions separately.
4
8086 Microprocessor
Architecture Bus Interface Unit (BIU)
Dedicated Adder to generate

20 bit address
Four 16-bit segment

registers
Code Segment (CS)

Data Segment (DS)
Stack Segment (SS)
Extra Segment (ES)
Segment Registers >> 5

8086 Microprocessor
Segment
Registers
8086’s 1-megabyte The 8086 can directly Programs obtain access

memory is divided address four segments to code and data in the
into segments of up (256 K bytes within the 1 segments by changing
to 64K bytes each. M byte of memory) at a the segment register
particular time. content to point to the
desired segments.
6
8086 Microprocessor
Segment Code Segment Register

Registers
16-bit
CS contains the base or start of the current code segment;

IP contains the distance or offset from this address to the
next instruction byte to be fetched.
BIU computes the 20-bit physical address by logically

shifting the contents of CS 4-bits to the left and then
adding the 16-bit contents of IP.
That is, all instructions of a program are relative to the

contents of the CS register multiplied by 16 and then offset
is added provided by the IP.
7
8086 Microprocessor
Segment Data Segment Register

Registers
16-bit
Points to the current data segment; operands for most

instructions are fetched from this segment.
The 16-bit contents of the Source Index (SI) or

Destination Index (DI) or a 16-bit displacement are used
as offset for computing the 20-bit physical address.
8
8086 Microprocessor
Segment Stack Segment Register

Registers
16-bit
Points to the current stack.
The 20-bit physical stack address is calculated from the

Stack Segment (SS) and the Stack Pointer (SP) for stack
instructions such as PUSH and POP.
In based addressing mode, the 20-bit physical stack

address is calculated from the Stack segment (SS) and the
Base Pointer (BP).
9
8086 Microprocessor
Segment Extra Segment Register

Registers
16-bit
Points to the extra segment in which data (in excess of

64K pointed to by the DS) is stored.
String instructions use the ES and DI to determine the 20-

bit physical address for the destination.
10
8086 Microprocessor
Segment Instruction Pointer

Registers
16-bit
Always points to the next instruction to be executed within

the currently executing code segment.
So, this register contains the 16-bit offset address pointing

to the next instruction code within the 64Kb of the code
segment area.
Its content is automatically incremented as the execution

of the next instruction takes place.
11
8086 Microprocessor
Instruction queue
A group of First-In-First-
Out (FIFO) in which up to
6 bytes of instruction
code are pre fetched
from the memory ahead
of time.
This is done in order to

speed up the execution
by overlapping
instruction fetch with
execution.
This mechanism is known

as pipelining.
12
8086 Microprocessor
Architecture Execution Unit (EU)
EU decodes and
executes instructions.
A decoder in the EU
control system
translates instructions.
16-bit ALU for

performing arithmetic
and logic operation
Four general purpose

registers(AX, BX, CX, DX);
Pointer registers (Stack

Pointer, Base Pointer);
and
Some of the 16 bit registers can be
Index registers (Source used as two 8 bit registers as :
Index, Destination Index)
each of 16-bits AX can be used as AH and AL
BX can be used as BH and BL
CX can be used as CH and CL 13
DX can be used as DH and DL
8086 Microprocessor
EU Accumulator Register (AX)

Registers
Consists of two 8-bit registers AL and AH, which can be
combined together and used as a 16-bit register AX.
AL in this case contains the low order byte of the word,

and AH contains the high-order byte.
The I/O instructions use the AX or AL for inputting /

outputting 16 or 8 bit data to or from an I/O port.
Multiplication and Division instructions also use the AX or

AL.
14
8086 Microprocessor
EU Base Register (BX)

Registers
Consists of two 8-bit registers BL and BH, which can be
combined together and used as a 16-bit register BX.
BL in this case contains the low-order byte of the word,

and BH contains the high-order byte.
This is the only general purpose register whose contents

can be used for addressing the 8086 memory.
All memory references utilizing this register content for

addressing use DS as the default segment register.
15
8086 Microprocessor
EU Counter Register (CX)

Registers
Consists of two 8-bit registers CL and CH, which can be
combined together and used as a 16-bit register CX.
When combined, CL register contains the low order byte of

the word, and CH contains the high-order byte.
Instructions such as SHIFT, ROTATE and LOOP use the

contents of CX as a counter.
Example:
The instruction LOOP START automatically decrements

CX by 1 without affecting flags and will check if [CX] =
0.
If it is zero, 8086 executes the next instruction;

otherwise the 8086 branches to the label START.
16
8086 Microprocessor
EU Data Register (DX)

Registers
Consists of two 8-bit registers DL and DH, which can be
combined together and used as a 16-bit register DX.
When combined, DL register contains the low order byte of

the word, and DH contains the high-order byte.
Used to hold the high 16-bit result (data) in 16 X 16

multiplication or the high 16-bit dividend (data) before a
32 ÷ 16 division and the 16-bit reminder after division.
17
8086 Microprocessor
EU Stack Pointer (SP) and Base Pointer (BP)

Registers
SP and BP are used to access data in the stack segment.
SP is used as an offset from the current SS during

execution of instructions that involve the stack segment in
the external memory.
SP contents are automatically updated (incremented/

decremented) due to execution of a POP or PUSH
instruction.
BP contains an offset address in the current SS, which is

used by instructions utilizing the based addressing mode.
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8086 Microprocessor
EU Source Index (SI) and Destination Index (DI)

Registers
Used in indexed addressing.
Instructions that process data strings use the SI and DI

registers together with DS and ES respectively in order to
distinguish between the source and destination addresses.
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8086 Microprocessor
EU Source Index (SI) and Destination Index (DI)

Registers
Used in indexed addressing.
Instructions that process data strings use the SI and DI

registers together with DS and ES respectively in order to
distinguish between the source and destination addresses.
20
8086 Microprocessor
Auxiliary Carry Flag
Carry Flag
Flag Register This is set, if there is a carry from the
This flag is set, when there is
lowest nibble, i.e, bit three during
addition, or borrow for the lowest a carry out of MSB in case of
nibble, i.e, bit three, during addition or a borrow in case
subtraction. of subtraction.
Sign Flag Zero Flag Parity Flag
This flag is set, when the This flag is set, if the result of This flag is set to 1, if the lower
result of any computation the computation or comparison byte of the result contains even
is negative performed by an instruction is number of 1’s ; for odd number
zero of 1’s set to zero.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF DF IF TF SF ZF AF PF CF
Tarp Flag
Over flow Flag If this flag is set, the processor
This flag is set, if an overflow occurs, i.e, if the result of a signed enters the single step execution
operation is large enough to accommodate in a destination
mode by generating internal
register. The result is of more than 7-bits in size in case of 8-bit
signed operation and more than 15-bits in size in case of 16-bit interrupts after the execution of
sign operations, then the overflow will be set. each instruction
Direction Flag Interrupt Flag
This is used by string manipulation instructions. If this flag bit
is ‘0’, the string is processed beginning from the lowest Causes the 8086 to recognize
address to the highest address, i.e., auto incrementing mode. external mask interrupts; clearing IF
Otherwise, the string is processed from the highest address disables these interrupts.
towards the lowest address, i.e., auto incrementing mode. 21
8086 Microprocessor
Architecture
8086 registers
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
categorized
into 4 groups OF DF IF TF SF ZF AF PF CF
Sl.No. Type Register width Name of register

1 General purpose register 16 bit AX, BX, CX, DX
8 bit AL, AH, BL, BH, CL, CH, DL, DH
2 Pointer register 16 bit SP, BP
3 Index register 16 bit SI, DI
4 Instruction Pointer 16 bit IP
5 Segment register 16 bit CS, DS, SS, ES
6 Flag (PSW) 16 bit Flag register

22
8086 Microprocessor
Architecture Registers and Special Functions
Register Name of the Register Special Function
AX 16-bit Accumulator Stores the 16-bit results of arithmetic and logic

operations
AL 8-bit Accumulator Stores the 8-bit results of arithmetic and logic

operations
BX Base register Used to hold base value in base addressing mode

to access memory data
CX Count Register Used to hold the count value in SHIFT, ROTATE

and LOOP instructions
DX Data Register Used to hold data for multiplication and division

operations
SP Stack Pointer Used to hold the offset address of top stack

memory
BP Base Pointer Used to hold the base value in base addressing

using SS register to access data from stack
memory
SI Source Index Used to hold index value of source operand (data)

for string instructions
DI Data Index Used to hold the index value of destination

operand (data) for string operations 23
ADDRESSING MODES
&
Instruction set
8086 Microprocessor
Introduction
Program
A set of instructions written to solve
a problem.
Instruction
Directions which a microprocessor
follows to execute a task or part of a
task.
Computer language
High Level Low Level
Machine Language Assembly Language
 Binary bits  English Alphabets

 ‘Mnemonics’
 Assembler
Mnemonics  Machine
Language 25
ADDRESSING MODES
8086 Microprocessor
Addressing Modes
Every instruction of a program has to operate on a data.

The different ways in which a source operand is denoted
in an instruction are known as addressing modes.
1. Register Addressing
Group I : Addressing modes for
2. Immediate Addressing register and immediate data
3. Direct Addressing
4. Register Indirect Addressing
5. Based Addressing
Group II : Addressing modes for
6. Indexed Addressing memory data
7. Based Index Addressing
8. String Addressing
9. Direct I/O port Addressing

Group III : Addressing modes for
10. Indirect I/O port Addressing I/O ports
11. Relative Addressing Group IV : Relative Addressing mode
12. Implied Addressing Group V : Implied Addressing mode

28
8086 Microprocessor Group I : Addressing modes for
Addressing Modes register and immediate data
1. Register Addressing The instruction will specify the name of the

register which holds the data to be operated by
2. Immediate Addressing the instruction.
3. Direct Addressing Example:
MOV CL, DH
5. Based Addressing
The content of 8-bit register DH is moved to
6. Indexed Addressing another 8-bit register CL
7. Based Index Addressing (CL)  (DH)
10. Indirect I/O port Addressing
11. Relative Addressing
12. Implied Addressing
29
8086 Microprocessor Group I : Addressing modes for
Addressing Modes register and immediate data
In immediate addressing mode, an 8-bit or 16-bit
2. Immediate Addressing data is specified as part of the instruction
Example:
MOV DL, 08H
5. Based Addressing
The 8-bit data (08H) given in the instruction is
6. Indexed Addressing moved to DL
7. Based Index Addressing (DL)  08H
MOV AX, 0A9FH
The 16-bit data (0A9FH) given in the instruction is
moved to AX register
(AX)  0A9FH
30
8086 Microprocessor
Addressing Modes : Memory Access
20 Address lines  8086 can address up to

220 = 1M bytes of memory
However, the largest register is only 16 bits
Physical Address will have to be calculated

Physical Address : Actual address of a byte in
memory. i.e. the value which goes out onto the
address bus.
Memory Address represented in the form –

Seg : Offset (Eg - 89AB:F012)
Each time the processor wants to access

memory, it takes the contents of a segment
register, shifts it one hexadecimal place to the
16 bytes of
left (same as multiplying by 1610), then add the contiguous memory
required offset to form the 20- bit address
89AB : F012  89AB  89AB0 (Paragraph to byte  89AB x 10 = 89AB0)

F012  0F012 (Offset is already in byte unit)
+ -------
98AC2 (The absolute address)
32
8086 Microprocessor Group II : Addressing modes
Addressing Modes for memory data
2. Immediate Addressing
Here, the effective address of the memory
location at which the data operand is stored is
4. Register Indirect Addressing given in the instruction.
5. Based Addressing The effective address is just a 16-bit number

written directly in the instruction.
6. Indexed Addressing
Example:
MOV BX, [1354H]
8. String Addressing MOV BL, [0400H]
The square brackets around the 1354H denotes
the contents of the memory location. When
executed, this instruction will copy the contents of
11. Relative Addressing the memory location into BX register.
12. Implied Addressing This addressing mode is called direct because the
displacement of the operand from the segment
base is specified directly in the instruction.
34
1. Register Addressing In Register indirect addressing, name of the

register which holds the effective address (EA)
2. Immediate Addressing will be specified in the instruction.
3. Direct Addressing Registers used to hold EA are any of the following

registers:
BX, BP, DI and SI.
5. Based Addressing
Content of the DS register is used for base
address calculation.
Example:
Note : Register/ memory
enclosed in brackets refer
MOV CX, [BX] to content of register/
9. Direct I/O port Addressing memory
Operations:
EA = (BX)
11. Relative Addressing BA = (DS) x 1610
MA = BA + EA
(CX)  (MA) or,
(CL)  (MA)
(CH)  (MA +1)
35
1. Register Addressing In Based Addressing, BX or BP is used to hold the

base value for effective address and a signed 8-bit
2. Immediate Addressing or unsigned 16-bit displacement will be specified
in the instruction.
In case of 8-bit displacement, it is sign extended
4. Register Indirect Addressing to 16-bit before adding to the base value.
5. Based Addressing When BX holds the base value of EA, 20-bit

physical address is calculated from BX and DS.
When BP holds the base value of EA, BP and SS is
used.
Example:
MOV AX, [BX + 08H]
Operations:
0008H  08H (Sign extended)
12. Implied Addressing EA = (BX) + 0008H
BA = (DS) x 1610
MA = BA + EA
(AX)  (MA) or,
(AL)  (MA)
36
(AH)  (MA + 1)
1. Register Addressing SI or DI register is used to hold an index value for

memory data and a signed 8-bit or unsigned 16-
2. Immediate Addressing bit displacement will be specified in the
instruction.
Displacement is added to the index value in SI or
4. Register Indirect Addressing DI register to obtain the EA.
5. Based Addressing In case of 8-bit displacement, it is sign extended

to 16-bit before adding to the base value.

Example:
MOV CX, [SI + 0A2H]
Operations:
FFA2H  A2H (Sign extended)
EA = (SI) + FFA2H
12. Implied Addressing BA = (DS) x 1610
MA = BA + EA
(CX)  (MA) or,
(CL)  (MA)
(CH)  (MA + 1)
37
1. Register Addressing In Based Index Addressing, the effective address

is computed from the sum of a base register (BX
2. Immediate Addressing or BP), an index register (SI or DI) and a
displacement.
Example:
MOV DX, [BX + SI + 0AH]
5. Based Addressing
Operations:
000AH  0AH (Sign extended)
8. String Addressing EA = (BX) + (SI) + 000AH

BA = (DS) x 1610
9. Direct I/O port Addressing MA = BA + EA
10. Indirect I/O port Addressing (DX)  (MA) or,
11. Relative Addressing (DL)  (MA)

(DH)  (MA + 1)
38
1. Register Addressing Employed in string operations to operate on string

data.
The effective address (EA) of source data is stored
3. Direct Addressing in SI register and the EA of destination is stored in
DI register.
Segment register for calculating base address of
5. Based Addressing source data is DS and that of the destination data
is ES

Example: MOVS BYTE
Operations:
Calculation of source memory location:
10. Indirect I/O port Addressing EA = (SI) BA = (DS) x 1610 MA = BA + EA
11. Relative Addressing Calculation of destination memory location:

EAE = (DI) BAE = (ES) x 1610 MAE = BAE + EAE
Note : Effective address of (MAE)  (MA)

the Extra segment register
If DF = 1, then (SI)  (SI) – 1 and (DI) = (DI) - 1
If DF = 0, then (SI)  (SI) +1 and (DI) = (DI)39+ 1
8086 Microprocessor Group III : Addressing
Addressing Modes modes for I/O ports
1. Register Addressing These addressing modes are used to access data

from standard I/O mapped devices or ports.
In direct port addressing mode, an 8-bit port
3. Direct Addressing address is directly specified in the instruction.
4. Register Indirect Addressing Example: IN AL, [09H]
5. Based Addressing Operations: PORTaddr = 09H

(AL)  (PORT)
Content of port with address 09H is
moved to AL register
In indirect port addressing mode, the instruction
9. Direct I/O port Addressing will specify the name of the register which holds
the port address. In 8086, the 16-bit port address
10. Indirect I/O port Addressing is stored in the DX register.
11. Relative Addressing Example: OUT [DX], AX
12. Implied Addressing Operations: PORTaddr = (DX)

(PORT)  (AX)
Content of AX is moved to port

whose address is specified by DX
register. 40
8086 Microprocessor Group IV : Relative
Addressing Modes Addressing mode
3. Direct Addressing In this addressing mode, the effective address of

a program instruction is specified relative to
4. Register Indirect Addressing Instruction Pointer (IP) by an 8-bit signed
displacement.
5. Based Addressing
Example: JZ 0AH
Operations:
8. String Addressing 000AH  0AH (sign extend)
9. Direct I/O port Addressing If ZF = 1, then
10. Indirect I/O port Addressing EA = (IP) + 000AH

BA = (CS) x 1610
11. Relative Addressing MA = BA + EA
12. Implied Addressing If ZF = 1, then the program control jumps to

new address calculated above.
If ZF = 0, then next instruction of the

program is executed.
41
8086 Microprocessor Group IV : Implied
Addressing Modes Addressing mode
5. Based Addressing
Instructions using this mode have no operands.
The instruction itself will specify the data to be
operated by the instruction.
Example: CLC
This clears the carry flag to zero.
42
INSTRUCTION SET
8086 Microprocessor
Instruction Set
8086 supports 6 types of instructions.
1. Data Transfer Instructions
2. Arithmetic Instructions
3. Logical Instructions
4. String manipulation Instructions
5. Process Control Instructions
6. Control Transfer Instructions
44
8086 Microprocessor
Instruction Set
Instructions that are used to transfer data/ address in to

registers, memory locations and I/O ports.
Generally involve two operands: Source operand and

Destination operand of the same size.
Source: Register or a memory location or an immediate data

Destination : Register or a memory location.
The size should be a either a byte or a word.
A 8-bit data can only be moved to 8-bit register/ memory

and a 16-bit data can be moved to 16-bit register/ memory.
45
8086 Microprocessor
Instruction Set
Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …
MOV reg2/ mem, reg1/ mem
MOV reg2, reg1 (reg2)  (reg1)

MOV mem, reg1 (mem)  (reg1)
MOV reg2, mem (reg2)  (mem)
MOV reg/ mem, data
MOV reg, data (reg)  data

MOV mem, data (mem)  data
XCHG reg2/ mem, reg1
XCHG reg2, reg1 (reg2)  (reg1)

XCHG mem, reg1 (mem)  (reg1)
46
8086 Microprocessor
Instruction Set
PUSH reg16/ mem
PUSH reg16 (SP)  (SP) – 2

MA S = (SS) x 16 10 + SP
(MA S ; MA S + 1)  (reg16)
PUSH mem (SP)  (SP) – 2

MA S = (SS) x 16 10 + SP
(MA S ; MA S + 1)  (mem)
POP reg16/ mem
POP reg16 MA S = (SS) x 16 10 + SP

(reg16)  (MA S ; MA S + 1)
(SP)  (SP) + 2
POP mem MA S = (SS) x 16 10 + SP

(mem)  (MA S ; MA S + 1)
(SP)  (SP) + 2
47
8086 Microprocessor
Instruction Set
IN A, [DX] OUT [DX], A
IN AL, [DX] PORTaddr = (DX) OUT [DX], AL PORTaddr = (DX)

(AL)  (PORT) (PORT)  (AL)
IN AX, [DX] PORTaddr = (DX) OUT [DX], AX PORTaddr = (DX)

(AX)  (PORT) (PORT)  (AX)
IN A, addr8 OUT addr8, A
IN AL, addr8 (AL)  (addr8) OUT addr8, AL (addr8)  (AL)
IN AX, addr8 (AX)  (addr8) OUT addr8, AX (addr8)  (AX)
48
8086 Microprocessor
Instruction Set
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
ADD reg2/ mem, reg1/mem
ADC reg2, reg1 (reg2)  (reg1) + (reg2)

ADC reg2, mem (reg2)  (reg2) + (mem)
ADC mem, reg1 (mem)  (mem)+(reg1)
ADD reg/mem, data
ADD reg, data (reg)  (reg)+ data

ADD mem, data (mem)  (mem)+data
ADD A, data
ADD AL, data8 (AL)  (AL) + data8

ADD AX, data16 (AX)  (AX) +data16
49
8086 Microprocessor
Instruction Set
ADC reg2/ mem, reg1/mem
ADC reg2, reg1 (reg2)  (reg1) + (reg2)+CF

ADC reg2, mem (reg2)  (reg2) + (mem)+CF
ADC mem, reg1 (mem)  (mem)+(reg1)+CF
ADC reg/mem, data
ADC reg, data (reg)  (reg)+ data+CF

ADC mem, data (mem)  (mem)+data+CF
ADD A, data
ADD AL, data8 (AL)  (AL) + data8+CF

ADD AX, data16 (AX)  (AX) +data16+CF
50
8086 Microprocessor
Instruction Set
SUB reg2/ mem, reg1/mem
SUB reg2, reg1 (reg2)  (reg1) - (reg2)

SUB reg2, mem (reg2)  (reg2) - (mem)
SUB mem, reg1 (mem)  (mem) - (reg1)
SUB reg/mem, data
SUB reg, data (reg)  (reg) - data

SUB mem, data (mem)  (mem) - data
SUB A, data
SUB AL, data8 (AL)  (AL) - data8

SUB AX, data16 (AX)  (AX) - data16
51
8086 Microprocessor
Instruction Set
SBB reg2/ mem, reg1/mem
SBB reg2, reg1 (reg2)  (reg1) - (reg2) - CF

SBB reg2, mem (reg2)  (reg2) - (mem)- CF
SBB mem, reg1 (mem)  (mem) - (reg1) –CF
SBB reg/mem, data
SBB reg, data (reg)  (reg) – data - CF

SBB mem, data (mem)  (mem) - data - CF
SBB A, data
SBB AL, data8 (AL)  (AL) - data8 - CF

SBB AX, data16 (AX)  (AX) - data16 - CF
52
8086 Microprocessor
Instruction Set
INC reg/ mem
INC reg8 (reg8)  (reg8) + 1
INC reg16 (reg16)  (reg16) + 1
INC mem (mem)  (mem) + 1
DEC reg/ mem
DEC reg8 (reg8)  (reg8) - 1
DEC reg16 (reg16)  (reg16) - 1
DEC mem (mem)  (mem) - 1
53
8086 Microprocessor
Instruction Set
MUL reg/ mem
MUL reg For byte : (AX)  (AL) x (reg8)

For word : (DX)(AX)  (AX) x (reg16)
MUL mem For byte : (AX)  (AL) x (mem8)

For word : (DX)(AX)  (AX) x (mem16)
IMUL reg/ mem
IMUL reg For byte : (AX)  (AL) x (reg8)

For word : (DX)(AX)  (AX) x (reg16)
IMUL mem For byte : (AX)  (AX) x (mem8)

For word : (DX)(AX)  (AX) x (mem16)
54
8086 Microprocessor
Instruction Set
DIV reg/ mem
DIV reg For 16-bit :- 8-bit :

(AL)  (AX) :- (reg8) Quotient
(AH)  (AX) MOD(reg8) Remainder
For 32-bit :- 16-bit :

(AX)  (DX)(AX) :- (reg16) Quotient
(DX)  (DX)(AX) MOD(reg16) Remainder
DIV mem For 16-bit :- 8-bit :

(AL)  (AX) :- (mem8) Quotient
(AH)  (AX) MOD(mem8) Remainder

(AX)  (DX)(AX) :- (mem16) Quotient
(DX)  (DX)(AX) MOD(mem16) Remainder
55
8086 Microprocessor
Instruction Set
IDIV reg/ mem
IDIV reg For 16-bit :- 8-bit :

(AL)  (AX) :- (reg8) Quotient
(AH)  (AX) MOD(reg8) Remainder

(AX)  (DX)(AX) :- (reg16) Quotient
(DX)  (DX)(AX) MOD(reg16) Remainder
IDIV mem For 16-bit :- 8-bit :

(AL)  (AX) :- (mem8) Quotient
(AH)  (AX) MOD(mem8) Remainder

(AX)  (DX)(AX) :- (mem16) Quotient
(DX)  (DX)(AX) MOD(mem16) Remainder
56
8086 Microprocessor
Instruction Set
CMP reg2/mem, reg1/ mem
CMP reg2, reg1 Modify flags  (reg2) – (reg1)
If (reg2) > (reg1) then CF=0, ZF=0, SF=0

If (reg2) < (reg1) then CF=1, ZF=0, SF=1
If (reg2) = (reg1) then CF=0, ZF=1, SF=0
CMP reg2, mem Modify flags  (reg2) – (mem)
If (reg2) > (mem) then CF=0, ZF=0, SF=0

If (reg2) < (mem) then CF=1, ZF=0, SF=1
If (reg2) = (mem) then CF=0, ZF=1, SF=0
CMP mem, reg1 Modify flags  (mem) – (reg1)
If (mem) > (reg1) then CF=0, ZF=0, SF=0

If (mem) < (reg1) then CF=1, ZF=0, SF=1
If (mem) = (reg1) then CF=0, ZF=1, SF=0
57
8086 Microprocessor
Instruction Set
CMP reg/mem, data
CMP reg, data Modify flags  (reg) – (data)
If (reg) > data then CF=0, ZF=0, SF=0

If (reg) < data then CF=1, ZF=0, SF=1
If (reg) = data then CF=0, ZF=1, SF=0
CMP mem, data Modify flags  (mem) – (mem)
If (mem) > data then CF=0, ZF=0, SF=0

If (mem) < data then CF=1, ZF=0, SF=1
If (mem) = data then CF=0, ZF=1, SF=0
58
8086 Microprocessor
Instruction Set
CMP A, data
CMP AL, data8 Modify flags  (AL) – data8
If (AL) > data8 then CF=0, ZF=0, SF=0

If (AL) < data8 then CF=1, ZF=0, SF=1
If (AL) = data8 then CF=0, ZF=1, SF=0
CMP AX, data16 Modify flags  (AX) – data16
If (AX) > data16 then CF=0, ZF=0, SF=0

If (mem) < data16 then CF=1, ZF=0, SF=1
If (mem) = data16 then CF=0, ZF=1, SF=0
59
8086 Microprocessor
Instruction Set
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
60
8086 Microprocessor
Instruction Set
61
8086 Microprocessor
Instruction Set
62
8086 Microprocessor
Instruction Set
63
8086 Microprocessor
Instruction Set
64
8086 Microprocessor
Instruction Set
65
8086 Microprocessor
Instruction Set
66
8086 Microprocessor
Instruction Set
67
8086 Microprocessor
Instruction Set
4. String Manipulation Instructions
 String : Sequence of bytes or words
 8086 instruction set includes instruction for string movement, comparison,

scan, load and store.
 REP instruction prefix : used to repeat execution of string instructions
 String instructions end with S or SB or SW.

S represents string, SB string byte and SW string word.
 Offset or effective address of the source operand is stored in SI register and

that of the destination operand is stored in DI register.
 Depending on the status of DF, SI and DI registers are automatically

updated.
 DF = 0  SI and DI are incremented by 1 for byte and 2 for word.
 DF = 1  SI and DI are decremented by 1 for byte and 2 for word.
68
8086 Microprocessor
Instruction Set

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
REP
REPZ/ REPE While CX  0 and ZF = 1, repeat execution of

string instruction and
(Repeat CMPS or SCAS until (CX)  (CX) – 1
ZF = 0)
REPNZ/ REPNE While CX  0 and ZF = 0, repeat execution of

string instruction and
(Repeat CMPS or SCAS until (CX)  (CX) - 1
ZF = 1)
69
8086 Microprocessor
Instruction Set

MOVS
MOVSB MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)
(MAE)  (MA)
If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1

If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) - 1
MOVSW MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)
(MAE ; MAE + 1)  (MA; MA + 1)

70
8086 Microprocessor
Instruction Set

Compare two string byte or string word
CMPS
CMPSB MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)
Modify flags  (MA) - (MAE)
If (MA) > (MAE), then CF = 0; ZF = 0; SF = 0

If (MA) < (MAE), then CF = 1; ZF = 0; SF = 1
CMPSW If (MA) = (MAE), then CF = 0; ZF = 1; SF = 0
For byte operation

For word operation

71
8086 Microprocessor
Instruction Set

Scan (compare) a string byte or word with accumulator
SCAS
SCASB MAE = (ES) x 1610 + (DI)

Modify flags  (AL) - (MAE)
If (AL) > (MAE), then CF = 0; ZF = 0; SF = 0

If (AL) < (MAE), then CF = 1; ZF = 0; SF = 1
If (AL) = (MAE), then CF = 0; ZF = 1; SF = 0
If DF = 0, then (DI)  (DI) + 1

If DF = 1, then (DI)  (DI) – 1
SCASW MAE = (ES) x 1610 + (DI)

Modify flags  (AL) - (MAE)
If (AX) > (MAE ; MAE + 1), then CF = 0; ZF = 0; SF = 0

If (AX) < (MAE ; MAE + 1), then CF = 1; ZF = 0; SF = 1
If (AX) = (MAE ; MAE + 1), then CF = 0; ZF = 1; SF = 0
If DF = 0, then (DI)  (DI) + 2

72
If DF = 1, then (DI)  (DI) – 2
8086 Microprocessor
Instruction Set

Load string byte in to AL or string word in to AX
LODS
LODSB MA = (DS) x 1610 + (SI)

(AL)  (MA)
If DF = 0, then (SI)  (SI) + 1

If DF = 1, then (SI)  (SI) – 1
LODSW MA = (DS) x 1610 + (SI)

(AX)  (MA ; MA + 1)
If DF = 0, then (SI)  (SI) + 2

If DF = 1, then (SI)  (SI) – 2
73
8086 Microprocessor
Instruction Set

Store byte from AL or word from AX in to string
STOS
STOSB MAE = (ES) x 1610 + (DI)

(MAE)  (AL)
If DF = 0, then (DI)  (DI) + 1

If DF = 1, then (DI)  (DI) – 1
STOSW MAE = (ES) x 1610 + (DI)

(MAE ; MAE + 1 )  (AX)
If DF = 0, then (DI)  (DI) + 2

If DF = 1, then (DI)  (DI) – 2
74
8086 Microprocessor
Instruction Set
5. Processor Control Instructions

Mnemonics Explanation
STC Set CF  1
CLC Clear CF  0
CMC Complement carry CF  CF/
STD Set direction flag DF  1
CLD Clear direction flag DF  0
STI Set interrupt enable flag IF  1
CLI Clear interrupt enable flag IF  0
NOP No operation
HLT Halt after interrupt is set
WAIT Wait for TEST pin active
ESC opcode mem/ reg Used to pass instruction to a coprocessor

which shares the address and data bus
with the 8086
LOCK Lock bus during next instruction 75

8086 Microprocessor
Instruction Set
Transfer the control to a specific destination or target instruction

Do not affect flags
 8086 Unconditional transfers
CALL reg/ mem/ disp16 Call subroutine
RET Return from subroutine
JMP reg/ mem/ disp8/ disp16 Unconditional jump
76
8086 Microprocessor
Instruction Set
 8086 signed conditional  8086 unsigned conditional

branch instructions branch instructions
Checks flags
If conditions are true, the program control is

transferred to the new memory location in the same
segment by modifying the content of IP
77
8086 Microprocessor
Instruction Set
 8086 signed conditional  8086 unsigned conditional

branch instructions branch instructions
Name Alternate name Name Alternate name

JE disp8 JZ disp8 JE disp8 JZ disp8
Jump if equal Jump if result is 0 Jump if equal Jump if result is 0
JNE disp8 JNZ disp8 JNE disp8 JNZ disp8

Jump if not equal Jump if not zero Jump if not equal Jump if not zero
JG disp8 JNLE disp8 JA disp8 JNBE disp8
Jump if greater Jump if not less or Jump if above Jump if not below
equal or equal
JGE disp8 JNL disp8 JAE disp8 JNB disp8
Jump if greater Jump if not less Jump if above or Jump if not below
than or equal equal
JL disp8 JNGE disp8 JB disp8 JNAE disp8
Jump if less than Jump if not Jump if below Jump if not above
greater than or or equal
equal
JLE disp8 JNG disp8 JBE disp8 JNA disp8
Jump if less than Jump if not Jump if below or Jump if not above
or equal greater equal 78
8086 Microprocessor
Instruction Set
 8086 conditional branch instructions affecting individual flags
JC disp8 Jump if CF = 1
JNC disp8 Jump if CF = 0
JP disp8 Jump if PF = 1
JNP disp8 Jump if PF = 0
JO disp8 Jump if OF = 1
JNO disp8 Jump if OF = 0
JS disp8 Jump if SF = 1
JNS disp8 Jump if SF = 0
JZ disp8 Jump if result is zero, i.e, Z = 1
JNZ disp8 Jump if result is not zero, i.e, Z = 1
79
8086 Microprocessor
Assembler Directives
Some Instructions in the Assembly language program which are

not a part of processor instruction set.
These instructions are instructions to the assembler, linker and

loader.
Control the generation of machine codes and organization of the

program; but no machine codes are generated for assembler
directives.
8086 supports assembler directives to assign names for

constants, variables of the user programs
Also called ‘pseudo instructions’
Used to :
› specify the start and end of a program
› attach value to variables
› allocate storage locations to input/output data
› define start and end of segments, procedures, macros etc..
80
8086 Microprocessor
Assemble Directives
DB Define Byte
DW Define a byte type (8-bit) variable
SEGMENT Reserves specific amount of memory

ENDS locations to each variable
ASSUME Range : 00H – FFH for unsigned value;

00H – 7FH for positive value and
ORG 80H – FFH for negative value
END
EVEN General form : variable DB value/values
EQU
PROC
FAR Example:
NEAR LIST DB 7FH, 42H, 35H
ENDP
Three consecutive memory locations are reserved for
SHORT the variable LIST and each data specified in the
instruction are stored as initial value in the reserved
MACRO memory location
ENDM 81
8086 Microprocessor
Assemble Directives
DB Define Word
DW Define a word type (16-bit) variable
SEGMENT Reserves two consecutive memory locations

ENDS to each variable
ASSUME Range : 0000H – FFFFH for unsigned value;

0000H – 7FFFH for positive value and
ORG 8000H – FFFFH for negative value
END
EVEN General form : variable DW value/values
EQU
PROC
FAR Example:
NEAR ALIST DW 6512H, 0F251H, 0CDE2H
ENDP
Six consecutive memory locations are reserved for
SHORT the variable ALIST and each 16-bit data specified in
the instruction is stored in two consecutive memory
MACRO location.
ENDM 82
8086 Microprocessor
Assemble Directives
DB SEGMENT : Used to indicate the beginning of

a code/ data/ stack segment
DW
ENDS : Used to indicate the end of a code/
SEGMENT data/ stack segment
ENDS
General form:
ASSUME
ORG
END Segnam SEGMENT
EVEN
…
EQU … Program code
… or
PROC … Data Defining Statements
…
FAR …
NEAR
ENDP Segnam ENDS
SHORT
MACRO User defined name of

the segment
ENDM 83
8086 Microprocessor
Assemble Directives
Informs the assembler, the names of the logical

DB segment to be assumed in the program.
DW A group of Instruction or data statement

contained between SEGMENT and ENDS
SEGMENT directives is called Logical segment.
ENDS
General form:
ASSUME ASSUME segreg : segnam, .. , segreg : segnam
ORG
User defined name of
END Segment Register
the segment
EVEN
EQU
Example:
PROC
FAR ASSUME CS: ACODE, DS:ADATA Informs the assembler that the
instruction for the program are in
NEAR the logical segment named as
ENDP ACODE and data items related to
the program are available in the
logical segment named as ADATA.
SHORT
MACRO
ENDM 84
8086 Microprocessor
Assemble Directives
ORG (Origin) is used to assign the starting Effective

DB address for a program/ data segment.
END is used to terminate a program; statements after

DW
END will be ignored.
SEGMENT EVEN : Informs the assembler to store program/ data

ENDS segment starting from an even address.
ASSUME EQU (Equate) is used to assign value to a variable.
ORG
Examples:
END
EVEN ORG 1000H Informs the assembler that the statements
EQU following ORG 1000H should be stored in
memory starting with effective address
1000H
PROC
FAR
LOOP EQU 10FEH Value of variable LOOP is 10FEH
NEAR
ENDP
SDATA SEGMENT In this data segment, effective address of
SHORT ORG 1200H memory location assigned to A will be 1200H
A DB 4CH and that of B will be 1202H and 1203H.
EVEN
MACRO B DW 1052H
ENDM SDATA ENDS 85
8086 Microprocessor
Assemble Directives
PROC Indicates the beginning of a procedure

DB
ENDP End of procedure
DW
FAR Intersegment call
SEGMENT
ENDS NEAR Intrasegment call
General form
ASSUME
ORG
procname PROC[NEAR/ FAR]
END
EVEN …
… Program statements of the
EQU procedure
…
PROC RET Last statement of the

procedure
ENDP
FAR procname ENDP
NEAR
SHORT User defined name of

the procedure
MACRO
ENDM 86
8086 Microprocessor
Assemble Directives
DB
Examples:
DW
SEGMENT ADD64 PROC NEAR The subroutine/ procedure named ADD64 is

ENDS declared as NEAR and so the assembler will
… code the CALL and RET instructions involved
… in this procedure as near call and return
ASSUME …
RET
ORG ADD64 ENDP
END
EVEN
EQU CONVERT PROC FAR The subroutine/ procedure named CONVERT
is declared as FAR and so the assembler will
… code the CALL and RET instructions involved
PROC … in this procedure as far call and return
ENDP …
FAR
RET
NEAR CONVERT ENDP
SHORT
MACRO
ENDM 87
8086 Microprocessor
Assemble Directives
DB Reserves one memory location for 8-bit

signed displacement in jump instructions
DW
Example:
SEGMENT
ENDS
ASSUME JMP SHORT The directive will reserve one

AHEAD memory location for 8-bit
ORG displacement named AHEAD
END
EVEN
EQU
PROC
ENDP
FAR
NEAR
SHORT
MACRO
ENDM 88
8086 Microprocessor
Assemble Directives
DB MACRO Indicate the beginning of a macro
DW ENDM End of a macro
SEGMENT General form:

ENDS
ASSUME macroname MACRO [Parameters...]

Program
… statements in
ORG … the macro
END …
EVEN
EQU macroname ENDM
PROC
ENDP
FAR User defined name of
NEAR the macro
SHORT
MACRO
ENDM 89
MODULAR PROGRAMMING
• The formulation of complex programs from numerous small

sequences called modules. Each module will perform a well-defined
task. Such formulation of computer code is called modular
programming.
The various steps in development of assembly language program are,
1.Defining the overall work to be done by the program.

2.Breaking the overall program task into smaller task.
3.Determine the various communication/data exchange between tasks.
4.Writing assembly language code for each task called modules.
5.Testing each module separately.
6.Combine the modules into single program.
7.Testing and debugging the program.
8.Documenting the program.
90
MODULAR PROGRAMMING
Hierarchical diagram which summarizes the relationships between

the modules and submodules.
91
MODULAR PROGRAMMING
The advantages of modular programming are,

1. Modules are easier to develop.
2. Modules can be developed independently by different

programmers.
3. Debugging and testing of modules can be carried independently.
4. Any future modifications may be localized.
5. Repeated task can be developed as module and stored as

subroutine/macro.
6. Common task can be developed as module and stored as library.
7. Documentation of modules can be made independently.
92
STACKS
1. The stack is a block of memory that may be used for temporarily

storing the contents of the registers.
2. It is a top-down data structure whose elements are accessed

using the stack pointer (SP) which gets decremented by two for
storing a data word into the stack and gets incremented by two
for retrieving a data word from the stack back to the register.
3. The stack segment, has a memory block of a maximum of 64

Kbytes locations, and thus may overlap with any other segments.
4. Stack Segment register (SS) contains the base address of the

stack segment in the memory.
5. Stack Pointer (SP) contains the offset address of the stack

segment in the memory.
93
STACKS cont……
6. In 8086 microprocessor based system, the stack is created by

loading a 16-bit base address in Stack Segment (SS) register
and a 16-bit offset address in Stack Pointer (SP). The 20-bit
physical address of the stack is computed by multiplying the
contents of SS register by 1610 and then adding the contents of
SP to this product.
7. If reset input is high, the SS-register and SP are cleared to zero.
8. For every write operation into stack, the SP is automatically

decremented by two and for every read operation from stack, the
SP is automatically incremented by two.
9. The contents of SS register will not be altered while reading or

writing into the stack.
94
STACKS cont……
• In an 8086 processor, the content of the register can be stored in the
stack using the PUSH instruction and the stored information can be
retrieved back to the register using the POP instruction.
• In 8086 processor, the order of retrieval should be reverse that of the

order of the storage.
• The stack in an 8086 is called Last- In-First-Out (LIFO) stack, i.e., the
last stored information can be read first.
Example of stack in 8086 is shown below
MOV AX, 4455h

MOV CX, 1234h
PUSH AX
PUSH CX
POP DX
POP BX
95
STACKS cont……
PUSH OPERATION:
96
STACKS cont……
POP OPERATION:
97
PROCEDURES
1. When a group of instructions are to be used several times to

perform a same function in a program, then we can write them as
a separate subprogram called procedure or subroutine.
2. procedures are written and assembled as separate program

modules and stored in memory.
3. When a procedure is called in the main program, the program

control is transferred to procedure and after executing the
procedure the program control is transferred back to the main
program.
4. In an 8086 processor, the instruction CALL is used to call a

procedure in the main program and the instruction RET is used to
return the control to the main program.
98
PROCEDURES cont…
5. The 8086 processor has two types of call instructions
 Intrasegment call or near call (call within a segment)
 Intersegment call or far call (call outside a segment)
6. A procedure can be called using near call instruction if it is stored

in the same segment where the main program is also stored.
7. A procedure can be called using far call instruction if the

procedure and main program are stored in different memory
segments.
8. The procedures or subroutines are terminated with RET

instructions.
9. The 8086 has two types of RET instructions

 near return
 far return
99
PROCEDURES cont…
10. The near return instruction is used to terminate a procedure
stored in the same segment.
11. The far return instruction is used to terminate a procedure stored

in a different segment.
12. In 8086 processor, When a procedure is called by using far call

instruction the following operations are performed.
 Push the contents of IP and CS-register in to the stack.
 Segment base address of procedure is loaded in CS register.
 Effective address of procedure is loaded in IP.
 Now the program control is transferred to procedure stored in

another segment.
The processor will start executing the instructions of the

procedure.
100
PROCEDURES cont…
 At the end of procedure, RET instruction is encountered.
 On executing the RET instruction, the top of stack (which is

the previous stored value) is popped to CS register and IP.
 Thus the program control is returned to main program.
13. When a procedure is called by using near call instruction the

following operations are performed.
 Push the contents of IP alone in stack.
 Effective address of procedure is loaded in IP.
 The Content of CS register is not altered.
 Now the program control is transferred to procedure stored

in same segment and so the processor will start executing
the instructions of the procedures.
101
PROCEDURES cont…
 At the end of procedure, RET instruction is encountered.
On executing the RET instruction, the top of stack (which is the
previous stored value) is popped to IP.
Thus, the program control is returned to main program.
Advantage of Using Procedures:

 The machine codes for the group of instructions in the procedure
has to be put in memory only once.
Disadvantage of Using Procedures:

 The need for a stack and the overhead time required to call the
procedure and return to the calling program.
 Linkage associated with them.
 It sometimes requires more code to program the linkage than is
needed to perform the task. In this case, a procedure may not
save memory.
 execution time is considerably increased.
102
Reentrant Procedure:
Recursive Procedure:
103
Example: Program using procedures (Near Call)
ASSUME CS:CODE, DS:DATA, SS:STACK_SEG
DATA SEGMENT
NUM1 DB 50H
NUM2 DB 20H
ADD_RES DB ?
SUB_RES DB ?
DATA ENDS
STACK_SEG SEGMENT
DW 40 DUP(0) ; stack of 40 words, all initialized to zero
TOS LABEL WORD
STACK_SEG ENDS
CODE SEGMENT
START:
MOV AX, DATA ; initialize data segment
MOV DS, AX
MOV AX, STACK_SEG ; initialize stack segment
MOV SS, AX
MOV SP, OFFSET TOS ; initialize stack pointer to TOS
CALL ADDITION
CALL SUBTRACTION
MOV AH, 4CH
INT 21H
ADDITION PROC NEAR

MOV AL, NUM1
MOV BL, NUM2
ADD AL, BL
MOV ADD_RES, AL
RET
ADDITION ENDP
SUBTRACTION PROC NEAR

MOV AL, NUM1
MOV BL, NUM2
SUB AL, BL
MOV SUB_RES, AL
RET
SUBTRACTION ENDP
CODE ENDS
END START
104
MACROS
• When a group of instructions are to be used several times to
perform a same function in a program.
• Also if the group of instructions are too small to be written as a

procedure, then they can be defined as a macro.
• Macro is a small group of instructions enclosed by the assembler

directives MACRO and ENDM.
• Macros are identified by their name and usually defined at the

start of a program.
• The macro is usually called by its name in the program.
• Whenever a macro is called in a program, the assembler will

insert the defined group of instructions in place of the call.
105
MACROS cont…
• In other words, the macro call is like shorthand expression which
tells the assembler, “ Every time you see a macro name in the
program, replace it with the group of instructions defined as
macro” .
• Actually the assembler generates machine codes for the group of
instructions defined as macro, whenever it is called in the
program.
• The process of replacing the macro with the instructions it
represent is called expanding the macro. Hence, macros are also
known as open subroutines because they get expanded at the
point of macro invocation.
Advantage of Using Macros:

 The overhead time involved in calling and returning from a
procedure is avoided.
Disadvantage of Using Macros:
 Take up more memory due to insertion of the machine codes in
the program at the place of macros
106
Example: Addition of two 16-bit numbers using macro
ADDITION MACRO NO1, NO2, RESULT
MOV AX, NO1
MOV BX, NO2
ADD AX, BX
MOV RESULT, AX
ENDM
ASSUME CS:CODE, DS:DATA
DATA SEGMENT
NUM1 DW 1000H
NUM2 DW 2000H
RES DW ?
DATA ENDS
CODE SEGMENT
START:
MOV AX, DATA ; initialize data segment
MOV DS, AX
ADDITION NUM1, NUM2, RES
MOV AH, 4CH
INT 21H
CODE ENDS
END START
107

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EC8691 - MICROPROCESSORS AND

Execution Unit (EU) Bus Interface Unit (BIU)

EU executes instructions that have BIU fetches instructions, reads data

Dedicated Adder to generate

Four 16-bit segment

Code Segment (CS)

Segment Registers >> 5

8086’s 1-megabyte The 8086 can directly Programs obtain access

Segment Code Segment Register

CS contains the base or start of the current code segment;

BIU computes the 20-bit physical address by logically

That is, all instructions of a program are relative to the

Segment Data Segment Register

Points to the current data segment; operands for most

The 16-bit contents of the Source Index (SI) or

Segment Stack Segment Register

Points to the current stack.

The 20-bit physical stack address is calculated from the

In based addressing mode, the 20-bit physical stack

Segment Extra Segment Register

Points to the extra segment in which data (in excess of

String instructions use the ES and DI to determine the 20-

Segment Instruction Pointer

Always points to the next instruction to be executed within

So, this register contains the 16-bit offset address pointing

Its content is automatically incremented as the execution

This is done in order to

This mechanism is known

16-bit ALU for

Four general purpose

Pointer registers (Stack

EU Accumulator Register (AX)

AL in this case contains the low order byte of the word,

The I/O instructions use the AX or AL for inputting /

Multiplication and Division instructions also use the AX or

EU Base Register (BX)

BL in this case contains the low-order byte of the word,

This is the only general purpose register whose contents

All memory references utilizing this register content for

EU Counter Register (CX)

When combined, CL register contains the low order byte of

Instructions such as SHIFT, ROTATE and LOOP use the

The instruction LOOP START automatically decrements

If it is zero, 8086 executes the next instruction;

EU Data Register (DX)

When combined, DL register contains the low order byte of

Used to hold the high 16-bit result (data) in 16 X 16

EU Stack Pointer (SP) and Base Pointer (BP)

SP is used as an offset from the current SS during

SP contents are automatically updated (incremented/

BP contains an offset address in the current SS, which is

EU Source Index (SI) and Destination Index (DI)

Instructions that process data strings use the SI and DI

EU Source Index (SI) and Destination Index (DI)

Instructions that process data strings use the SI and DI

Sign Flag Zero Flag Parity Flag

Sl.No. Type Register width Name of register

8 bit AL, AH, BL, BH, CL, CH, DL, DH

2 Pointer register 16 bit SP, BP