Circuit Note

CN-0383
Devices Connected/Referenced
4-Channel, Low Noise, Low Power, 24-
AD7124-4 Bit, Sigma-Delta ADC with PGA and
Circuits from the Lab® reference designs are engineered and Reference
tested for quick and easy system integration to help solve today’s
analog, mixed-signal, and RF design challenges. For more 8-Channel, Low Noise, Low Power, 24-
information and/or support, visit www.analog.com/CN0383. AD7124-8 Bit, Sigma-Delta ADC with PGA and
Reference
Ultralow Noise,150 mA CMOS Linear
ADP150
Regulator

Completely Integrated 2-Wire, 3-Wire, or 4-Wire RTD Measurement System Using a

Low Power, Precision, 24-Bit Σ-Δ ADC
EVALUATION AND DESIGN SUPPORT The AD7124-4/AD7124-8 integrate several important system
Circuit Evaluation Boards building blocks required to support RTD measurements.
AD7124-4 Evaluation Board (EVAL-AD7124-4SDZ) or Functions, including programmable excitation current sources
AD7124-8 Evaluation Board (EVAL-AD7124-8SDZ) and a programmable gain amplifier (PGA), excite and gain
System Demonstration Platform (EVAL-SDP-CK1Z or EVAL- the RTD, respectively, which allows direct interfacing with the
SDP-CB1Z) sensor and simplifies the design while reducing cost and power
Design and Integration Files consumption.
Schematics, Layout Files, Bill of Materials
Several options of the on-chip digital filtering and three
CIRCUIT FUNCTION AND BENEFITS integrated power modes, where the current consumption, range
of output data rates, settling time, and rms noise are optimized,
The circuit shown in Figure 1 is an integrated 2-wire, 3-wire, or
provide application flexibility. The current consumed in low
4-wire resistance temperature detector (RTD) system based on
power mode is only 255 µA and in full power mode is 930 µA.
the AD7124-4/AD7124-8 low power, low noise, 24-bit Σ-Δ analog-
In power-down mode, the complete ADC along with its auxiliary
to-digital converter (ADC) optimized for high precision
functions are powered down so that the AD7124-4/AD7124-8
measurement applications.
consume 1 µA typical. The power options make the AD7124-4/
This circuit note uses a Class B Pt100 RTD sensor with an accuracy AD7124-8 suitable for nonpower critical applications, such as
of ±0.3°C at 0°C but it can support other classes such as Class A, input modules, and also for low power applications, such as loop-
Class AA, 1/3 DIN, or 1/10 DIN that are higher accuracy RTDs. powered smart transmitters where the complete transmitter must
This circuit also has provision for Pt1000 RTDs that are useful consume less than 4 mA.
in low power applications.
The AD7124-4/AD7124-8 also have extensive diagnostic
The AD7124-4/AD7124-8 can achieve high resolution, low functionality integrated as part of its comprehensive feature set.
nonlinearity, and low noise performance as well as high 50 Hz This functionality can be used to check that the voltage level on
and 60 Hz rejection, suitable for industrial RTD systems. The the analog pins are within the specified operating range. These
typical peak to peak resolution of the system is 0.0043°C (17.9 bits) devices also include a cyclic redundancy check (CRC) on the
for full power mode, sinc4 filter selected, at an output data rate serial peripheral interface (SPI) bus and signal chain checks,
of 50 SPS, and 0.0092°C (16.8 bits) for low power mode, post which leads to a more robust solution. These diagnostics reduce
filter selected, at an output data rate of 25 SPS. These settings the need for external components to implement diagnostics,
show that the system accuracy is significantly better than the resulting in a smaller solution size, reduced design cycle times,
sensor accuracy. and cost savings.

Rev. C
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 CN-0383 Circuit Note
ADP150
VIN (USB)
VIN VOUT
10kΩ
10µF 0.1µF 4.7µF GND 4.7µF

EN NC

ADP150
VIN VOUT
10kΩ
4.7µF GND 4.7µF

EN NC
0.1µF
0.1µF 1µF

AVDD IOVDD

REGCAPD
RTD
IOUT0 AIN0 AIN0 0.1µF
IOUT IOUT0 RL1 IOUT REGCAPA
RTD AIN0 RTD IOUT0 IOUT0
0.1µF
RL1 1kΩ RL1 1kΩ RL2 1kΩ
AIN2 AIN2 AIN2
0.01µF 0.01µF 0.01µF
0.1µF 0.1µF 0.1µF
AD7124-4/
RL2 1kΩ RL2 1kΩ RL3 1kΩ
AIN3 AIN3 AIN3 AD7124-8

0.01µF 0.01µF 0.01µF

RL3 AIN1 RL4
IOUT1 SPI INTERFACE
IOUT1
1kΩ IOUT
RHEADROOM 1kΩ 1kΩ DOUT/RDY DOUT/RDY
REFIN1(+) REFIN1(+) RREF REFIN1(+)
IOUT 0.01µF 100Ω RREF 0.01µF 0.01µF
5.11kΩ IOUT 5.11kΩ DIN DIN
RREF 0.1% 0.1µF 5.11kΩ 0.1µF 0.1% 0.1µF
IOUT0 + IOUT1 0.1%
15ppm/°C 1kΩ 1kΩ 15ppm/°C SCLK SCLK
15ppm/°C 1kΩ
REFIN1(–) REFIN1(–) REFIN1(–)
RHEADROOM CS CS
RHEADROOM 250Ω 250Ω
0.01µF 0.01µF 0.01µF
SYNC SYNC

CLK

AVSS DGND

13369-001
Figure 1. 2-Wire, 3-Wire, or 4-Wire RTD Measurement Configuration
400
CIRCUIT DESCRIPTION
RTD Introduction 300
RTDs are frequently used sensors for temperature measurements.
A RTD is made from a pure metal (examples include platinum,
RESISTANCE (Ω)

200
nickel, or copper), which has a predictable change in resistance
as the temperature changes and can typically measure up to
100
+850°C. RTDs are capable of high accuracy and good stability
when compared with other types of temperature sensors such as
thermistors, thermocouples, and semiconductor (IC) temperature 0

sensors. The most widely used RTDs are platinum Pt100 and
Pt1000. These sensors are categorized by their nominal resistance –100

13369-002
–300 0 300 600 900
at 0°C. There are several industry standards that define the TEMPERATURE (°C)
tolerance and accuracy limits of a Platinum RTD sensor.
Figure 2. Pt100 RTD Resistance vs. Temperature
For the circuit in Figure 1, a Class B Pt100 RTD sensor was used
The three types of RTD configurations commonly used in RTD
which measures from −200°C to +600°C. The resistance of a
measurement applications are 2-wire, 3-wire, and 4-wire. A 2-wire
Class B Pt100 RTD is typically 100 Ω at 0°C and has a typical
configuration is the simplest. However, in this configuration,
temperature coefficient of ~0.385 Ω/°C (see Figure 2) and a
the lead resistance adds error because this resistance is in series
tolerance of ±0.3°C at 0°C. Any temperature above or below the
with the RTD and cannot be compensated for. Thus, 2-wire RTDs
RTD calibrated temperature (0°C) has a wider tolerance band
are used when lead wires are short, minimizing lead resistance
and lower accuracy. A Pt1000 RTD is also available in a similar
effects on accuracy. The resistance of long wire lengths can be
range and tolerances. However, the resistance value for a Pt1000
compensated for with a 3-wire connection using two excitation
RTD is higher by a factor of ten compared with the resistance
currents, while the error due to the resistance of long wire lengths is
value of the Pt100 sensor.
near eliminated using the 4-wire connection. Therefore, a 4-wire
configuration results in the best performance.
However, a 3-wire RTD requires only three connections to the
RTD, which is useful in designs where the connector size is
minimized (three connection terminal required vs. the 4-wire
terminal for a 4-wire RTD).
Rev. C | Page 2 of 20
 Circuit Note CN-0383
RTD Transfer Function RTD Measurements
From the specification of the PT100 RTD, the resistance changes To accurately measure the RTD resistance, a low level voltage is
by approximately 0.385 Ω/°C. This relationship can be used as a generated across the RRTD by a constant excitation current source.
quick method to get an approximate temperature of the RTD. This This low level voltage can then be amplified by the on-board
method has inaccuracies due to the temperature coefficient of PGA of the ADC and is then converted to a precision digital
the RTD changing slightly over the temperature range. However, it representation using the 24-bit Σ-Δ ADC. Errors in the current
can be a useful method to quickly check the temperature. source can be easily cancelled by referring the measurement to
To calculate the approximate temperature, use Equation 1, the voltage across a precision reference resistor (RREF) that is
where the resistance of the RTD is 100 Ω at 0°C. driven with the same current source, thereby resulting in a
ratiometric measurement result.
Temperature (°C) = (RRTD − 100)/0.385 (1)
The general expression to calculate the RTD resistance (R),
The RTD transfer function, known as the Callender-Van Dusen where the ADC is operating in unipolar mode, is given by
equation, gives a more accurate result. It is made up of two distinct
polynomial equations. Use Equation 2 for temperatures less (CODE × RREF )
RRTD = (6)
than 0°C, and use Equation 3 for temperatures greater than 0°C. G × 2N

The equation for temperature (T) ≤ 0°C follows: The general expression to calculate the RTD resistance (R),
where the ADC is operating in bipolar mode, is given by
RRTD(T) = R0(1 + AT + BT2 + C(T − 100°C)T3) (2)
The equation for T ≥ 0°C follows: (CODE − 2N − 1 ) × RREF
RRTD = (7)
G × 2N − 1
RRTD(T) = R0(1 + AT + BT ) 2
(3)
where:
where:
CODE is the ADC code.
RRTD(T) is the RTD resistance at temperature (T).
RREF is the reference resistor.
R0 is the RTD resistance at 0°C (in this case, R0 = 100 Ω).
N is the resolution of the ADC (24, in this case).
A = 3.9083 × 10−3.
G is the selected gain.
T is the RTD temperature (°C).
B = −5.775 × 10−7. As an example, the code read back from the AD7124-4/AD7124-8
C = −4.183 × 10−12. is configured in bipolar mode for a temperature set to 25°C is
11270065. Converting this code to a resistance using Equation 7
There are many different ways to determine the temperature
results in the following:
as a function of the RTD resistance given the transfer function
in Equation 2 and Equation 3. For this circuit note, the direct= (11270065 − 223 ) × RREF
RRTD = 109.704 Ω
mathematical method is chosen because of its accuracy. Using G × 223
Equation 3, the temperature can be calculated as
Linearization using Equation 4 gives a temperature of 24.921°C.
 r  As a second example, the code read back from the AD7124-4/
−A + A2 − 4 B  1 − 
 R0  AD7124-8 is configured in bipolar mode for a temperature set to
TRTD (°C) = (4)
2B −25°C is 10757779.
where r is the RTD resistance, and the other variables are as Converting this code to a resistance results in the following:
defined previously. (10757779 − 223 ) × RREF
=RRTD = 90.200 Ω
This method works well for temperatures ≥0°C. To calculate G × 223
the RTD temperature for temperatures below 0°C, a best fit
Linearization using Equation 5 gives a temperature of −24.982°C.
polynomial expression is required. The polynomial used in this
circuit note is a fifth-order polynomial, as shown in Equation 5.
TRTD (°C) = −242.02 + 2.2228 × r + (2.5859 × 10−3)r2 −
(48260 × 10−6)r3 − (2.8183 × 10−3)r4 +
(1.5243 × 10−10)r5 (5)

Rev. C | Page 3 of 20
 CN-0383 Circuit Note
RTD Design Considerations compliance of the excitation current source must also be
The following sections describes the general guidelines in considered when making RTD measurements. For this circuit,
designing circuit components and setting the required 500 µA is selected, which has an output compliance voltage of
operation of the RTD measurement circuit shown in Figure 1. AVDD − 0.37 V. The AVDD supply voltage for this circuit is 3.3 V.
Therefore, the output compliance level for the excitation
The RTD Wiring Configuration section covers the different
current source must be less than 2.93 V.
circuit techniques and connections used for each wiring
configuration. All considerations and calculations used for Using the Callender-Van Dusen equation, with an RTD
each circuit configuration shown can be refer to the RTD temperature range of −200°C to +600°C, the voltage generated
Wiring Configuration section. across the RTD using a 500 µA excitation current is approximately
9.26 mV to 156.85 mV.
ADC
Analog Inputs and Gain Selection
Along with the RTD sensor specification, the accuracy of the
system depends on the performance of the ADC. The AD7124-4/ Signals from the sensor are quite small and must be amplified
AD7124-8 provide an integrated solution for RTD measurement. by a low noise gain stage. RTDs vary from tens of millivolts to
These devices can achieve high resolution, low nonlinearity, and hundreds of millivolts depending on the RTD chosen. An ADC
low noise performance as well as high 50 Hz and 60 Hz rejection. with an internal PGA can be used to avoid the need for any
The AD7124-4/AD7124-8 consist of on-chip programmable external amplifier components. The AD7124-4/AD7124-8 consist
excitation current sources, reference buffers, and a low noise of an on-chip, low noise PGA that amplifies the small signal
PGA that amplifies the small signal from the RTD, thus allowing from the RTD with a gain programmable from 1 to 128, thus
direct interface with the sensor and minimizing the required allowing direct interface with the sensor. The gain stage has
external circuitry. high input impedance and limits the input leakage current to
3.3 nA typical for full power mode and 1 nA typical for low
Power Supplies power mode. If the on-chip excitation current is programmed
The AD7124-4/AD7124-8 have separate analog and digital power to 500 µA, at a maximum temperature of 600°C, the voltage
supplies. The digital power supply, IOVDD, is independent of the generated across the RTD is approximately 156.85 mV.
analog power supply and can be from 1.65 V to 3.6 V referenced To ensure that the maximum range of the AD7124-4/AD7124-8
to DGND. The analog power supply, AVDD, is referred to AVSS is used, the PGA gain is programmed to a gain of 16. The PGA
and has a range of 2.7 V to 3.6 V for low and mid power modes amplifies the maximum RTD sensor output voltage to 2.5096 V.
and a range of 2.9 V to 3.6 V for full power mode. The circuits
shown in Figure 1 operate from a single supply. Therefore, AVSS Reference and Reference Buffer Headroom
and DGND are connected together, and only one ground plane For the circuit shown in Figure 1, the reference inputs used are
is used. The AVDD and IOVDD voltages are generated separately REFIN+ and REFIN1−. The current through the RTD also flows
using ADP150 voltage regulators. The AVDD voltage is set to through the precision reference resistor that generates the
3.3 V, and the IOVDD voltage is set to 1.8 V, using the ADP150 reference voltage. The voltage generated across this precision
regulators. Using separate regulators ensures the lowest noise. reference resistor is ratiometric to the voltage across the RTD.
The power mode selection depends on the current budget Therefore, any variations seen in the excitation current are
allotment for the end application. If the application requires a removed.
much higher output data rate and better noise performance, the The reference is continuously sampled by a switched capacitor.
devices can be programmed in full power mode. For any portable In this circuit, the reference input is driven by an external reference
application, low power components must be used, and for some resistor. Note that large RC values can cause gain errors in
industrial applications, the complete system is powered from measurements. Enabling the internal reference buffers allow a
the 4 mA to 20 mA loop so that a current budget of 4 mA wide range of resistor values or EMC filtering without adding any
maximum is allowed. For this type of application, the devices error. Because the reference buffers are enabled, it is necessary
can be programmed in mid or low power mode. to ensure that the headroom required for correct operation is met.
Excitation Current and Output Compliance The reference voltage must be within the minimum and maximum
The AD7124-4/AD7124-8 offer two such excitation current reference voltages for operation. The AD7124-4/AD7124-8 can
sources that are register programmable from 50 µA to 1 mA. operate with a reference from 0.5 V to (AVDD − AVSS). The
The selection of excitation currents affects the RTD input reference buffers require a headroom of at least 0.1 V above and
voltage range, gain selection, and the reference and reference below the supply rails.
buffer headroom resistors. Maximize the possible excitation
current used for better performance. However, the output
Rev. C | Page 4 of 20
 Circuit Note CN-0383
Using the excitation current (IEXC) of 500 µA, and the amplified Digital and Analog Filtering
voltage of the ADC (VRTD MAX), the reference resistor value is
Differential (~800 Hz cutoff) and common-mode (~16 kHz
VRTD MAX/IEXC = 2.51 V/500 µA = 5020 Ω cutoff) filters are implemented at the analog inputs as well as
Therefore, a 5.11 kΩ resistor is chosen, which gives a reference at the reference inputs. This filtering is required to reject any
voltage (VREF) of interference at the modulator frequency and also at any
multiples of this frequency.
VREF = RREF × IEXC = 5.11 kΩ × 500 µA = 2.555 V
To get a high precision measurement from the sensor, it is also
The headroom of 0.125 V (500 µA × 250 Ω) is provided by the
important that the sensor noise and accuracy dominates the
250 Ω resistor to ground, as shown in Figure 1 (see the 2-wire
overall system error. Noise can impact the system accuracy
and 4-wire sections). This headroom resistor is required if the
because it limits the smallest possible change in the signal level
reference resistors are setup at the low side of the circuit. If the
of the sensor that the ADC can recognize and, therefore, directly
reference resistor is on the high side, as shown in Figure 1 (see the
impacts the resolution of the system. It may also have an impact
3-wire section), the headroom requirements for the reference
when performing calibration and accurate and repeatable
buffers are met for higher RTD temperature measurement
measurement results are required. Thus, it is important that the
(greater than 300°C). Therefore, additional headroom resistors
ADC resolution and noise performance is better than the sensor
are not required for this measurement configuration. However,
noise and resolution.
for lower RTD temperature measurement (less than 300°C), the
headroom of 0.1 V (500 µA × 100 Ω) is provided by the 100 Ω The AD7124-4/AD7124-8 offer a great deal of on-chip digital
resistor to ground, as shown in Figure 1 (see the 3-wire section). filtering flexibility. Several filter options are available. The filter
option selected has an effect on the output data rate, settling
From the previous discussions, the AVDD supply voltage for this
time, as well as the 50 Hz and 60 Hz rejection. For this circuit
circuit is 3.3 V. Therefore, the output compliance level for the
note, the sinc4 filter and the post filter are implemented. The
excitation current source must be less than 2.93 V, and the
sinc4 filter is used because it has excellent noise performance
reference voltage must be within the 0 V to 3.3 V range.
across the output data rates range, as well as excellent 50 Hz and
This specification is met because the maximum voltage on the 60 Hz rejection. The post filter is used to provide simultaneous
AIN0 (IOUT0) pin is the voltage across the precision reference 50 Hz and 60 Hz rejection with a 40 ms settling time.
resistor plus the voltage across the RTD plus the voltage across
The corresponding system rms noise values are shown in Table 1,
the headroom resistor:
and Table 2 also show the noise performance when the ADC
VREF + VRTD = 2.555 V + 156.85 mV = 2.71185 V analog inputs are shorted for the same filter, gain, and output
data rate settings. The noise measured is higher when the RTD
is connected because the RTD has some noise.

Table 1. Typical Noise Performance, Sinc4 Filter, Full Power Mode, 50 SPS
RTD Configuration Input Condition RMS Noise (nV) Noise Free Resolution
2-wire RTD connected 169.33 0.0029°C (18.09 bits)
Shorted 102 0.0017°C (18.83 bits)
3-wire RTD connected 199.37 0.0032°C (17.9 bits)
Shorted 100 0.0018°C (18.7 bits)
4-wire RTD connected 199.37 0.0032°C (17.9 bits)
Shorted 100 0.0018°C (18.7 bits)

Table 2. Typical Noise Performance, Post Filter, Low Power Mode, 25 SPS
RTD Configuration Input Condition RMS Noise (nV) Noise Free Resolution
2-wire RTD connected 347 0.0059°C (17.05 bits)
Shorted 335 0.0057°C (17.1 bits)
3-wire RTD connected 774 0.0070°C (16.8bits)
Shorted 360 0.0050°C (17.3 bits)
4-wire RTD connected 774 0.0070°C (16.8 bits)
Shorted 360 0.005°C (17.3 bits)

Rev. C | Page 5 of 20
 CN-0383 Circuit Note
Calibration 2-Wire RTD Configuration
The AD7124-4/AD7124-8 provide different calibration modes A 2-wire RTD configuration is the simplest configuration. Three
that can eliminate offset and gain errors. For this circuit note, analog pins from the AD7124-4/AD7124-8 are used to implement
internal zero-scale calibration as well as internal full-scale the 2-wire configuration: AIN0, AIN2, and AIN3. AIN2 and AIN3
calibration were used. Note that these calibrations remove the are configured as a fully differential input channel and are used for
ADC gain and offset errors only, not the gain and offset errors sensing the voltage across the RTD. The reference inputs used are
created by the external circuitry. REFIN+ and REFIN1−. A low-side reference resistor was used,
therefore a reference headroom resistor is required.
Diagnostics
For the 2-wire configuration, one excitation current source is
The AD7124-4/AD7124-8 have on-chip diagnostics that can
required. The excitation current source used to excite the RTD,
check that the voltage level on the analog pins are within the
reference, and headroom resistors is generated from AVDD and
specified operating range. All analog input pins (AINx) can be
is directed to AIN0 (IOUT0). The same current flows through
separately checked for overvoltages and undervoltages, as well as
the RTD and precision reference resistor that generates the
ADC saturation. An overvoltage is flagged when the voltage on
reference voltage, thus ensuring a ratiometric measurement.
the analog input exceeds AVDD, while an undervoltage is flagged
when the voltage on the analog input goes below AVSS. The For the 2-wire configuration, the AIN0 and AIN2 pins must be
extensive diagnostic functionality of the system also includes a shorted at the connector. AIN3 and REFIN1(+) must also be
CRC on the SPI bus and signal chain checks, which lead to a shorted at the connector. The analog pins and their configuration
more robust solution. These diagnostics reduce the need for are shown in greater detail in Figure 3. Selection of reference and
external components to implement diagnostics, resulting in headroom resistance was based on the RTD Design Considerations
smaller solution size, reduced design cycle times, and cost section along with the excitation, gain, and digital filtering.
savings. The failure mode effects and diagnostic analysis
(FMEDA) of a typical application has shown a safe failure IOUT
IOUT0
RTD
fraction (SFF) greater than 90% according to the IEC 61508
AIN0
RL1 1kΩ
standard. 0.01µF
AIN2

0.1µF
RTD Wiring Configuration RL2 1kΩ
AIN3
The AD7124-4 can be configured for 4 differential or 7 pseudo
0.01µF
differential input channels, and the AD7124-8 can be configured
for 8 differential or 15 pseudo differential channels. It uses a 1kΩ IOUT
REFIN1(+)
flexible multiplexer allowing the ease of sensor connections and
IOUT 0.01µF
5.11kΩ
RREF 0.1% 0.1µF
accommodating multiple 2-wire, 3-wire, and 4-wire RTDs on the 15ppm/°C 1kΩ
REFIN1(–)
same board (see Table 3).
RHEADROOM 250Ω
0.01µF

Table 3. Maximum Numbers of RTDs That Can Connect

13369-003
Wiring Configuration
Product 2 Wire 3 Wire 4 Wire Figure 3. 2-Wire RTD Analog Input Configuration Measurement
AD7124-4 2 2 2 The AD7124-4/AD7124-8 configuration for the 2-wire RTD
AD7124-8 5 4 5 measurement is as follows:
The following sections describe the circuit and ADC configuration • Differential input: the positive analog input (AIN+) =
for the three RTD wirings shown in Figure 1. These sections AIN2 and the negative analog input (AIN−) = AIN3
cover a deeper understanding and focus on each RTD • Excitation current: IOUT0 = AIN0 = 500 µA
configuration design, considering the different techniques • Gain = 16
needed to interface a RTD to an ADC, along with requirements • 5.11 kΩ precision reference resistor
from the ADC, such as ADC configuration, sensor connection, • 250 Ω headroom resistor
output compliance, and reference and gain selection, which was • Digital filtering (sinc4, 50 SPS and post filter, 25 SPS)
previously discussed in RTD Design Considerations section.
Each section also discusses the results, lessons learned, and take
aways from using each configuration with a single RTD sensor.

Rev. C | Page 6 of 20
 Circuit Note CN-0383
For the RTD circuit shown in Figure 3, data was gathered for With a two-point calibration and linearization, the overall 2-wire
different digital filter and power mode configurations of the system accuracy over the −50°C to +165°C temperature range
AD7124-4/AD7124-8, namely the sinc4 filter operating in full is better than ±1°C. For each temperature, the corresponding
power mode and the post filter operating in low power mode as voltage across the RTD was measured using the AD7124-4/
discussed in the Digital and Analog Filtering section. AD7124-8 as outlined previously. This voltage was then converted
The typical noise free code resolution of the 2-wire system is to a resistance, linearized, and converted to a temperature as
18.09 bits for full power mode with the sinc4 filter selected outlined in the RTD Transfer Function section.
and 17.05 bits for low power mode with the post filter, which Figure 6 and Figure 7 show the resulting error (set temperature
is equivalent to around 0.0029°C and 0.0059°C error variation minus measured temperature). For each RTD temperature
on each temperature measurements. Figure 4 and Figure 5 setting, the AD7124-4/AD7124-8 are kept at 25°C. As shown,
show the noise distribution when a 2-wire RTD is connected. the error is close to the RTD envelope at 0°C, and the lead
60 resistance adds error. Above or below 0°C, the measurement is
1000 SAMPLES well within the RTD specification. Figure 6 and Figure 7 also
50 show the deviation of the RTD error across different AD7124-4/
AD7124-8 temperature settings. For each AD7124-4/AD7124-8
40
temperature setting, an internal zero-scale and full-scale calibration
OCCURRENCES

is carried out. As shown in Figure 6 and Figure 7, the overall error

30
is again close to the envelope of the RTD at 0°C for the 2-wire
measurement. For all other temperatures, the error of the RTD
20
is well within the expected error of the Class B RTD for all
10
temperature settings of the AD7124-4/AD7124-8.
1.50
DELTA BETWEEN FORCED AND MEASURED (°C)

Pt100 TEMPERATURE PROFILE

1.25 +125°C WITH CALIBRATION
0
+105°C WITH CALIBRATION
1.00
11270661
11270665
11270668
11270671
11270674
11270677
11270680
11270683
11270686
11270689
11270692
11270695
11270698
11270701
11270704
11270707
11270710
11270713

+25°C WITH CALIBRATION

–40°C WITH CALIBRATION

Pt100 CLASS B ACCURACY

0.75

OVER TEMPERATURE
13369-004

0.50
CODES
0.25
Figure 4. Histogram of Codes for 2-Wire RTD at Ambient Temperature, 0
Sinc4 Filter, Full Power Mode, 50 SPS –0.25
30 –0.50
1000 SAMPLES –0.75
25 –1.00
–1.25
20 –1.50
OCCURRENCES

13369-006
–50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C)
15
Figure 6. 2-Wire RTD Temperature Accuracy Measurement, Sinc4 Filter,
Full Power Mode, 50 SPS
10
1.50
DELTA BETWEEN FORCED AND MEASURED (°C)

Pt100 TEMPERATURE PROFILE

1.25 +125°C WITH CALIBRATION
5 +105°C WITH CALIBRATION
1.00 +25°C WITH CALIBRATION
–40°C WITH CALIBRATION
Pt100 CLASS B ACCURACY

0.75
OVER TEMPERATURE

0 0.50
11269316
11269328
11269333
11269340
11269345
11269350
11269355
11269360
11269365
11269370
11269375
11269380
11269385
11269390
11269395
11269400
11269410
11269415
11269420
11269420
11269425
11269431

0.25
13369-005

CODES –0.25

Figure 5. Histogram of Codes for 2-Wire RTD at Ambient Temperature, –0.50

Post Filter, Low Power Mode, 25 SPS –0.75

–1.00
–1.25
–1.50
13369-007

–50 –25 0 25 50 75 100 125 150

TEMPERATURE (°C)

Figure 7. 2-Wire RTD Temperature Accuracy Measurement, Post Filter,

Low Power Mode, 25 SPS

Rev. C | Page 7 of 20
 CN-0383 Circuit Note
Figure 8 and Figure 9 show the error in the measured RTD 0.385 Ω/°C. Therefore, 1.3 Ω lead resistance produces an error of
temperature for a one time, internal zero-scale and full-scale (1.3/0.385) = 3.38°C error due to lead resistance.
calibration carried out at 25°C. Figure 8 and Figure 9 show The only way to compensate for this error is to manually calibrate
the one time calibration at 25°C or that the calibration at the offset, which is possible as long as the lead wire resistance
each individual temperature of the AD7124-4/AD7124-8 remains constant. However, the lead resistance also changes with
has degraded performance when the AD7124-4/ADA7124-8 temperature. Therefore, as the ambient temperature changes, the
are at higher temperatures due to the lead resistance errors. lead resistance also changes, which introduces some degree of
error in the temperature measurements. If the wire is long, this
1.50
DELTA BETWEEN FORCED AND MEASURED (°C)

Pt100 TEMPERATURE PROFILE

1.25 +125°C WITH CALIBRATION
+105°C WITH CALIBRATION source of error is significant.
1.00 +25°C WITH CALIBRATION
–40°C WITH CALIBRATION
Therefore, a 2-wire RTD configuration is mostly used in

Pt100 CLASS B ACCURACY

0.75

OVER TEMPERATURE
0.50 applications where lead wires are short or when using a high
0.25 resistance sensor (for example, PT1000), minimizing the lead
0
resistance effect on the accuracy.
–0.25
–0.50 3-Wire RTD Configuration
–0.75 The 3-wire RTD configuration is the most commonly used
–1.00
configuration because of its three pins and accuracy advantage
–1.25
over the other configurations.
–1.50
13369-008

–50 –25 0 25 50 75 100 125 150 For the circuit shown in Figure 10, four analog pins from
TEMPERATURE (°C)
the AD7124-4/AD7124-8 are used to implement the 3-wire
Figure 8. 2-Wire RTD Temperature Accuracy Measurement, Sinc4 Filter,
Full Power Mode, 50 SPS, One Time 25°C Calibration Only
measurement: AIN0, AIN1, AIN2, and AIN3. AIN2 and AIN3
1.50
are configured as a fully differential input channel and are used
DELTA BETWEEN FORCED AND MEASURED (°C)

1.25
Pt100 TEMPERATURE PROFILE for sensing the voltage across the Pt100 RTD sensor. The excitation
+125°C WITH CALIBRATION
1.00
+105°C WITH CALIBRATION
+25°C WITH CALIBRATION
current source used to excite the RTD is generated from AVDD
–40°C WITH CALIBRATION
and is directed to AIN0. An identical current is directed to AIN1
Pt100 CLASS B ACCURACY

0.75
OVER TEMPERATURE

0.50 and flows through the RL2 lead resistance, thereby generating a
0.25 voltage that cancels the voltage dropped across the RL1 lead
0
resistance. The reference inputs used are REFIN1+ and REFIN−.
A ratiometric configuration is again used, eliminating any errors
–0.25
–0.50
due to excitation current variation.
–0.75
–1.00 The analog pins and their configuration are shown in greater
–1.25 detail in Figure 10.
–1.50
13369-009

–50 –25 0 25 50 75 100 125 150

TEMPERATURE (°C) AIN0
IOUT0
RTD IOUT0
Figure 9. 2-Wire RTD Temperature Accuracy Measurement, Post Filter,
RL1 1kΩ
Low Power Mode, 25 SPS, 25°C One Time Calibration Only AIN2
0.01µF

Lead Resistance Consideration in 2-Wire RTD 0.1µF

RL2 1kΩ
AIN3
A 2-wire RTD implementation gives an error that is much
closer to the lower limit of the error bound. The reason behind RL3
0.01µF
AIN1
IOUT1
this is that the measurement of the 2-wire RTD is always higher RHEADROOM 1kΩ
IOUT1
REFIN1(+)
than the actual measurement due to its lead resistance. For the 100Ω RREF 0.01µF
5.11kΩ
2-wire RTD configuration, lead resistances, RL1 and RL2, in IOUT0 + IOUT1 0.1µF
0.1%
15ppm/°C 1kΩ
Figure 3 add resistance in series with the RTD element, thus REFIN1(–)

increasing the voltage measurement across the ADC inputs, 0.01µF

resulting in a higher measured temperature vs. the applied

13369-010

temperature.
Figure 10. 3-Wire RTD Analog Input Configuration Measurement
For example, the nominal resistance of 24 AWG copper wire is
0.026 Ω/foot (0.08 Ω/meter). If the RTD has leads of length of
25 foot, it has a total lead resistance (RL1 and RL2) equivalent
to 1.3 Ω. The RTD temperature coefficient is approximately
Rev. C | Page 8 of 20
 Circuit Note CN-0383
The AD7124-4/AD7124-8 configuration for the 3-wire RTD The typical noise free code resolution of the 3-wire system is
measurement is as follows: 17.9 bits for full power mode with the sinc4 filter selected and
• Differential input: AIN+ = AIN2 and AIN− = AIN3 16.8 bits for low power mode with the post filter, which is
• Excitation current: IOUT0 = AIN0 = 500 µA equivalent to around 0.0033°C and 0.0070°C error variation
• Excitation current: IOUT1 = AIN1 = 500 µA on each temperature measurements. Figure 11 and Figure 12
• Gain = 16 show the noise distribution when a 3-wire RTD is connected.
160
• 5.11 kΩ precision reference resistor 1000 SAMPLES
• 100 Ω headroom resistor 140

• Digital filtering (sinc4, 50 SPS and post filter, 25 SPS) 120

Selection of the reference, excitation current, gain, and digital

OCCURRENCES
100
filtering were based on the RTD Design Considerations section.
80
With the PGA enabled, the analog input buffers are automatically
enabled. The PGA allows voltages on the input pins to be as low 60

as AVSS. Therefore, headroom resistors are not required for the 40

analog input pins. The reference buffers are also enabled. As the
reference resistor is on the high side, the headroom requirements
20

for the reference buffers are met for higher RTD temperature 0

measurement (greater than 300°C). Therefore, additional

11270217

11270222

11270228

11270233

11270238

11270243

11270249

11270254
headroom resistors are not required for this measurement

13369-011
configuration. However, for lower RTD temperature measurement CODES

(less than 300°C), reference headroom resistors are required. Figure 11. Histogram of Codes for 3-Wire RTD at Ambient, Sinc4 Filter,
Full Power Mode, 50 SPS
For the 3-wire RTD measurement, two precision excitation
120
current sources are required that provide an simple way to
1000 SAMPLES
cancel the lead resistance errors produced by RL1 and RL2.
100
Note that the RL3 lead resistance does not affect the measurement
accuracy. For the 3-wire RTD configuration shown in Figure 10, 80
OCCURRENCES

the reference resistor is placed on the high side of the RTD. For
this setup, one excitation current flows through both the reference 60
resistor and the RTD, and the second current flows through the
RL2 lead resistance and develops a voltage that cancels the voltage 40

dropped across the RL1 lead resistance. Because only one excitation
current generates the reference voltage to REFIN1+ and REFIN− 20

and also generates the voltage across the RTD, the current
source accuracy, mismatch, and mismatch drift have a minimal 0
11270403

11270417

11270430

11270444

11270457

11270471

11270484

11270498

11270511

11270525

effect on the ADC transfer function. 11270538

13369-012
3-Wire RTD Results CODES

For the RTD circuit shown in Figure 10, data was gathered for Figure 12. Histogram of Codes for 3-Wire RTD at Ambient, Post Filter,
different digital filter and power mode configurations of the Low Power Mode, 25 SPS
AD7124-4/AD7124-8, namely the sinc4 filter operating in full With a two-point calibration and linearization, the overall
power mode and the post filter operating in low power mode as 3-wire system accuracy over the −50°C to +200°C temperature
discussed in Digital and Analog Filtering section. range is better than ±1°C. For each temperature, the corresponding
voltage across the RTD was measured using the AD7124-4/
AD7124-8 as outlined previously. This voltage was then converted
to a resistance, linearized, and converted to a temperature as
outlined in the RTD Transfer Function section.

Rev. C | Page 9 of 20
 CN-0383 Circuit Note
Figure 13 and Figure 14 show the resulting error (set temperature
1.50
AD7124-4/AD7124-8
1.25
minus measured temperature). For each RTD temperature TEMPERATURE
1.00 Pt100
setting, the AD7124-4/AD7124-8 are kept at 25°C, and the error +105°C
0.75 +25°C
is well within the error window of the Pt100 Class B. Figure 13 and 0.50
–40ºC

Figure 14 also show the deviation of the RTD error across different

ERROR (°C)
0.25
AD7124-4/AD7124-8 temperature settings. For each AD7124-4/ 0
AD7124-8 temperature setting, an internal zero-scale and full-scale –0.25
calibration is carried out. As shown in Figure 13 and Figure 14, –0.50
the overall error is well within the allowed error budget. –0.75
1.50 –1.00
AD7124-4/AD7124-8
1.25 TEMPERATURE –1.25
1.00 Pt100 –1.50

13369-015
+105°C –50 –25 0 25 50 75 100 125 150 175 200
0.75 +25°C
–40ºC Pt100 TEMPERATURE (°C)
0.50
Figure 15. 3-Wire RTD Temperature Accuracy Measurement, Sinc4 Filter,
ERROR (°C)

0.25
Full Power Mode, 50 SPS, One Time 25°C Calibration Only
0
1.50
–0.25 AD7124-4/AD7124-8
1.25 TEMPERATURE
–0.50
1.00 Pt100
–0.75 +105°C
0.75 +25°C
–1.00 –40ºC
0.50
–1.25
ERROR (°C)

0.25
–1.50
13369-013

–50 –25 0 25 50 75 100 125 150 175 200 0

Pt100 TEMPERATURE (°C) –0.25

Figure 13. 3-Wire RTD Temperature Accuracy Measurement, Sinc4 Filter, –0.50
Full Power Mode, 50 SPS –0.75
1.50 –1.00
AD7124-4/AD7124-8
1.25 TEMPERATURE –1.25
1.00 Pt100 –1.50

13369-016
+105°C –50 –25 0 25 50 75 100 125 150 175 200
0.75 +25°C
–40ºC Pt100 TEMPERATURE (°C)
0.50
Figure 16. 3-Wire RTD Temperature Accuracy Measurement, Post Filter,
ERROR (°C)

0.25
Low Power Mode, 25 SPS, 25°C One Time Calibration Only
0
–0.25 Lead Resistance Consideration for 3-Wire RTD
–0.50
For the 3-wire measurement, the second excitation current actively
compensates for the lead resistance. Therefore, any changes with
–0.75
–1.00
the lead resistance over temperature also no longer affect the
–1.25
measurement.
–1.50
13369-014

–50 –25 0 25 50 75 100 125 150 175 200

However, the accuracy of the lead resistance compensation
Pt100 TEMPERATURE (°C)
depends on the resistance of each of the leads being equal
Figure 14. 3-Wire RTD Temperature Accuracy Measurement, Post Filter,
Low Power Mode, 25 SPS (specifically, RL1 = RL2). The voltage dropped across RL3
does not affect the voltage measured across the RTD element.
Figure 15 and Figure 16 show the error in the measured RTD
Therefore, RL3 does not introduce error in the measurement
temperature for a one time, internal zero-scale and full-scale
for the circuits described in this circuit note.
calibration carried out at 25°C. Figure 15 and Figure 16 show
the one time calibration at 25°C and that the calibration at each So again, with a 24 AWG copper wire of 50 foot length, the
individual temperature of the AD7124-4/AD7124-8 results in resistance is 1.3 Ω. A 10% error in matching produces a 0.13 Ω
similar performance. error in the RTD measurement, assuming perfectly matched
compensation and excitation currents. The RTD temperature
coefficient is approximately 0.385 Ω/°C. Therefore, the 0.13 Ω
lead resistance mismatch measurement error translates into
approximately (0.13/0.385) = 0.337°C error due to the lead
resistance mismatch. Therefore, for accurate 3-wire measurements,

Rev. C | Page 10 of 20
 Circuit Note CN-0383
the matching characteristics of the connecting cables must be To chop the currents, a measurement of the RTD voltage is taken
known precisely. when IOUT0 is connected to AIN0, and IOUT1 is connected
Assuming perfect lead resistance matching, mismatches in the to AIN1, as shown in Figure 17. A second measurement of the
excitation currents (IOUT0 and IOUT1) produce an error that voltage across the RTD is then taken when the currents are
is proportional to the total lead resistance. For instance, a 0.5% swapped, that is, when IOUT1 is connected to AIN0, and
mismatch in the excitation currents (typical specification for IOUT1 is connected to AIN1. The average of these two voltage
the AD7124-4/AD7124-8) produces a corresponding 0.5% measurements is then used in the overall calculation of the RTD
error in the RTD resistance measurement. The nominal Pt100 resistance, and subsequently, the temperature is calculated using
RTD resistance temperature coefficient is 0.385 Ω/°C, which is Equation 2 through Equation 7. The chopping method greatly
equivalent to a temperature change of 2.6°C/Ω. A 0.5% error in reduces any effects of excitation current mismatch and mismatch
the resistance measurement gives an RTD measurement error of drift. However, there is an impact on the throughput rate
(0.005 × 2.6) = 0.013°C/Ω. For a lead resistance of 10 Ω (~400 feet because two measurements are required.
of 24 AWG copper wire), the error due to the mismatch in currents 250µA

is only 0.13°C. Pt100

AIN0

The previous discussion illustrates that, in most practical RL1 1kΩ

AIN2
applications, the mismatch in the lead resistances creates 0.01µF

much more error than the 0.5% mismatch in excitation RL2 1kΩ
0.1µF

currents. AIN3

RL3 0.01µF
In the Figure 10 circuit, the precision reference resistor was
placed on the high side. The high-side configuration works well AIN1
250µA
for systems using a single RTD. When multiple 3-wire RTDs are 1kΩ
used, it is better to place the precision resistor on the low side 500µA
5.11kΩ
0.01µF
REFIN1(+)

because only a single reference resistor is required. 0.1%

±15ppm/°C
0.1µF
1kΩ
REFIN1(–)
Current Source Mismatch and Mismatch Drift REFERENCE

13369-017
BUFFER 250Ω
HEADROOM 0.01µF
With the reference resistor on the low side, better excitation
current matching is required (3-wire RTD). The following two Figure 17. AD7124-4/AD7124-8 Configuration for 3-Wire RTD Measurement
Using the Current Chopping Measurement Technique
different techniques can minimize the errors due to mismatches
in the currents: Measurement data using the excitation current chopping method
was gathered, and the corresponding Pt100 temperature error
• Chopping the excitation currents
recorded as shown in Figure 18. For all RTD temperatures
• Calibration by measuring the excitation currents
measured, the temperature error is within the error band of the
Chopping the Excitation Currents Pt100 RTD for different ambient temperatures of the AD7124-4/
The crosspoint multiplexer on the AD7124-4/AD7124-8 allows AD7124-8. These results show that chopping the excitation
simple implementation of the chopping configuration. Figure 17 current gives results that are comparable to the data gathered
shows the 3-wire RTD configuration with the precision 5.11 kΩ with the high-side precision reference resistor configuration.
reference resistor connected to the low side of the Pt100 RTD. 1.50
AD7124-4/AD7124-8
For this configuration, the current source used as well as the
1.25 TEMPERATURE
1.00 Pt100
gain must be reconsidered. Both IOUT0 and IOUT1 are set to +105°C
0.75 +25°C
250 µA. Selecting this current ensures that the circuit complies –40ºC
0.50
with the output compliance of the current sources as well as the
ERROR (°C)

0.25
reference voltage generated across the precision resistor. To 0
ensure that the full range of the ADC is used, the gain of the –0.25
PGA was set to 32. A resistor is required on the low side of the –0.50
reference resistor because the reference buffers are enabled and –0.75
require headroom (100 mV). –1.00
–1.25
–1.50
13369-018

–50 –25 0 25 50 75 100 125 150 175 200

Pt100 TEMPERATURE (°C)

Figure 18. Temperature Accuracy Measurement for Chopping Configuration,

Sinc4 Filter, Full Power Mode, Calibration at Each Temperature
Rev. C | Page 11 of 20
 CN-0383 Circuit Note
1.50
Calibration by Measuring the Excitation Currents AD7124-4/AD7124-8
1.25 TEMPERATURE
The configuration for calibrating the 3-wire system by 1.00 Pt100
+105°C
measuring the excitation currents is shown in Figure 19. 0.75 +25°C
–40ºC
For this configuration, the precision reference resistor is 0.50
connected to the low side of the RTD. This configuration is

ERROR (°C)
0.25
similar to that used for chopping the currents, where both 0

the currents are set to 250 μA, and the PGA gain is set to 32. –0.25

However, the main difference is that an additional differential –0.50

input channel is required. The additional input channel enables –0.75

the measurement of the two excitation currents. The measurement –1.00

–1.25
is implemented by measuring the voltage drop across the precision
–1.50
reference resistor with respect to the internal reference when

13369-020
–50 –25 0 25 50 75 100 125 150 175 200
each of the excitation currents is individually enabled. The Pt100 TEMPERATURE (°C)

measured voltage is then converted to a current based on the value Figure 20. Temperature Accuracy Measurement for Excitation Current
of the precision reference resistor value, which is subsequently Calibration, Sinc4 Filter, Full Power Mode, Calibration at Each Temperature

used to calculate the ratio of the currents, and then used to Multiple 3-Wire RTD Configuration
calibrate the mismatch.
The AD7124-4/AD7124-8 can be used as a measurement system
250µA
for multiple 3-wire RTDs. When the ADC is configured in multiple
AIN0
Pt100 channels, the ADC automatically sequences through the enabled
channels, performing one conversion on each channel. When
RL1 1kΩ
AIN2
0.01µF the channel changes, the complete settling time of the filter is
0.1µF required to generate the conversion, thus affecting the overall
RL2 1kΩ
AIN3 throughput rate. Therefore, it is also important to consider
RL3 0.01µF the latency of the digital filter when muxing between multiple
AIN1 sensors. The excitation currents are outside the sequencer,
250µA which means users must write to the device to turn on or
1kΩ turn off the excitation currents and/or direct these currents to
500µA REFIN1(+)
0.01µF
5.11kΩ specific channels. However, the turn-on time is dependent on
0.1% 0.1µF
±15ppm/°C 1kΩ
REFIN1(–)
the external RC values connected to the ADC. Therefore, the actual
REFERENCE
BUFFER 250Ω turn-on or turn-off time is outside the control of Analog Devices,
HEADROOM 0.01µF
Inc., and must also be considered when taking measurements.
AIN4
To configure a single 3-wire RTD configuration, refer to the
13369-019

AIN5
3-Wire RTD Configuration section.
Figure 19. AD7124-4/AD7124-8 Configuration for 3-Wire RTD Measurement The AD7124-4 can connect two 3-wire RTDs, whereas the
Calibration by Measuring the Excitation Currents AD7124-8 can connect up to four 3-wire RTDs.
Figure 20 shows the calibrated temperature error in the RTD When multiple 3-wire RTDs are used, it is better to place the
measurements. The results show that the RTD error is within the precision resistor on the low side because only a single reference
expected error band of the RTD, where the error in measurement resistor is required. As a minimum, each 3-wire RTD requires
is close to the error profile of the RTD itself. To ensure accurate four pins of the AD7124-4/AD7124-8, two pins for the excitation
results, calibration of the currents must take place at regular currents and two pins for the analog inputs. Therefore, the
intervals over time. following steps needed to measure an RTD voltage are:
1. Set the external reference to REFIN1+ and REFIN1−.
2. Enable the analog input channel that has the RTD
connected across its input.

Rev. C | Page 12 of 20
 Circuit Note CN-0383
As an example, four 3-wire RTDs were connected to the AD7124-8 IOUT0

as shown in Figure 21. One 3-wire RTD is connected across the AD7124-8
AIN2 and AIN3 analog input pins (Channel 0 configuration),
RTD1 IOUT0
where the excitation currents come from AIN0 and AIN1, and AIN0
RL1 1kΩ
a second 3-wire RTD is also shown connected across the AIN4 AIN2
0.01µF IOUT1
0.1µF
and AIN5 analog input pins (Channel 1 configuration), where RL2 1kΩ
AIN3
AIN6 and AIN7 are used for the excitation currents and so on. 0.01µF
RL3
All of the RTD configurations are detailed in Table 4. IOUT1
AIN1

Table 4. Channel Configuration for Multiple 3-Wire RTDs

RTD2 IOUT0
Sensor Channel IOUT0 IOUT1 AIN+ AIN− AIN6
RL1 1kΩ
RTD1 0 AIN0 AIN1 AIN2 AIN3 AIN4
0.01µF 0.1µF
RTD2 1 AIN6 AIN7 AIN4 AIN5 RL2 1kΩ
AIN5
RTD3 2 AIN10 AIN11 AIN8 AIN9 0.01µF
RTD4 3 AIN14 AIN15 AIN12 AIN13 RL3 AIN7
IOUT1
Temperature measurements can then be carried out on each
RTD in turn by using the following steps: IOUT0
RTD3 AIN10
1. Enable the IOUT0 and IOUT1 currents to the RTD for RL1 1kΩ
AIN8
measuring. 0.01µF 0.1µF
RL2 1kΩ
2. Direct IOUT0 to AIN0 and IOUT1 to AIN1. The voltage is AIN9
0.01µF
measured on Channel 0 (AIN2 and AIN3). Therefore, RL3 AIN11
Channel 0 must be enabled. All other channels are disabled IOUT1

for this measurement.

3. Disable Channel 0, enable Channel 1, and direct the RTD4 IOUT0
AIN14
IOUT0 and IOUT1 currents to AIN6 and AIN7. The RL1 1kΩ
AIN12
0.01µF
voltage is then measured on Channel 1 (AIN4 and AIN5). 0.1µF
RL2 1kΩ
Note that the EVAL-AD7124-4SDZ/EVAL-AD7124-8SDZ AIN13
0.01µF
have an on-board thermistor across AIN4 and AIN5. When RL3 AIN15
using AIN4 and AIN5, remove this thermistor (R28). IOUT1

4. Repeat this sequence until all RTDs are measured. IOUT0 + IOUT1 1kΩ
REFIN1(+)
R REF 0.01µF 0.1µF
1kΩ
REFIN1(–)
RHEADROOM 0.01µF

13369-021
Figure 21. AD7124-8 Multiple 3-Wire RTD Configurations

Rev. C | Page 13 of 20
 CN-0383 Circuit Note
4-Wire RTD Configuration power mode and the post filter operating in low power mode as
discussed in Digital and Analog Filtering section.
A 4-wire RTD configuration is the most straight forward and
most accurate configuration. The only complexity in this The typical noise free code resolution of the 4-wire system is
configuration is the size of the 4-pin connector as compared 17.9 bits for full power mode with the sinc4 filter selected and
to the other two configurations which took up most of the PCB 16.8 bits for low power mode with the post filter, which is
area. Three analog pins on the AD7124-4/AD7124-8 are used equivalent to around 0.0033°C and 0.0070°C error variation
to implement the 4-wire RTD configuration: AIN0, AIN2, and on each temperature measurements. Figure 23 and Figure 24
AIN3. AIN2 and AIN3 are configured as a fully differential show the noise distribution when a 4-wire RTD is connected.
input channel and are used for sensing the voltage across the 90

RTD. The reference inputs used are REFIN1+ and REFIN−. A 80

low-side reference resistor was used, therefore a reference 70
1000 SAMPLES

headroom resistor is required.

60
For the 4-wire RTD configuration, one excitation current

OCCURANCES
50
source is required. The excitation current source used to excite
the RTD, reference, and headroom resistors is generated from 40

AVDD and is directed to AIN0 (IOUT0). The same current flows 30

through the RTD and precision reference resistor that generates 20

the reference voltage, thus ensuring a ratiometric measurement.
10
The analog pins and their configuration are shown in greater
0
detail in Figure 22. Selection of reference and headroom
11256419

11256427

11256435

11256443

11256451

11256459

11256467

11256475
resistance were based on the RTD Design Considerations

13369-023
section along with the excitation, gain, and digital filtering.
CODES

RTD Figure 23. Histogram of Codes for 4-Wire RTD at Ambient Temperature,
RL1 IOUT AIN0 Sinc4 Filter, Full Power Mode, 50 SPS
IOUT0
100
RL2 1kΩ
AIN2
0.01µF 90
0.1µF 1000 SAMPLES
80
RL3 1kΩ
AIN3
70
0.01µF
OCCURANCES

RL4 60

1kΩ 50
RREF REFIN1(+)
0.01µF
IOUT 5.11kΩ 40
0.1% 0.1µF
15ppm/°C 1kΩ
REFIN1(–) 30
RHEADROOM
250Ω 0.01µF 20
13369-022

10

0
11271570

11271585

11271600

11271615

11271630

11271645

11271659

11271674

11271689

11271704

11271719

Figure 22. 4-Wire RTD Analog Input Configuration Measurement

13369-024

The AD7124-4/AD7124-8 configuration for the 4-wire RTD

measurement is as follows: CODES

Figure 24. Histogram of Codes for 4-Wire RTD at Ambient Temperature,

• Differential input: AIN+ = AIN2 and AIN− = AIN3 Post Filter, Low Power Mode, 25 SPS
• Excitation current: IOUT0 = AIN0 = 500 µA
With a two-point calibration and linearization, the overall 4-wire
• Gain = 16
system accuracy over the −50°C to +200°C temperature range is
• 5.11 kΩ precision reference resistor
better than ±1°C. For each temperature, the corresponding voltage
• 250 Ω headroom resistor
across the RTD was measured using the AD7124-4/ AD7124-8
• Digital filtering (sinc4, 50 SPS and post filter, 25 SPS)
as outlined previously. This voltage was then converted to a
For the RTD circuit shown in Figure 22, data was gathered for resistance, linearized, and converted to a temperature as
the different digital filter and power mode configurations of the outlined in the RTD Transfer Function section.
AD7124-4/AD7124-8, namely the sinc4 filter operating in full

Rev. C | Page 14 of 20
 Circuit Note CN-0383
Figure 25 and Figure 26 show the resulting error (set
2.5
AD7124-4/AD7124-8
temperature minus measured temperature). For each RTD 2.0 TEMPERATURE

temperature setting, the AD7124-4/AD7124-8 is kept at 25°C, and 1.5 +105°C

Pt100
+25°C
the error is well within the error window of the Pt100 Class B. 1.0 –40ºC

Figure 25 and Figure 26 also show the deviation of the RTD

ERROR (°C)
0.5
error across different AD7124-4/AD7124-8 temperature settings. 0
For each AD7124-4/AD7124-8 temperature setting, an internal –0.5
zero-scale and full-scale calibration is carried out. As shown in
–1.0
Figure 25 and Figure 26, the overall error is well within the
–1.5
allowed error budget.
2.5 –2.0
AD7124-4/AD7124-8
2.0 TEMPERATURE –2.5

13369-027
–50 –25 0 25 50 75 100 125 150 175 200
1.5 +105°C Pt100 TEMPERATURE (°C)
+25°C Pt100
1.0 –40ºC Figure 27. 4-Wire Temperature Accuracy Measurement, Sinc4 Filter,
Full Power Mode, 50 SPS, One Time 25°C Calibration Only
ERROR (°C)

0.5
1.50
0 AD7124-4/AD7124-8
1.25 TEMPERATURE
–0.5 1.00 Pt100
+105°C
–1.0 0.75 +25°C
–40ºC
–1.5 0.50

ERROR (°C)
0.25
–2.0
0
–2.5
13369-025

–50 –25 0 25 50 75 100 125 150 175 200 –0.25

Pt100 TEMPERATURE (°C) –0.50

Figure 25. 4-Wire RTD Temperature Accuracy Measurement, Sinc4 Filter, –0.75
Full Power Mode, 50 SPS –1.00
3 –1.25
AD7124-4/AD7124-8
TEMPERATURE –1.50

13369-028
–50 –25 0 25 50 75 100 125 150 175 200
2
+105°C Pt100 TEMPERATURE (°C)
+25°C Pt100
1
–40ºC Figure 28. 4-Wire RTD Temperature Accuracy Measurement, Post Filter,
Low Power Mode, 25 SPS, 25°C One Time Calibration Only
ERROR (°C)

0 Lead Resistance Consideration in 4-Wire RTD

To fully compensate for lead wire resistance error, a 4-wire RTD
–1
configuration is recommended. Here, two additional wires are
connected to both ends of the RTD, one pair delivers the current,
–2
and the other pair performs the voltage measurement so that
–3
any resistance in the lead wires does not have any effect on the
13369-026

–50 –25 0 25 50 75 100 125 150 175 200 measurement. Therefore, 4-wire RTDs give the most accurate
Pt100 TEMPERATURE (°C)
measurements.
Figure 26. 4-Wire RTD Temperature Accuracy Measurement, Post Filter,
Low Power Mode, 25 SPS Multiple 2-Wire/4-Wire RTD Configuration
Figure 27 and Figure 28 show the error in the measured RTD The AD7124-4/AD7124-8 can be used as a measurement system
temperature for a one time, internal zero-scale and full-scale for multiple 2-wire/4-wire RTDs. When the ADC is configured
calibration carried out at 25°C. Figure 27 and Figure 28 show in multiple channels, the ADC automatically sequences through
the one time calibration at 25°C and that the calibration at each the enabled channels, performing one conversion on each
individual temperature of the AD7124-4/AD7124-8 gives similar channel. When the channel changes, the complete settling time
performances. of the filter is required to generate the conversion, thus affecting the
overall throughput rate. Therefore, it is also important to consider
the latency of the digital filter when muxing between multiple
sensors. The excitation currents are outside the sequencer, which
means users must write to the device to turn on or turn off the
excitation currents and/or direct these currents to specific
Rev. C | Page 15 of 20
 CN-0383 Circuit Note
channels. However, the turn-on time is dependent on the external IOUT0

RC values connected to the ADC. Therefore, the actual turn on RTD1

AD7124-8
or turn off time is outside the control of Analog Devices and RL1 IOUT
AIN0
must also be considered when taking measurements.
RL2 1kΩ
AIN2
To configure a single 2-wire or 4-wire configuration, refer 0.01µF 0.1µF
RL3 1kΩ
to the 2-Wire RTD Configuration section or the 4-Wire RTD AIN3
0.01µF
Configuration section.
RL4
The AD7124-4 can connect two 2-wire/4-wire RTDs, whereas
the AD7124-8 can connect up to five 2-wire/ 4-wire RTDs. The RTD2

RL1 IOUT
same reference input can be used for all RTDs, and one current AIN1
source can be used to excite all RTDs. The current is directed RL2 1kΩ
to the top side of each of the RTDs in turn when the RTD AIN4
0.01µF 0.1µF
temperature measurement is required. The cross multiplexer RL3 1kΩ
AIN5
on the AD7124-4/AD7124-8 allows multiple channels to be 0.01µF
RL4
configured separately, where each channel can be configured
for different setups. RTD3

The steps needed to measure an RTD voltage are as follows: RL1 IOUT
AIN8
1. Set the external reference to REFIN1+ and REFIN1−. RL2 1kΩ
AIN6
2. Enable the IOUT0 current to the RTD for measuring. 0.01µF 0.1µF
3. Enable the analog input channel that has the RTD RL3 1kΩ
AIN7
connected across its input. 0.01µF
RL4
As an example, five 2-wire/4-wire RTDs were connected to the
AD7124-8 as shown in Figure 29 and Figure 30. One 2-wire/ RTD4

4-wire RTD is connected across the AIN2 and AIN3 analog input RL1 IOUT
AIN11
pins (Channel 0 configuration), where the excitation current comes
RL2 1kΩ
from AIN0, a second 2-wire/4-wire RTD is also shown connected AIN9
0.01µF 0.1µF
across the AIN4 and AIN5 analog input pins (Channel 1 RL3 1kΩ
AIN10
configuration), where AIN1 is used for the excitation current, 0.01µF

and so on. All of the RTD configurations are detailed in Table 5. RL4

Table 5. Channel Configuration for Multiple 2-Wire/4-Wire RTD5

RTDs RL1 IOUT
AIN14
Sensor Channel IOUT0 AIN+ AIN−
RL2 1kΩ
RTD1 0 AIN0 AIN2 AIN3 AIN12
0.01µF 0.1µF
RTD2 1 AIN1 AIN4 AIN5 RL3 1kΩ
AIN13
RTD3 2 AIN8 AIN6 AIN7 0.01µF

RTD4 3 AIN11 AIN9 AIN10 RL4

RTD5 4 AIN14 AIN12 AIN13

IOUT 1kΩ
Temperature measurements were then carried out on each RTD REFIN1(+)
RREF 0.01µF 0.1µF
in turn by using the following steps: 1kΩ
REFIN1(–)
13369-029

RHEADROOM 0.01µF
1. Direct IOUT0 to AIN0. The voltage is measured on
Channel 0 (AIN2, AIN3). Therefore, Channel 0 must be
Figure 29. AD7124-8 Multiple 4-Wire RTD Configurations
enabled. All other channels are disabled for this measurement.
2. Disable Channel 0, enable Channel 1, and direct the IOUT0
current to AIN1. The voltage is then measured on Channel 1
(AIN4 and AIN5). Note that the EVAL-AD7124-4SDZ or
the EVAL-AD7124-8SDZ have an on-board thermistor
across AIN4 and AIN5. When using AIN4 and AIN5,
remove this thermistor (R28).
3. Repeat this sequence until all RTDs are measured.
Rev. C | Page 16 of 20
Circuit Note CN-0383
IOUT0 COMMON VARIATIONS
AD7124-8 When multiple RTDs are used, it is better to place the precision
IOUT
RTD1 AIN0 resistor on the low side because only a single reference resistor
RL1 1kΩ is required. The performance of the circuit can be enhanced by
AIN2
0.01µF 0.1µF using a higher grade RTD class with a higher accuracy, less than
RL2 1kΩ
AIN3 ±0.1°C at 0°C. With a PT1000 sensor, lower excitation currents are
0.01µF
used, which makes the device suitable for low power applications.
IOUT When using a single 2-wire or 4-wire RTD, the precision resistor
RTD2 AIN1
can also be placed on the high side. The performance is the
RL1 1kΩ
AIN4 same as that achieved with the reference resistor on the low side.
0.01µF 0.1µF
RL2 1kΩ
AIN5 CIRCUIT EVALUATION AND TEST
0.01µF
Equipment Needed
IOUT The following equipment is required for the 2-wire, 3-wire, or
RTD3 AIN8
4-wire RTD measurement system:
RL1 1kΩ

0.01µF
AIN6
• The EVAL-AD7124-4SDZ or the EVAL-AD7124-8SDZ
0.1µF
RL2 1kΩ
AIN7
evaluation board
0.01µF • The EVAL-SDP-CK1Z or the EVAL-SDP-CB1Z system
demonstration platform (SDP)
RTD4
IOUT
AIN11 • The AD7124_Eval+ software
RL1 1kΩ • A power supply that is USB powered
AIN9
0.01µF 0.1µF
• A Class B, Pt100, 2-wire, 3-wire, or 4-wire RTD
1kΩ
RL2
AIN10 • A PC running Windows® with a USB 2.0 port
0.01µF
Software Installation
RTD5
IOUT
AIN14 A complete software user guide for the AD7124-4/AD7124-8
RL1 1kΩ and the EVAL-SDP-CK1Z or the EVAL-SDP-CB1Z can be found
0.01µF
AIN12
in the EVAL-AD7124-4SDZ or the EVAL-AD7124-8SDZ user
0.1µF
RL2 1kΩ
AIN13
guide and the SDP User Guide.
0.01µF
The software is required to interface with the hardware. Download
IOUT 1kΩ IOUT this software from ftp://ftp.analog.com/pub/evalcd/AD7124. If the
REFIN1(+)
RREF 0.01µF 0.1µF setup file does not run automatically, double-click the setup.exe
1kΩ
REFIN1(–) file. Install the evaluation software before connecting the EVAL-
13369-030

RHEADROOM 0.01µF
AD7124-4SDZ or the EVAL-AD7124-8SDZ and the EVAL-
SDP-CK1Z or the EVAL-SDP-CB1Z to the USB port of the PC
Figure 30. AD7124-8 Multiple 2-Wire Configurations
to ensure that the evaluation system is recognized correctly
when connected to the PC.
After the evaluation software installation is complete, connect
the EVAL-SDP-CK1Z or the EVAL-SDP-CB1Z to the EVAL-
AD7124-4SDZ or the EVAL-AD7124-8SDZ and then connect
the EVAL-SDP-CK1Z or the EVAL-SDP-CB1Z to the USB port
of the PC using the supplied cable. When the evaluation system
is detected, proceed through any dialog boxes that appear to
complete installation.

Rev. C | Page 17 of 20
 CN-0383 Circuit Note
Setup and Test After selecting the evaluation board, the window shown in
Do not connect power to the hardware until both the EVAL- Figure 33 appears. To configure the AD7124-4/AD7124-8 for
AD7124-4SDZ or the EVAL-AD7124-8SDZ and the EVAL-SDP- 2-wire, 3-wire, or 4-wire RTD measurements, click the 2-WIRE
CK1Z or the EVAL-SDP-CB1Z are connected. Figure 31 shows a RTD, 3-WIRE RTD, or 4-WIRE RTD Demo Modes button
functional block diagram of the test setup for the 2-wire, 3-wire, (see Figure 33).
or 4-wire RTD configuration.

PC

USB
2-/3-/4-WIRE
SPI
RTD ADA7124-4/ADA7124-8 SDP

13369-031
CIRCUIT EVALUATION BOARD CONTROLLER

Figure 31. Test Setup Functional Diagram

The EVAL-AD7124-4SDZ or the EVAL-AD7124-8SDZ is required

to test the circuit. In addition, the following sensor and resistors
are required for proper operation:
• 2-wire, 3-wire, or 4-wire Pt100 RTD, Class B

13369-033
• 5.11 kΩ precision reference resistor
• 250 Ω or 100 Ω resistor for buffer headroom Figure 33. AD7124_Eval+ Software Window
To configure the hardware, take the following steps: Clicking a Demo Modes button configures the ADC software
• Set all links on the EVAL-AD7124-4SDZ or the EVAL- for each RTD configuration. One additional step is required
AD7124-8SDZ to the default board positions as outlined before the AD7124-4/AD7124-8 is configured for each RTD
in the EVAL-AD7124-4SDZ or the EVAL-AD7124-8SDZ measurement: an internal full-scale and zero-scale calibration
user guide. of the AD7124-4/AD7124-8. This calibration can be performed
• Power the EVAL-AD7124-4SDZ or the EVAL-AD7124- via the Registers tab (see Figure 34).
8SDZ with a 7 V or 9 V power source connected to J5.
• Connect the RTD, precision reference resistor, and the
resistor for buffer headroom depending on which RTD
configuration is used (2-wire, 3-wire, or 4-wire). See the
CN-0383 Hardware and Software User Guide Wiki page.
• Connect the EVAL-SDP-CK1Z or the EVAL-SDP-CB1Z to
the PC via the USB cable.
Run the AD7124_Eval+ Software. This evaluation software
supports both the AD7124-4 and the AD7124-8. When running
the software, select the evaluation board that is connected to the
PC. For the AD7124-8, select EVAL-AD7124-8SDZ from the
dropdown menu (see Figure 32).
13369-034

Figure 34. Registers Tab

For more details about the ADC register map settings, calibration,
and measurements procedures, see the CN-0383 Hardware and
Software User Guide Wiki page.
13369-032

Figure 32. AD7124-4/AD7124-8 Evaluation Board Selection

Rev. C | Page 18 of 20
 Circuit Note CN-0383
LEARN MORE REVISION HISTORY
CN-0383 Design Support Package: 10/2020—Rev. B to Rev. C
www.analog.com/CN0383-DesignSupport Updated Format ................................................................. Universal
SDP User Guide Changes to Circuit Function and Benefits Section....................... 1
Changes to Figure 1 .......................................................................... 2
EVAL-AD7124-4 User Guide (UG-855)
Changed RTD Temperature Measurement Section to RTD
EVAL-AD7124-8 User Guide (UG-856) Introduction Section ......................................................................... 2
AN-892 Application Note. Temperature Measurement Theory Changes to RTD Introduction Section........................................... 2
and Practical Techniques. Analog Devices. Deleted Figure 3; Renumbered Sequentially ................................. 3
Added RTD Transfer Function Section and RTD Measurements
Kester, Walt. “Temperature Sensors,” Chapter 7 in Sensor Signal
Section, ............................................................................................... 3
Conditioning. Analog Devices, 1999.
Moved Equation 1 to Equation 7 .................................................... 3
McCarthy, Mary. AN-615 Application Note. Peak-to-Peak Added RTD Design Considerations Section, ADC Section,
Resolution Versus Effective Resolution. Analog Devices. Excitation Current and Output Compliance Section, Analog
MT-031 Tutorial. Grounding Data Converters and Solving the Inputs and Gain Selection Section, and Reference and Reference
Mystery of “AGND” and “DGND”. Analog Devices. Buffer Headroom .............................................................................. 4
Changes to Power Supplies Section ................................................ 4
MT-101 Tutorial. Decoupling Techniques. Analog Devices.
Added Digital and Analog Filtering Section, Table 1;
Circuit Note CN-0376. Channel-to-Channel Isolated Renumbered Sequentially, and Table 2 .......................................... 5
Temperature Input (Thermocouple/RTD) for PLC/DCS Changes to Calibration Section ....................................................... 6
Applications. Analog Devices. Added Diagnostics Section, RTD Wiring Configuration Section,
Circuit Note CN-0382. Isolated 4 mA to 20 mA/HART Table 3, 2-Wire RTD Configuration Section, Figure 3 ................ 6
Temperature and Pressure Industrial Transmitter Using a Low Added Figure 4 to Figure 7 .............................................................. 7
Power, Precision, 24-Bit, Sigma-Delta ADC. Analog Devices. Added Figure 8, Figure 9, and Lead Resistance Consideration in
2-Wire RTD Section ......................................................................... 8
Circuit Note CN-0384. Completely Integrated Thermocouple
Changes to 3-Wire RTD Configuration Section and Figure 10 ....... 8
Measurement System Using a Low Power, Precision, 24-Bit,
Deleted Figure 16 ..................................................................................... 10
Sigma-Delta ADC. Analog Devices.
Changed Lead Resistance Considerations to Lead Resistance
Data Sheets and Evaluation Boards Considerations for 3-Wire RTD Section ............................................. 10
EVAL-AD7124-4SDZ Changes to Lead Resistance Considerations for 3-Wire RTD
Section........................................................................................................ 10
EVAL-AD7124-8SDZ
Deleted Figure 18 ..................................................................................... 11
EVAL-SDP-CK1Z or EVAL-SDP-CB1Z Changes to Current Source Mismatch and Mismatch Drift
AD7124-4 Data Sheet Section........................................................................................................ 11
Added Multiple 3-Wire RTD Configuration Section ....................... 12
AD7124-8 Data Sheet
Added Table 4 and Figure 21 ................................................................. 13
ADP150 Data Sheet Added 4-Wire RTD Configuration Section, Figure 22 to
Figure 24 .................................................................................................... 14
Added Figure 25 to Figure 28, Lead Resistance Consideration
in 4-Wire RTD Section and Multiple 2-Wire/4-Wire RTD
Configuration Section .................................................................... 15
Added Table 5 and Figure 29 ................................................................. 16
Added Figure 30 ....................................................................................... 17
Changes to Common Variations Section ............................................ 17
Changes to Setup and Test Section, Figure 31, and Figure 33 ......... 18
Added Figure 34 .............................................................................. 18

Rev. C | Page 19 of 20
 CN-0383 Circuit Note
10/2019—Rev. A to Rev. B 9/2017—Rev. 0 to Rev. A
Changes to Serial Peripheral Interface (SPI) Section and Analog Changes to 3-Wire RTD Configuration Section ...........................5
Inputs and Reference Section.......................................................... 3
Change to Digital and Analog Filtering Section .......................... 4 7/2015—Revision 0: Initial Version
Change to 3-Wire RTD Configuration .......................................... 5
Change to Equipment Needed Section .......................................... 9
Change to Figure 17 Caption ........................................................ 10

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CN13369-10/20(C)

Rev. C | Page 20 of 20