Modeling the Effect of Dead-Time on the

Soft-Switching Characteristic of Variable-Frequency

Modulated Series-Resonant DAB Converter
M. Yaqoob, K. H. Loo, Y. M. Lai
Department of Electronic and Information Engineering
The Hong Kong Polytechnic University
Hong Kong SAR
Email: muhammad.yaqoob@connect.polyu.hk

High Voltage Low Voltage

Abstract—Under wide-range variations in output current and DC Bus DC Bus
voltage, dual-active-bridge (DAB) converter can operate with
increased conduction and switching loss. A variable frequency- AC DC
DC DC
based power modulation scheme for an LC-type series resonant
DC
DAB converter is presented to achieve minimum-tank-current DC
DAB Converter Storage Battery
Wind Power
operation along with full-range soft switching. The proposed DC
DAB based Solid-State
minimum-tank-current operation establishes an in-phase rela- DC Transformer DC
tionship between tank current and secondary-side voltage (low DC DAB Converter Super-Capacitor
voltage and high current), which allows the switching devices PV Array
of DAB converter to operate in soft-switching region. Resonant DC
transitions of parasitic capacitances within the dead-time in- AC
terval of switching devices are considered to avoid incomplete DC
DC DAB based Solid-State AC Transmission
soft switching. Simulation and experimental results show the Transformer Lines
AC Bus
effectiveness of the proposed method with a maximum efficiency Fuel Cell Stack for Utility Voltage
of 96.8 %.
Fig. 1. Power distribution in micro-grid.
Keywords—dual-active-bridge; dc-dc converter; zero-voltage
switching; micro-grid; super-capacitor; conduction loss; switching
loss; dead-time; frequency modulation
nature of the tank current simplifies the theoretical analysis
I. I NTRODUCTION to meet soft-switching and minimum-tank-current operation
conditions.
D ue to the dynamic nature of renewable energy resources,
it is necessary to equip these resources with auxiliary
energy storages [1]. A typical micro-grid system is shown in
Several topologies and modulation schemes are proposed
to mitigate conduction and switching loss. However, soft-
Fig. 1, which is composed of several DC-DC and AC-DC switching and minimum-tank-current operations are achieved
converters to integrate ac and dc buses with renewable energy in certain operating regions only [9]–[15]. Mainly, switching
resources and energy storages. Bidirectional power flow is loss (due to hard switching) is caused by an out-of-phase
required to integrate energy storages with a medium-voltage relationship between tank current and bridge voltages. This
dc bus. In the context of bidirectional power flow, an isolated out-of-phase relationship also induces conduction loss due to
dual-active-bridge (DAB) converter has shown advantages in increased circulating current which increases the root-mean-
terms of semiconductor devices’ stress and power density [2]– square (rms) value of the tank current.
[4]. Moreover, recent advancements in semiconductor devices Variable-frequency phase-shift modulation of a conventional
has increased the switching performance of power electron- DAB converter is proposed in [16]. This modulation method
ics systems [5], [6]. However, despite these advancements, has used instantaneous values of inductor current to achieve
converters operating at high frequencies can still suffer from soft-switching transitions within a fixed dead-time interval,
significant switching loss which leads to degradation in per- which leads to an extra circulating current at both sides of
formance and efficiency [7]. the DAB converter. Hence, minimum-tank-current operation
An LC-type series resonant DAB converter is proposed in is not achieved.
[8]. As compared to a conventional DAB converter, LC-type In this paper, a frequency-based power modulation scheme
series resonant DAB converter uses an additional capacitor is proposed to achieve both soft-switching and minimum-
which resonates with the energy transfer inductor to produce a current operations over wide-range variations in output voltage
nearly sinusoidal tank current and offers dc blocking capability and current. A hardware prototype is designed for interfacing a
to avoid inductor and transformer saturation. This sinusoidal 400 V dc bus (primary side) to a 48 V (secondary side) super-

‹,(((
 C S1 CS3 C Q1 C Q3

S 1
S 3 Q 1 Q 3

n:1 L C
C V
V i C p +
s o

+ +
v (t)
p
v' (t) i (t)
p v (t)
s

- -
x

C
S2 CS4 C Q2 C Q4

S 2 S 4 Q 2
Q 4

Fig. 2. DAB converter based on LC resonant tank.

L ix C

v′p v′p
v′p vs ᶿ
ix vx
vx
ᶿ ᶿ
vs
ix vs
(a) (b) (c)
Fig. 3. (a) Equivalent circuit of the DAB converter. (b) Phasor representation for hard switching at the primary side of the DAB converter. (c) Phasor
representation for ZVS at both sides of the DAB converter.

capacitor-based energy storage. For validation of the proposed (FCA) is used to analyze and derive the governing equations
modulation scheme, a charging/discharging current variation for DAB converter. In the following FCA, normalized variables
of 4 A to 10 A and voltage variation in super-capacitor of 10 (i.e., per-unit values) are used to generalize the results for
V to 45 V are considered. all power levels. To perform FCA in normalized form, the
Vo2
This paper is organized as follows. Section II discusses the following base values are used: Vb = Vp , Zb = Po,max and
basic topology of DAB converter based on LC-type series IB = Vb /Zb . Hence, the simplified analytical expressions
resonant tank. Identification of the required conditions for soft- based on fundamental components are given by (1)-(7).
switching, minimum-tank-current operation and dead-time in-
tervals (for complete soft-switching transitions) are discussed
 4
in Section III. To validate the proposed modulation scheme, vp,p.u (t) = sin ωt (1)
simulation and experimental results are presented in Section π
IV. Finally, concluding remarks are given in Section V.
4M
II. D ESIGN AND A NALYSIS OF A S ERIES R ESONANT DAB vs,p.u (t) = sin(ωt − θ) (2)
π
C ONVERTER
The schematic diagram of a DAB converter based on LC- 4
type series resonant tank and phasor representation of the ix,p.u (t) = (− cos ωt + M cos(ωt − θ)) (3)
πXp.u
tank voltages and current are shown in Fig. 2 and Fig. 3,
respectively. The primary-side switches S1 −S4 are modulated where M = VpV/n s
, θ is the phase shift between vp (t) and vs (t),
to create a square wave vp (t) or secondary-reflected vp (t), n is the transformer’s turn-ratio, and Xp.u = (ωL − ωC 1
)/Zb .
while a phase-shifted square wave vs (t) is generated by the The root-mean-square (rms) value of the resonant tank current
secondary-side switches Q1 − Q4 . The phase shift θ between ix,p.u (t) is derived from (3) by setting its first derivative to
vp (t) and vs (t) determines the direction and magnitude of zero to find the angular position ωp tp at which the peak tank
output power. Fundamental components of bridge voltages √ By substituting ωp tp into (3) and dividing the
current occurs.
and resonant tank current are assumed to be the main source result by 2, the rms value of the tank current is given by
of power flow. Therefore, fundamental component analysis (4).
 (a)
Fig. 5. Variations of output current Io,p.u with respect to M with soft-
switching conditions and minimum-tank-current operation.

the tank current ix,p.u (t). Both approaches lead to the same
expressions given by (6) and (7). It can be seen from (6)
and (7) that the maximum power and output current can be
achieved when the phase shift θ between vp (t) and vs (t) is
90o .

 2π
1  8M
Po,p.u = vp,p.u (t)ix,p.u (t) = sin θ (6)
2π 0 π 2 Xp.u
8
Io,p.u = sin θ (7)
π 2 Xp.u
III. P ROPOSED M ODULATION M ETHOD

A. Required Conditions for Achieving Soft Switching

It can be seen from Fig. 2 that in order to achieve soft-
(b) switching in the primary-side switches of DAB converter, ix (t)
Fig. 4. Soft-switching regions for primary and secondary-side switches under should be negative at the turn-on instances of S1 and S4 (i.e.,
variations in M and θ. (a) Primary side (b) Secondary side turn-off instances of S2 and S3 ). A negative ix (t) is required
to discharge the parasitic capacitances CS1 and CS4 (and to
charge CS2 and CS3 ) within the provided dead-time interval.
Similarly, for the secondary-side switches, ix (t) at the turn-on
4 instances of Q1 and Q4 (i.e., turn-off instances of Q2 and Q3 ),
Ix,rms,p.u = √ (− cos ωp tp + M cos(ωp tp − θ)) (4)
πXp.u 2 ix (t) should be positive. Therefore, evaluating (3) at t = 0 and
where ωp tp is given by (5). t = ωθ lead to the required soft-switching conditions which are
  given by (8) and (9).
−1 −M sin θ
ωp tp = tan +π (5)
1 − M cos θ 4 1
ix,p.u (0) = (−1 + M cos θ) ≤ 0 ⇒ cos θ ≤ (8)
The average per-unit power transferred between the primary πXp.u M
side and secondary side of the DAB converter and output
current can be evaluated using either the primary-side voltage θ 4
vp (t) or the secondary-side voltage vs (t) in conjunction with ix,p.u ( ) = (− cos θ + M ) ≥ 0 ⇒ θ ≥ cos−1 M (9)
ω πXp.u
 θdp
S1, S4 S2, S3
θds ωt
Q2, Q3 Q1, Q4 Q2, Q3
Vp ωt
vCS2 vCS3 vCS1 vCS4
, ,

Vs ωt
vCQ2 vCQ3 vCQ1 vCQ4
, ,

Vp ωt
vp
ωt
Vs θx
Fig. 7. Variation in switching frequency fs to cover the designed range of
θ vs output current Io .

ωt For minimum-tank-current operation, the minimum value of

Ix,rms,p.u
Io,p.u is found by setting the first derivative of (10) with
respect to θ to zero. The required condition is given by (11).
ix d Ix,rms,p.u
) = 0 ⇒ θ = cos−1 M
ωt (
dθx Io,p.u
(11)

By substituting (11) into (9), it can be verified that ix ( ωθ ) =

0 is obtained, indicating that under this condition the tank
Fig. 6. Operating waveforms with complete soft-switching transitions and current ix (t) becomes in phase with the secondary bridge
minimum-tank-current operation.
voltage vs (t). By imposing the desired conditions (8), (9),
and (11) the output current Io,p.u is dependent on M only,
Plotting (8) and (9) with respect to θ at various values of as shown by (12).
M give the soft-switching boundaries of the DAB converter 8
as shown in Fig. 4a. From Fig. 4a and (8), it can be seen Io,p.u = sin(cos−1 (M )) (12)
π 2 Xp.u
that soft switching of the primary-side switches (ix (0) ≤ 0)
can be achieved for all M ≤ 1 and −90o ≤ θ ≤ 90o by Plotting (12) gives the variation in Io,p.u as a function of M
Vs(max) as shown in Fig. 5. It is evident that the dependence of Io,p.u
ensuring Vp(min) /n ≤ 1. As for the secondary-side switches,
the required soft-switching condition cannot be met under on M has limited the flexibility of power control in DAB
wide-range variations in M and θ as can be seen from Fig. 4b converter operating under minimum-tank-current condition.
and (9). Hence, it is proposed that output current Io,p.u is controlled
by varying the switching frequency fs as a means to vary the
B. Minimum-Tank-Current Operation tank impedance Xp.u .
The per-unit rms tank current Ix,rms,p.u given by (4) can be C. Required Dead-Time Interval for Complete Soft Switching
further normalized by Io,p.u by substituting Xp.u from (7) into Transitions
(4). (10) represents the rms tank current required to deliver one Fig. 6 represents the characteristic waveforms of the DAB
unit of output current. converter fulfilling soft-switching and minimum-tank-current
  operation conditions specified by (8), (9) and (11). It can
Ix,rms,p.u π −1 −M sin θ be seen that due to the inclusion of dead-time effect and
= √ (− cos(tan +π )
Io,p.u 2 2 sin θ 1 − M cos θ charging/discharging of parasitic capacitances, vp (t) and vs (t)
 
−M sin θ are characterized by finite rise/fall times which changes the
+ M cos(tan−1 + π − θ)) effective phase shift from θ to θx (measured from the zero-
1 − M cos θ
(10) crossings of vp (t) and vs (t)). For an optimal performance
 (a) (a)

(b)
(b)

(c)
(c)
Fig. 9. Simulation results. (a) Discharging (reverse power flow) with Vp =
Fig. 8. Simulation results. (a) Charging (forward power flow) with Vp = 400 V, Vs = 10 V, Ix,rms = 4.53 A, Io = 4 A, fs = 133 kHz, M =
400 V, Vs = 45 V, Ix,rms = 10.8 A, Io = 10 A, fs = 80 kHz, M = 0.94 0.21 and Po = 40 W. (b) Charging/Discharging of parasitic capacitances to
and Po = 450 W. (b) Charging/Discharging of parasitic capacitances to achieve ZVS at the primary side of DAB converter with a dead-time interval of
achieve ZVS at the primary side of DAB converter with a dead-time interval of θdp
θdp ω
= 109 ns. (c) Charging/Discharging of parasitic capacitances to achieve
ω
= 133 ns. (c) Charging/Discharging of parasitic capacitances to achieve ZVS at the secondary side of DAB converter with a dead-time interval of
ZVS at the secondary side of DAB converter with a dead-time interval of θds
θds ω
= 111.5 ns.
ω
= 150 ns.

of DAB converter, it is necessary to consider the charg-

ing/discharging of parasitic capacitances. These capacitances
should be charged/discharged within the given dead-time in-
tervals. The required condition for the minimum current to
charge/discharge parasitic capacitances of two complimentary
switches is given by (13).
 ton
ix,min (t)dt ≥ QC,max (Vmax ) (13)
toff
Fig. 10. Hardware prototype for experimental verification of the proposed
where ix,min (t) is the current within a particular dead time modulation scheme.
and Qc,max (Vmax ) = 2Vmax C(Vmax ) is the maximum accu-
mulated charge within the parasitic capacitances of the two
complimentary switches on both sides of DAB converter. For The required dead time for achieving complete soft-
full-range and complete soft-switching transition, impedance switching transitions for both secondary and primary-side
Xp.u of LC-type series resonant tank should be chosen to switches of DAB converter can be found from the relationship
provide the required minimum tank current that satisfies (13). given by (14) and (15).
 vp(t) vs(t) ix(t) vp(t) vs(t) ix(t)

(a) (a)

vS1(t) vS2(t) vCS1(t) ix(t) vS1(t) vS2(t) vCS1(t) ix(t)

(b) (b)

vS1(t) vS2(t) vCQ1(t) ix(t) vS1(t) vS2(t) vCQ1(t) ix(t)

(c) (c)
Fig. 11. Experimental results. (a) Charging (forward power flow) with Fig. 12. Experimental results. (a) Discharging (reverse power flow) with
Vp = 400 V (250 V/div), Vs = 45 V (50 V/div), Ix,rms = 10.6 A Vp = 400 V (250 V/div), Vs = 10 V (25 V/div), Ix,rms = 4.4 A (10
(20 A/div), Io = 10 A, fs = 80.2 kHz, M = 0.94 and Po = 450 W. A/div), Io = 3.99 A, fs = 132.5 kHz, M = 0.21 and Po = 40 W.
(b) Charging/Discharging of parasitic capacitance CS1 to achieve ZVS at (b) Charging/Discharging of parasitic capacitance CS1 to achieve ZVS at
the primary-side switch S1 of DAB converter with a dead-time interval of the primary-side switch S1 of DAB converter with a dead-time interval of
θdp θdp
ω
= 155 ns. (c) Charging/Discharging of parasitic capacitance CQ1 to = 120 ns. (c) Charging/Discharging of parasitic capacitance CQ1 to
ω
achieve ZVS at the secondary-side switch Q1 of DAB converter with a dead- achieve ZVS at the secondary-side switch Q1 of DAB converter with a dead-
θ
time interval of ωds = 170 ns. θ
time interval of ωds = 125 ns.

phenomenon is more dominant when the bridge voltages

 θdp
deviate considerably (i.e., higher value of the transformer’s
ω ix (t)
dt = QC,S (Vp ) (14) turn ratio n). Hence, for a more accurate estimation of output
0 n
current Io , the compensated phase shift θx is given by (16).
 θx
ω +
θds
ω 1
ix (t)dt = QC,Q (Vs ) (15) θx = θ − θdr = θ − (θds − θdp ) (16)
θx 2
ω
where θdr is the phase drift caused by different values of dead
where θdp , θds and θx are dead-time angles for the primary- time required to complete soft-switching transitions.
side switches, secondary-side switches and phase shift required
to meet the soft-switching condition, while QC,S (Vp ) and IV. S IMULATION AND E XPERIMENTAL R ESULTS
QC,Q (Vs ) are the accumulated charges in the primary-side and In order to validate the proposed modulation scheme, a
secondary-side switches, respectively. DAB converter prototype is designed for a maximum rated
The derived expressions have not considered the phase- power of 450 W to charge/discharge a super-capacitor with
drift phenomenon caused by the effect of dead time. This an output voltage Vo ranging from 10 V (M = 0.21) to 45
 A DAB converter operating with the proposed modulation
scheme is simulated using PSIM and is shown in Fig. 8 and
Fig. 9. Fig. 8a-c correspond to the case of charging (forward
power flow) a super-capacitor at M = 0.94, Io = 10 A
and Po = 450 W. Similarly, discharging (backward power
flow) of a super-capacitor at minimum power Po = 40 W
i.e., M = 0.21 and Io = 4 A is shown in Fig. 9a-
c. It can be seen from Fig. 8b, Fig. 8c, Fig. 9b and
Fig. 9c that the parasitic capacitance of all switches are fully
charged/discharged within the dead-time intervals to achieve
complete soft-switching transitions. Moreover, minimum-tank-
current operation is achieved by keeping the secondary-side
bridge voltage and current in phase.
The hardware prototype of the proposed DAB is shown
in Fig. 10. The primary and secondary-side switches in the
hardware prototype are realized by MOSFETs. The measured
waveforms of vp (t), vs (t) and ix (t) for charging/discharging
of a super-capacitor are shown in Fig. 11 and Fig. 12. The re-
θ
quired dead-time intervals ωdp and θωds to charge/discharge par-
(a) asitic capacitances of the primary and secondary-side switches
are calculated from (14) and (15). It can be seen from the
measured waveforms shown in Fig. 11b, Fig. 11c, Fig. 12b and
Fig. 12c that soft switching is achieved in both cases. The case
representing the discharging of super-capacitor is captured
in Fig. 12 which validates the effectiveness of the proposed
modulation for reverse power flow as well. The difference
between dead-time intervals in simulation and experimental
results could be influenced by the finite rise/fall times of turn-
on and turn-off instances of semiconductor devices, additional
parasitic capacitances added by PCB traces and non-linear
relationship of output capacitance with respect to MOSFET’s
drain-to-source voltage [17].
Fig. 13 represents the DAB converter efficiencies for various
values of M and Io . A maximum efficiency of 96.8 %
is achieved using the proposed modulation scheme while
lower efficiencies are achieved using conventional modulation
scheme (single phase shift). The decrement in efficiency with
decreasing M can be explained by the fact that, at lower M ,
the θ given by (11) is large which creates increased circulating
(b)
current at the primary side of DAB converter. Besides, at
lower M , the conduction loss arising from PCB traces and
Fig. 13. Measured efficiencies of DAB converter at various values of M and
Io . (a) Proposed modulation scheme. (b) Conventional modulation scheme. on-state resistances of semiconductor devices are constant for
a given output current which poses more weight in efficiency
as compared to the cases of higher M .

V (M = 0.94), output current Io ranging from 4 A to 10 V. C ONCLUSION

A, switching frequency range of 80 kHz to 133 kHz and Both conduction loss and switching loss deteriorate the
input dc bus of 400 V. The specifications of the proposed performance of DAB converter operating at high frequency.
topology are given in Table I, based on which the required A variable-frequency-based modulation scheme is proposed
base resistance for the maximum rated power of 450 W can to achieve soft-switching and minimum-tank-current operation
V2
be found as Zb = Po,max
o,max
= 4.5 Ω. The range of variation in under wide-range variations in output current and voltage
switching frequency fs is plotted in Fig. 7, which shows that typically encountered in super capacitor-based energy storage
the maximum switching frequency corresponds to the case systems. Due to the non-ideal behavior of semiconductor
of the smallest M = 0.21 and Io = 4 while the minimum devices, it is necessary to include resonant transitions of
switching frequency is required for the largest M = 0.94 and parasitic capacitances in the design of soft switching of these
Io = 10 A. devices. For an optimal performance of DAB converter, these
 TABLE I
S PECIFICATIONS OF DAB C ONVERTER P ROTOTYPE

Input Voltage Vi 400 V

Output Voltage Vo Variation 10-45 V
Transformer ratio n 8.3
Proposed Resonant Tank (L and C) Calculated (16.5 μH and 283 nF)
Experimental(16.3 μH and 280 nF)
Switching Frequency Range fs 80 kHz to 133 kHz
Maximum Rated Output Power Pavg,o 450 W
Output Current Variation I,o 4 A to 10 A
Primary Side MOSFETs UJC06505K (650 V, 36.5 A, 35 mΩ)
Secondary Side MOSFETs CSD18535KCS (60 V, 279 A, 1.6 mΩ)
Gate Drivers Infineon 2ED020I12-F2
Inductor’s Core Shape and Material FC3 Ferrite (ETD-49 Core)
Transformer’s Core Shape and Material FC3 Ferrite (ETD-49 Core)
Super-capacitor Maxwell Technologies (48 V, 83 F)
Controller 32-bit ARM Cortex-M3 PSoC 5LP by Cypress Semiconductor
Voltage and Current Sensors LEM Sensors (LV25-P and LA55-P)

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