Digital Systems Design (Ecen 2002)
Digital Systems Design (Ecen 2002)
7. (a) Design a counter that goes through states 3, 4, 6,7and 3 states using JK
flip-flops.
(b) A binary ripple counter is required to count up to 1638310 .How many FFs
are required? If the clock frequency is 8.192 MHz, what is the frequency at
the output of the MSB?
8 + 4 = 12
Group – E
8. (a) With the help of necessary circuit diagram, explain the operation of dual slope ADC.
(b) What are the advantages and disadvantages of the Flash Type A/D converter?
(c) Design a 2-input NAND gate using CMOS inverter.
6 + 2 + 4 = 12
ECEN 2002 3