4-terminal 3-terminal — body tied to source

G G

B S D B S D

D D
iD D
iD
iD
+ + +
G B vDS G vDS G + vDS
+ +
vGS – vGS –
vGS – –
– –
S S S

D D
digital power iD
iD
+ +
G + vDS G vDS
– +
vGS vGS –
–
–
S S
EE 230 NMOS examples – 1
 off ohmic (linear) saturation

VGS ≥ V VGS ≥ V
VGS < VT
VDS < VGS –VT VDS ≥ VGS –VT

iD = Kn [2 (VGS − VT) VDS − ] iD = Kn [VGS − VT]

2 2
iD = 0 VDS

5.0

1 W
Kn = μnCox 4.0
vGS = 5 V
2 L
drain current — iDS (mA)

3.0
vGS = 4 V
2.0

vGS = 3 V
1.0
vGS = 2 V
0.0 vGS < VT
0.0 2.0 4.0 6.0 8.0 10.0
drain voltage — vDS (V)
EE 230 NMOS examples – 2
 Example 1
VDD = 10 V
For the circuit shown, use the the
RD
NMOS equations to nd iD and vDS. iD
2 k!
For the NMOS, VT = 1.5 V and K = 0.5 mA/V2.
+
vGS = VG = 4 V → the NMOS is on. vDS
VG +
+ vGS –
Assume that the transistor is in saturation. 4V – –

= ( ) = . [ . ] = .

= = ( . )( )= .

= . = .

vDS > vGS – VT → saturation con rmed. Q.E.D.

EE 230 NMOS examples – 3

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 Example 2 VDD = 10 V
For the circuit shown, use the the NMOS RD
equations to nd iD and vDS. iD
2 k!
For the NMOS, VT = 1.0 V and K = 0.5 mA/V2. +
Since VG > VT → the NMOS is on. vDS
VG +
+ vGS –
–
Guess that the transistor is in saturation. 5V –
RS
= ( ) 1 k!

= (and iS = iD, as always for a FET)

= ( )

= ( ) +( )

Re-arranging:

+ + =

EE 230 NMOS examples – 4

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 + + =

Plug in the numbers:

iD2 − [10 mA] iD + [16 mA2] = 0 ±

=

Use the quadratic equation: or, if a = 1

iD = 8 mA or iD = 2 mA. = ±
Which one is correct? Check vGS for both.

If iD = 8 mA, vGS = VG – iDRS = 5 V– 8 V = –3 V. No way! If vGS = –3 V,

the NMOS would not even be on.

For iD = 2 mA, vGS = VG – iDRS = 5 V– 2 V = 3 V. This is OK.

Finally, vGS – VT = VG – iDRS – VT = 2 V, and vDS = VDD – iDRD – iDRS = 4 V.

vDS > vGS – VT → saturation con rmed.

EE 230 NMOS examples – 5
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 Example 3 VDD = 8 V
For the circuit shown, use the the NMOS
iD
equations to nd iD and vDS.
+
For the NMOS, VT = 1.5 V and K = 0.25 mA/V2. vDS
+
First note that vGS = vDS, so the NMOS must be vGS – –
in saturation. (vDS > vGS - VT) No guess needed. RS
Since VDD > VT → the NMOS is on. 2.2 k!

And iS = iD (always for a FET) and don’t forget that iG = 0.

= ( ) =

= ( )

= ( ) +( )

(Same basic form as Example 2.)

+ + =
EE 230 NMOS examples – 6
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 + + =

Plug in the numbers:

[ . ] + . =

Use the quadratic equation:

iD = 4.99 mA or iD = 1.75 mA.

Which is right? Check the vGS for both.

If iD = 4.99 mA, vGS = VDD – iDRS = 8 V– 10.98 V = –2.98 V. Nope – the

NMOS would not be on in the case. This root is bogus.

If iD = 1.75 mA, vGS = VDD – iDRS = 8 V– 3.85 V = 4.15 V. OK, this

works.
Finally, vDS = vGS = 4.15 V.

EE 230 NMOS examples – 7

 Example 4 VDD = 10 V
For the circuit shown, use the the NMOS
RD
equations to nd iD and vDS. iD
2 kΩ
For the NMOS, VT = 1.5 V and K = 0.5 mA/V2.
+
vGS = VG = 10 V → the NMOS is on. vDS
VG +
+ vGS –
This looks like a lot like the rst example. So 10 V – –
start by assuming that the NMOS is in saturation.

= ( ) = . [ . ] = .

= = ( . )( )= .

Red Alert! There is a serious problem here. Apparently the NMOS is not
in saturation. So try the ohmic equation.
= ( )

Unfortunately, we don’t know either iD or vDS. So we need a second

equation.
EE 230 NMOS examples – 8
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 = ( )
Use Ohm’s law on the drain resistor to get a second equation:

= =
We can use these to solve for either iD or vDS. Setting the two equal and
solving for vDS is probably slightly easier.

= ( )

Re-arrange: ( )+ + =

Plug in numbers: [ ] + =

Solve: vDS = 0.574 V or vDS = 17.43 V.

It should be obvious that the larger value is way too big – it’s bigger than
VDD. Also, since the NMOS is in ohmic, we expect vDS to be small. So
we choose the smaller value as correct.
.
Lastly: = = = .
EE 230 NMOS examples – 9
 Example 5 VDD = 8 V
For the circuit shown, use the the NMOS equations
to nd iD and vDS.
For the NMOS, VT = 1 V and K = 0.25 mA/V2. R1 RD iD
150 k! 2.2 k!
First note that since iG = 0, R1 and R2 form a +
simple voltage divider, and VG vDS
+
R2 vGS – –
VG = VDD = 4 V
R2 + R 1 R2 RS
150 k! 1 k!
Since VG > VT, the NMOS should be on. Guess
that it is in saturation.

vGS = VG vRS = VG iD R S
2 2
iD = K (vGS V T ) = K (V G iD R S VT )

This is exactly the same as example 2.

+ + =
EE 230 NMOS examples – 10
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 + + =

Plug in the numbers:

i2D [10 mA] iD + 9 mA2 = 0

Use the quadratic equation:

iD = 9 mA or iD = 1 mA.

Which is right? Check the vGS for both.

If iD = 9 mA, vGS = VG – iDRS = 4 V – 8.24 V = –5 V, and

if iD = 1 mA, vGS = VG – iDRS = 4 V– 1 V = 3 V.

Clearly, iD = 1 mA is the only answer that makes sense.

Finally, vGS – VT = 2 V, and vDS = VDD – iDRD – iDRS = 4.8 V.

vDS > vGS – VT → saturation con rmed.

EE 230 NMOS examples – 11
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 Example 6 VDD = 8 V
Same as example 5, but values for R2 is increased
to 680 kΩ. It is the same NMOS: VT = 1 V and K =
0.25 mA/V2. R1 RD iD
150 k! 2.2 k!
Following the same procedure as Example 5, we +
obtain VG = 6.55 V. Guessing saturation and VG vDS
+
performing the same calculation to nd iD,
vGS – –
iD = 2.44 mA or iD = 12.7 mA. R2 RS
680 k! 1 k!
Again, the larger of these is clearly too big to
make any sense. Checking the smaller value for
consistency with saturation:

vGS – VT = VG – iDRS – VT = 3.11 V, and

vDS = VDD – iDRD – iDRS = 0.19 V.
Oops!! vDS < vGS – VT → This is not in saturation!

EE 230 NMOS examples – 12

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 So start over, assuming ohmic operation:

vGS – VT = VG – iDRS – VT
= ( )
vDS = VDD – iDRD – iDRS
This is gonna be messy…

iD 2
= 2 [V G iD R S VT ] [VDD iD (RD + RS )] [VDD iD (RD + RS )]
K
After a whole lotta algebra…

1 2RS VDD 2 (V G V t ) 2VDD

i2D + 2 + iD
K R2S R2D RS RD 2 (R S R D ) (R S R D )

2 (V G VT ) VDD V2DD
(Ouch! That one hurt…) + =0
R2S R2D

Plug in the numbers: i2D + [1.12 mA] iD 6.45 mA2 = 0

and the two roots are: iD = 2.04 mA and iD = –3.16 mA.

De nitely ohmic.
vDS = 8 V – (2.04 mA)(2.2 kΩ + 1 kΩ) = 1.47 V
EE 230 NMOS examples – 13
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 Example 7
Design the circuit at right (by choosing K for the VDD = 5 V
NMOS and the value of RS) so that iD = 1 mA and iD
vDS = 2.5 V. The NMOS has VT = 1 V. +
vDS
VG +
By writing a loop equation around the drain- + vGS –
–
source loop, we see that vRS = VDD – vDS = 4V –
RS
2.5 V. And so RS = 2.5 V / 1 mA = 2.5 kΩ.

Now writing a loop equation around the gate-

source loop, we see that vGS = VG – vRS = 1.5 V.
This value of vGS means that the NMOS must be
operating in saturation.

Then, since in saturation iD = K(vGS – VT)2,

iD 1 mA mA
K= 2
= 2
=4
(vGS VT ) (1 . 5 V 1 V) V2

EE 230 NMOS examples – 14

 Example 8 VDD = 10 V
Design the circuit at right (by choosing K for
the NMOS and the value of RD) so that iD = 10 RD iD
mA and vDS = 0.2 V. The NMOS has VT = 1 V. +
How much power is being dissipated in the vDS
resistor and the NMOS? VG +
+ vGS –
5V – –
If vDS = 0.2 V, then vRD = 9.8 V. For a current of
10 mA, RD = vRD / iD = 9.8 V/10mA = 0.98 kΩ.

With vGS = 5 V and vDS = 0.2 V, the NMOS must be working in the
ohmic region. For ohmic operation:

iD = K 2 (vGS VT ) vDS v2DS

iD 10 mA mA
K= = 2
= 6.41
2 (vGS VT ) vDS v2DS 2 (5 V 1 V ) ( 0 .2 V ) ( 0 .2 V ) V2

PRD = (9.8 V) (10 mA) = 98 mW PNMOS = (0.2 V) (10 mA) = 2 mW

EE 230 NMOS examples – 15