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    Digital System Design: Tutorial-1: Getting Started

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    Vivek S Mayinkar
    The document discusses digital system design and digital logic design from a hardware perspective. It describes how logic gates are used to implement digital circuits and how hardware description languages (HDLs) like Verilog and SystemVerilog are used to describe the circuit design. The tutorial focuses on using SystemVerilog to implement a multiplexer circuit and an arithmetic logic unit (ALU) as examples of digital logic design. It explains the overall design flow from specification to synthesis and manufacturing of an integrated circuit.

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    Digital System Design: Tutorial-1: Getting Started

    Uploaded by

    Vivek S Mayinkar
    54 views17 pages
    The document discusses digital system design and digital logic design from a hardware perspective. It describes how logic gates are used to implement digital circuits and how hardware description languages (HDLs) like Verilog and SystemVerilog are used to describe the circuit design. The tutorial focuses on using SystemVerilog to implement a multiplexer circuit and an arithmetic logic unit (ALU) as examples of digital logic design. It explains the overall design flow from specification to synthesis and manufacturing of an integrated circuit.

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    Digital system design

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    Digital system design

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    The document discusses digital system design and digital logic design from a hardware perspective. It describes how logic gates are used to implement digital circuits and how hardware description languages (HDLs) like Verilog and SystemVerilog are used to describe the circuit design. The tutorial focuses on using SystemVerilog to implement a multiplexer circuit and an arithmetic logic unit (ALU) as examples of digital logic design. It explains the overall design flow from specification to synthesis and manufacturing of an integrated circuit.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    54 views17 pages

    Digital System Design: Tutorial-1: Getting Started

    Uploaded by

    Vivek S Mayinkar
    The document discusses digital system design and digital logic design from a hardware perspective. It describes how logic gates are used to implement digital circuits and how hardware description languages (HDLs) like Verilog and SystemVerilog are used to describe the circuit design. The tutorial focuses on using SystemVerilog to implement a multiplexer circuit and an arithmetic logic unit (ALU) as examples of digital logic design. It explains the overall design flow from specification to synthesis and manufacturing of an integrated circuit.

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    Digital System Design

    Tutorial-1: Getting Started


    Digital Logic Design: Hardware Perspective
    How are processors or any digital hardware designed ?

    Specification: A circuit that can select between two signals and outputs one at a
    time based on some select bit value

    Implementation:

    In digital logic everything is built using logic gates

    - AND, OR, NOT, XOR, NAND, NOR


    - These gates by themselves are implemented on silicon chips as transistors
    Design Example

    Specification: A circuit that can select between two signals and outputs one at a
    time based on some select bit value.
    Logic behavior: Sel (select) Y (output)

    Y = (Signal_A)Sel_bar + (Signal_B)Sel 0 Signal_A

    1 Signal_B
    Signal_A
    Cost:
    ● 2 AND
    Signal_B ● 1 NOT
    ● 1 OR

    Sel
    What About Complex Logic
    CPU design, GPU design, Memory controllers, PCIe-Express, ML accelerators …

    We need a way of describing the hardware and a synthesis to translate into the
    intended design.

    Not all logic can be manually thought of via Truth table, K-Map approaches. We
    now design circuits with billions of transistors on a single silicon chip.

    Apple M1 chip: 16 billion transistors


    The Design Flow
    Specification/Architecture
    (description, idea) Let’s build a new GPU architecture

    Model and performance analysis


    ( c/c++ modeling)

    RTL Logic Design


    (SystemVerilog/Verilog)

    Synthesis, Physical Design


    (ASIC, FPGA)

    Manufactured Chip/Product
    (Phone, Laptops)
    The Design Flow
    Specification/Architecture
    (description, idea)

    Model and performance analysis Will this design work or improve


    ( c/c++ modeling) performance ?

    RTL Logic Design


    (SystemVerilog/Verilog)

    Synthesis, Physical Design


    (ASIC, FPGA)

    Manufactured Chip/Product
    (Phone, Laptops)
    The Design Flow
    Specification/Architecture
    (description, idea)

    Model and performance analysis


    ( c/c++ modeling)

    RTL Logic Design Implementation of the


    (SystemVerilog/Verilog) circuit/logic

    Synthesis, Physical Design


    (ASIC, FPGA)

    Manufactured Chip/Product
    (Phone, Laptops)
    The Design Flow
    Specification/Architecture
    (description, idea)

    Model and performance analysis


    ( c/c++ modeling)

    RTL Logic Design


    (SystemVerilog/Verilog)

    Synthesis, Physical Design ASIC vs FPGA


    (ASIC, FPGA) implementation

    Manufactured Chip/Product
    (Phone, Laptops)
    The Design Flow
    Specification/Architecture
    (description, idea)

    Model and performance analysis


    ( c/c++ modeling)

    RTL Logic Design


    (SystemVerilog/Verilog)

    Synthesis, Physical Design


    (ASIC, FPGA)
    We built our chip :-)

    Manufactured Chip/Product
    (Phone, Laptops)
    The Design Flow: Used in this Tutorial
    Specification/Architecture
    (description, idea)
    Provided by Lab Exercise

    Model and performance analysis


    ( c/c++ modeling)
    Not required for now

    RTL Logic Design Primary focus.


    (SystemVerilog/Verilog) SystemVerilog as HDL

    Synthesis, Physical Design FPGA for


    (ASIC, FPGA) synthesis and
    implementation

    Manufactured Chip/Product
    (Phone, Laptops)
    Hardware Description Languages (HDLs)

    Software-style syntax to describe hardware.

    HDLs are NOT software programs. They do not run on a hardware.

    ● They implement the hardware. Big difference!


    ● HDLs are for our convenience,
    ● The HDL code after synthesis does not exist!

    So be extremely careful while using HDLs. It should synthesize to the intended


    circuit.

    Easy to confuse with software programs.


    HDLs
    ● Verilog
    ● VHDL
    ● SystemVerilog
    SystemVerilog is an extension on Verilog, adds a lot of functionality for verification.
    Verification is the hard. Design & verification goes hand-in-hand! More on this
    later.
    Choose any, but my goto is SystemVerilog.
    Remember, the specification and functionality of the logic does not depend on the
    HDL we use.
    ● Understanding the logic is important and comes first
    ● Then we use HDLs to describe and synthesize the hardware
    Design Example Revisited
    Specification: A circuit that can select between two signals

    module selector ( Circuit interface


    input logic signal_a, Signal_A
    input logic signal_b,
    input logic sel,
    output logic y Signal_B
    );

    always_comb begin
    Sel
    if (sel) y = signal_b;
    else y = signal_a; Circuit description Synthesized circuit from the HDL code
    end

    endmodule
    Design Example #2
    Specification: In our CPU, we want to detect if an interrupt is asserted from any of
    our 8 sources

    Implementation: Output is High if any of the input signal is High.

    intr_source[0]
    logic [7:0] intr_source; FPGA

    assign intr_detect = | (intr_source);

    All the arrows in our logic are Wires OR CPU

    | : Represents bit-wise OR operation,


    intr_source[7] intr_detect
    another hardware synthesized in our
    system.
    Lab: ALU Circuit Design
    Arithmetic and Logic Unit (ALU) is a critical part of most of the logic we design
    ● It performs manipulation on data (bits) and most of the processing will need
    one.
    ● DSP, CPUs, GPUs all require multiple complex ALU units.
    ● Manipulations operations like:
    ○ addition, subtraction, shifts, rotates, swap, multiplication are all ALU
    operations.
    ● These can also represent instructions that a processor implements for running
    programs
    ALU Specification

    Each operand is 16-bit wide, signed (2’s complement)


    Status flag: CNVZ [Carry, Negative, Overflow, Zero], optional but good to have.
    Operations supported:
    ● ADD, SUB, SHIFT-Right, SHIFT-Left, MULT
    Operation selection: func_sel signal, will be 3-bit wide (Why ?)
    Design requirement:
    ● Each operation will be their own component. Behavioral implementation
    ● ALU will instantiate them structurally along with required control.
    Mix of both structural and behavioral HDL. Very common.
    Schematic
    Before moving to writing the HDL, always start with good idea of circuit schematic.
    The HDL code will only represent what you describe it to represent.
    ● Can use EDAPlayground for design. But be very careful it’s not a good compiler
    ● Will let you design using non-synthesizable constructs

    ADD
    Operand_A Result_out
    SUB

    Operand_B
    SHIFT
    Status_Flag

    MULT
    Function_Sel

    ALU

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