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    Tutorial 5 Answers

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    M Arif Siddiqui
    The document contains answers to two tutorial questions about sequential logic circuits. 1) The first question asks to design a state diagram and table for a circuit to detect the input sequence 0101. The circuit has one input, one output, and four states (S0-S3). The output is high when the input sequence is detected. 2) The second question asks to design a state diagram and table for a modulo-3 counter circuit. The circuit has two states (S0-S1) and counts from 0 to 1 to 2 and repeats. The state variables A and B can be used as the outputs.

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    Tutorial 5 Answers

    Uploaded by

    M Arif Siddiqui
    25 views2 pages
    The document contains answers to two tutorial questions about sequential logic circuits. 1) The first question asks to design a state diagram and table for a circuit to detect the input sequence 0101. The circuit has one input, one output, and four states (S0-S3). The output is high when the input sequence is detected. 2) The second question asks to design a state diagram and table for a modulo-3 counter circuit. The circuit has two states (S0-S1) and counts from 0 to 1 to 2 and repeats. The state variables A and B can be used as the outputs.

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    The document contains answers to two tutorial questions about sequential logic circuits. 1) The first question asks to design a state diagram and table for a circuit to detect the input sequence 0101. The circuit has one input, one output, and four states (S0-S3). The output is high when the input sequence is detected. 2) The second question asks to design a state diagram and table for a modulo-3 counter circuit. The circuit has two states (S0-S1) and counts from 0 to 1 to 2 and repeats. The state variables A and B can be used as the outputs.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    25 views2 pages

    Tutorial 5 Answers

    Uploaded by

    M Arif Siddiqui
    The document contains answers to two tutorial questions about sequential logic circuits. 1) The first question asks to design a state diagram and table for a circuit to detect the input sequence 0101. The circuit has one input, one output, and four states (S0-S3). The output is high when the input sequence is detected. 2) The second question asks to design a state diagram and table for a modulo-3 counter circuit. The circuit has two states (S0-S1) and counts from 0 to 1 to 2 and repeats. The state variables A and B can be used as the outputs.

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    © All Rights Reserved
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    ITDR2102: Computer Organization – Tutorial Answers

    Tutorial 5
    From Lecture 5 (Sequential Logic)

    1. Design the state diagram and create the state table for a synchronous to detect the sequence
    0101. The circuit has a single input, x, and a single output z. The output is logic-1 whenever
    the input sequence 0101 is detected, logic-0 otherwise. Note that overlapping sequences are
    allowed (that is: If the input is 01010101, the output is high on every 1 beginning with the
    second). Write the equations for the state variables and the output z.

    Answer:

    a. State Diagram:

    b. State Table:
    Present Input Next Output Present State Input Next State Output
    State X State Z A B C X A’ B’ C’ Z
    S0 0 S1 0 0 0 0 0 0 0 1 0
    S0 1 S0 0 0 0 0 1 0 0 0 0
    S1 0 S1 0 0 0 1 0 0 0 1 0
    S1 1 S2 0  0 0 1 1 0 1 0 0
    S2 0 S3 0 0 1 0 0 0 1 1 0
    S2 1 S0 0 0 1 0 1 0 0 0 0
    S3 0 S1 0 0 1 1 0 0 0 1 0
    S3 1 S4 0 0 1 1 1 1 0 0 0
    S4 0 S3 1 1 0 0 0 0 1 1 1
    S4 1 S0 1 1 0 0 1 0 0 0 1

    c. Equations of state variables and output Z:


    A1 = A’.B.C.X
    B1 = A’.B’.C.X+A’.B.C’.X’+A.B’.C’.X’
    C1 = A’.B’.C’.X’+A’.B’.C.X’+A’.B.C’.X’+A’.B.C.X’+A.B’.C’.X’
    Z = A.B’.C’.X’+A.B’.C’.X

    Page 1
    ITDR2102: Computer Organization – Tutorial Answers

    2. Design the state diagram and create the state table for a synchronous modulo-3 counter (that
    is, one that continually counts in the sequence 0, 1, 2, 0, 1, 2, . . .). Write the equations for the
    state variables. Note: In this case, the state variables can be used as the outputs.

    Answer:

    a. State Diagram:

    b. State Table:

    Present Next Present State Next State


    Output Output
    State State A B A1 B1
    S0 S1 0  0 0 0 1 0
    S1 S2 1 0 1 1 0 1
    S2 S0 2 1 0 0 0 2

    c. Equations of state variables and output Z:

    A1 = A’.B
    B1 = A’.B’

    The outputs are A & B if we let B be the LSB (least significant bit) and let A be the
    MSB (most significant bit)

    Page 2

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