4 Oscillators
4 Oscillators
4 Oscillators
RC phase-shift oscillator:
RC phase-shift oscillators use resistor-capacitor (RC) network (Figure 1) to provide the
phase-shift required by the feedback signal. They have excellent frequency stability and can
yield a pure sine wave for a wide range of loads.
Ideally a simple RC network is expected to have an output which leads the input by 90o.
However, in reality, the phase-difference will be less than this as the capacitor used in the
circuit cannot be ideal. Mathematically the phase angle of the RC network is expressed as
Where, XC = 1/(2πfC) is the reactance of the capacitor C and R is the resistor. In oscillators,
these kind of RC phase-shift networks, each offering a definite phase-shift can be cascaded
so as to satisfy the phase-shift condition led by the Barkhausen Criterion.
One such example is the case in which RC phase-shift oscillator is formed by cascading
three RC phase-shift networks, each offering a phase-shift of 60o, as shown by Figure 2.
Here the collector resistor RC limits the collector current of the transistor, resistors R1 and
R (nearest to the transistor) form the voltage divider network while the emitter resistor RE
improves the stability. Next, the capacitors CE and Co are the emitter by-pass capacitor and
the output DC decoupling capacitor, respectively. Further, the circuit also shows three RC
networks employed in the feedback path.
This arrangement causes the output waveform to shift by 180o during its course of travel
from output terminal to the base of the transistor. Next, this signal will be shifted again by
180o by the transistor in the circuit due to the fact that the phase-difference between the
input and the output will be 180o in the case of common emitter configuration. This makes
the net phase-difference to be 360o, satisfying the phase-difference condition.
The generalized expression for the frequency of oscillations produced by a RC phase-shift
oscillator is given by
Further, at this frequency, the phase-shift between the input and the output will become
zero and the magnitude of the output voltage will become equal to one-third of the input
value. In addition, it is seen that the Wien-Bridge will be balanced only at this particular
frequency.
In the case of Wien-Bridge oscillator, the Wien-Bridge network of Figure 1 will be used in
the feedback path as shown in Figure 2. The circuit diagram for a Wein Oscillator using a
BJT (Bipolar Junction Transistor) is shown below:
In these oscillators, the amplifier section will comprise of two-stage amplifier formed by
the transistors, Q1 and Q2, wherein the output of Q2 is back-fed as an input to Q1 via Wien-
Bridge network (shown within the blue enclosure in the figure). Here, the noise inherent in
the circuit will cause a change in the base current of Q1 which will appear at its collector
point after being amplified with a phase-shift of 180o.
This is fed as an input to Q2 via C4 and gets further amplified and appears with an
additional phase-shift of 180o. This makes the net phase-difference of the signal fed back to
the Wien-Bridge network to be 360o, satisfying phase-shift criterion to obtain sustained
oscillations.
However, this condition will be satisfied only in the case of resonant frequency, due to
which the Wien-Bridge oscillators will be highly selective in terms of frequency, leading to
a frequency-stabilized design.
Where,
F = Frequency of the oscillation.
L1 = value of the inductance of primary of the transformer L1.
C1 = value of capacitance of capacitor C1.
Due to the presence of Cp, the crystal will resonate at two different frequencies viz.,
1. Series Resonant Frequency, fs which occurs when the series capacitance
CS resonates with the series inductance LS. At this stage, the crystal impedance will
be the least and hence the amount of feedback will be the largest. Mathematical
expression for the same is given as
2. Parallel Resonant frequency, fp which is exhibited when the reactance of the LSCS leg
equals the reactance of the parallel capacitor Cp i.e. LS and CS resonate with Cp. At
this instant, the crystal impedance will be the highest and thus the feedback will be
the least. Mathematically it can be given as
3. The behavior of the capacitor will be capacitive both below fS and above fp. However
for the frequencies which lie in-between fS and above fp, the crystal’s behavior will
be inductive. Further when the frequency becomes equal to parallel resonant
frequency fp, then the interaction between LS and Cp would form a parallel tuned LC
tank circuit. Hence, a crystal can be viewed as a combination of series and parallel
tuned resonance circuits due to which one needs to tune the circuit for any one
among these two. Moreover it is to be noted that fp will be higher than fs and the
closeness between the two will be decided by the cut and the dimensions of the
crystal in-use.
4. Crystal oscillators can be designed by connecting the crystal into the circuit such
that it offers low impedance when operated in series-resonant mode (Figure 2a)
and high impedance when operated in anti-resonant or parallel resonant mode
(Figure 2b).
In the circuits shown, the resistors R1 and R2 form the voltage divider network while
the emitter resistor RE stabilizes the circuit. Further, CE (Figure 2a) acts as an AC
bypass capacitor while the coupling capacitor CC (Figure 2a) is used to block DC
signal propagation between the collector and the base terminals. Next, the
capacitors C1 and C2 form the capacitive voltage divider network in the case of
Figure 2b. In addition, there is also a Radio Frequency Coil (RFC) in the circuits
(both in Figure 2a and 2b) which offers dual advantage as it provides even the DC
bias as well as frees the circuit-output from being affected by the AC signal on the
power lines.
On supplying the power to the oscillator, the amplitude of the oscillations in the
circuit increases until a point is reached wherein the nonlinearities in the amplifier
reduce the loop gain to unity. Next, on reaching the steady-state, the crystal in the
feedback loop highly influences the frequency of the operating circuit. Further, here,
the frequency will self-adjust so as to facilitate the crystal to present a reactance to
the circuit such that the Barkhausen phase requirement is fulfilled.
5. In general, the frequency of the crystal oscillators will be fixed to be the crystal’s
fundamental or characteristic frequency which will be decided by the physical size
and shape of the crystal. However, if the crystal is non-parallel or of non-uniform
thickness, then it might resonate at multiple frequencies, resulting in harmonics.
Further, the crystal oscillators can be tuned to either even or odd harmonic of the
fundamental frequency, which are called Harmonic and Overtone Oscillators,
respectively. An example for this is the case where the parallel resonance frequency
of the crystal is decreased or increased by adding a capacitor or an inductor across
the crystal, respectively.
6. The typical operating range of the crystal oscillators is from 40 KHz to 100 MHz
wherein the low frequency oscillators are designed using Op-Amps while the high
frequency-ones are designed using the transistors (BJTs or FETs). The frequency of
oscillations generated by the circuit is decided by the series resonant frequency of
the crystal and will be unaffected by the variations in supply voltage, transistor
parameters, etc. As a result, crystal oscillators exhibit high Q-factor with excellent
frequency stability, making them most suitable for high-frequency applications.
However care should be taken so as to drive the crystal with optimum power only.
This is because, if too much of power is delivered to the crystal, then the parasitic
resonances might be excited in the crystal which leads to unstable resonant
frequency. Further even its output waveform might be distorted due to the
degradation in its phase noise performance. Moreover it can even result in the
destruction of the device (crystal) due to overheat.
7. Crystal oscillators are compact in size and are of low cost due to which they are
extensively used in electronic warfare systems, communication systems, guidance
systems, microprocessors, microcontrollers, space tracking systems, measuring
instruments, medical devices, computers, digital systems, instrumentation, phase
locked loop systems, modems, sensors, disk drives, marine systems,
telecommunications, engine controlling systems, clocks, Global Positioning Systems
(GPS), cable television systems, video cameras, toys, video games, radio systems,
cellular phones, timers, etc.
Unijunction Transistor
The Unijunction Transistor or UJT for short, is another solid state three terminal device
that can be used in gate pulse, timing circuits and trigger generator applications to switch
and control either thyristors and triac’s for AC power control type applications.
Like diodes, unijunction transistors are constructed from separate P-type and N-type
semiconductor materials forming a single (hence its name Uni-Junction) PN-junction within
the main conducting N-type channel of the device.
Although the Unijunction Transistor has the name of a transistor, its switching
characteristics are very different from those of a conventional bipolar or field effect
transistor as it can not be used to amplify a signal but instead is used as a ON-OFF
switching transistor. UJT’s have unidirectional conductivity and negative impedance
characteristics acting more like a variable voltage divider during breakdown.
Like N-channel FET’s, the UJT consists of a single solid piece of N-type semiconductor
material forming the main current carrying channel with its two outer connections marked
as Base 2 ( B2 ) and Base 1 ( B1 ). The third connection, confusingly marked as
the Emitter ( E ) is located along the channel. The emitter terminal is represented by an
arrow pointing from the P-type emitter to the N-type base.
The Emitter rectifying p-n junction of the unijunction transistor is formed by fusing the P-
type material into the N-type silicon channel. However, P-channel UJT’s with an N-type
Emitter terminal are also available but these are little used.
The Emitter junction is positioned along the channel so that it is closer to
terminal B2 than B1. An arrow is used in the UJT symbol which points towards the base
indicating that the Emitter terminal is positive and the silicon bar is negative material.
Below shows the symbol, construction, and equivalent circuit of the UJT.
Unijunction Transistor Symbol and Construction
Notice that the symbol for the unijunction transistor looks very similar to that of the
junction field effect transistor or JFET, except that it has a bent arrow representing the
Emitter( E ) input. While similar in respect of their ohmic channels, JFET’s and UJT’s
operate very differently and should not be confused.
So how does it work? We can see from the equivalent circuit above, that the N-type channel
basically consists of two resistors RB2 and RB1 in series with an equivalent (ideal)
diode, D representing the p-n junction connected to their center point. This Emitter p-n
junction is fixed in position along the ohmic channel during manufacture and can therefore
not be changed.
Resistance RB1 is given between the Emitter, E and terminal B1, while resistance RB2 is given
between the Emitter, E and terminal B2. As the physical position of the p-n junction is closer
to terminal B2 than B1 the resistive value of RB2 will be less than RB1.
The total resistance of the silicon bar (its Ohmic resistance) will be dependent upon the
semiconductors actual doping level as well as the physical dimensions of the N-type silicon
channel but can be represented by RBB. If measured with an ohmmeter, this static
resistance would typically measure somewhere between about 4kΩ and 10kΩ’s for most
common UJT’s such as the 2N1671, 2N2646 or the 2N2647.
These two series resistances produce a voltage divider network between the two base
terminals of the unijunction transistor and since this channel stretches from B2 to B1, when
a voltage is applied across the device, the potential at any point along the channel will be in
proportion to its position between terminals B2 and B1. The level of the voltage gradient
therefore depends upon the amount of supply voltage.
When used in a circuit, terminal B1 is connected to ground and the Emitter serves as the
input to the device. Suppose a voltage VBB is applied across the UJT between B2 and B1 so
that B2 is biased positive relative to B1. With zero Emitter input applied, the voltage
developed across RB1 (the lower resistance) of the resistive voltage divider can be
calculated as:
Unijunction Transistor RB1 Voltage
For a unijunction transistor, the resistive ratio of RB1 to RBB shown above is called the intrinsic
stand-off ratio and is given the Greek symbol: η (eta). Typical standard values of η range from 0.5 to
0.8 for most common UJT’s.
If a small positive input voltage which is less than the voltage developed across
resistance, RB1 ( ηVBB ) is now applied to the Emitter input terminal, the diode p-n junction
is reverse biased, thus offering a very high impedance and the device does not conduct. The
UJT is switched “OFF” and zero current flows.
However, when the Emitter input voltage is increased and becomes greater
than VRB1 (or ηVBB + 0.7V, where 0.7V equals the p-n junction diode volt drop) the p-n
junction becomes forward biased and the unijunction transistor begins to conduct. The
result is that Emitter current, ηIE now flows from the Emitter into the Base region.
The effect of the additional Emitter current flowing into the Base reduces the resistive
portion of the channel between the Emitter junction and the B1 terminal. This reduction in
the value of RB1 resistance to a very low value means that the Emitter junction becomes
even more forward biased resulting in a larger current flow. The effect of this results in a
negative resistance at the Emitter terminal.
Likewise, if the input voltage applied between the Emitter and B1 terminal decreases to a
value below breakdown, the resistive value of RB1 increases to a high value. Then
the Unijunction Transistor can be thought of as a voltage breakdown device.
So we can see that the resistance presented by RB1 is variable and is dependant on the value
of Emitter current, IE. Then forward biasing the Emitter junction with respect to B1 causes
more current to flow which reduces the resistance between the Emitter, E and B1.
In other words, the flow of current into the UJT’s Emitter causes the resistive value of RB1 to
decrease and the voltage drop across it, VRB1 must also decrease, allowing more current to
flow producing a negative resistance condition.
When a voltage (Vs) is firstly applied, the unijunction transistor is “OFF” and the
capacitor C1 is fully discharged but begins to charge up exponentially through resistor R3.
As the Emitter of the UJT is connected to the capacitor, when the charging voltage Vc across
the capacitor becomes greater than the diode volt drop value, the p-n junction behaves as a
normal diode and becomes forward biased triggering the UJT into conduction. The
unijunction transistor is “ON”. At this point the Emitter to B1 impedance collapses as the
Emitter goes into a low impedance saturated state with the flow of Emitter current
through R1 taking place.
As the ohmic value of resistor R1 is very low, the capacitor discharges rapidly through the
UJT and a fast rising voltage pulse appears across R1. Also, because the capacitor
discharges more quickly through the UJT than it does charging up through resistor R3, the
discharging time is a lot less than the charging time as the capacitor discharges through the
low resistance UJT.
When the voltage across the capacitor decreases below the holding point of the p-n
junction ( VOFF ), the UJT turns “OFF” and no current flows into the Emitter junction so once
again the capacitor charges up through resistor R3 and this charging and discharging
process between VON and VOFF is constantly repeated while there is a supply
voltage, Vs applied.
UJT Oscillator Waveforms
Then we can see that the unijunction oscillator continually switches “ON” and “OFF”
without any feedback. The frequency of operation of the oscillator is directly affected by
the value of the charging resistance R3, in series with the capacitor C1 and the value of η.
The output pulse shape generated from the Base1 (B1) terminal is that of a sawtooth
waveform and to regulate the time period, you only have to change the ohmic value of
resistance, R3 since it sets the RC time constant for charging the capacitor.
The time period, T of the sawtoothed waveform will be given as the charging time plus the
discharging time of the capacitor. As the discharge time, τ1 is generally very short in
comparison to the larger RC charging time, τ2 the time period of oscillation is more or less
equivalent to T ≅ τ2. The frequency of oscillation is therefore given by ƒ = 1/T.