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    Electronics 1 Lab 99999

    Uploaded by

    malik jarrar
    1) The document describes Lab #9 objectives which are to determine if a BJT operates correctly as a switch, verify switching speed limitations, and relate circuit parameters to failed components. 2) The lab experiments include implementing OR, AND, and NOT logic gates using NPN transistors and measuring the resulting outputs on an oscilloscope. 3) The conclusion is that the switching properties of BJTs were studied, including the cut-off region. Digital switching was achieved by comparing input/output voltages and OR, AND, NOT gates were implemented and verified using NPN transistors.

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    © All Rights Reserved
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    Electronics 1 Lab 99999

    Uploaded by

    malik jarrar
    35 views8 pages
    1) The document describes Lab #9 objectives which are to determine if a BJT operates correctly as a switch, verify switching speed limitations, and relate circuit parameters to failed components. 2) The lab experiments include implementing OR, AND, and NOT logic gates using NPN transistors and measuring the resulting outputs on an oscilloscope. 3) The conclusion is that the switching properties of BJTs were studied, including the cut-off region. Digital switching was achieved by comparing input/output voltages and OR, AND, NOT gates were implemented and verified using NPN transistors.

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    electronics 1 lab 99999

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    1) The document describes Lab #9 objectives which are to determine if a BJT operates correctly as a switch, verify switching speed limitations, and relate circuit parameters to failed components. 2) The lab experiments include implementing OR, AND, and NOT logic gates using NPN transistors and measuring the resulting outputs on an oscilloscope. 3) The conclusion is that the switching properties of BJTs were studied, including the cut-off region. Digital switching was achieved by comparing input/output voltages and OR, AND, NOT gates were implemented and verified using NPN transistors.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    35 views8 pages

    Electronics 1 Lab 99999

    Uploaded by

    malik jarrar
    1) The document describes Lab #9 objectives which are to determine if a BJT operates correctly as a switch, verify switching speed limitations, and relate circuit parameters to failed components. 2) The lab experiments include implementing OR, AND, and NOT logic gates using NPN transistors and measuring the resulting outputs on an oscilloscope. 3) The conclusion is that the switching properties of BJTs were studied, including the cut-off region. Digital switching was achieved by comparing input/output voltages and OR, AND, NOT gates were implemented and verified using NPN transistors.

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    © All Rights Reserved
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    You are on page 1of 8

    BAD

    COMSATS UNIVERSITY ISLAMABAD


    Lab#9

    Submitted By:

    JARRAR MALIK

    FA19-BEE-087

    Submitted To:
    SIR Muhammad Ali
    Electronics-1
    Lab # 9 BJT as a Switch (Logic gates)

    OBJECTIVES:
    After completing this experiment you will:
     Be able to determine whether a BJT is operating correctly as a switch.
     Have experimentally verified the switching speed limitations of a
    transistor switch.
     Know how to improve the switching speeds of a BJT switch using
    speed-up capacitors.
     Be able to relate measured circuit parameters to failed components.
     Have experimentally verified OR, AND Logic through BJT.

    EQUIPMENT AND MATERIALS:

     DC power supply
     Dual-trace oscilloscope
     Circuit Breadboard
     Digital multimeter
     NPN transistor.
     Resistors- 1.5Kohm, 4.7Kohm, 47Kohm, 1Mohm, 47 pF capacitor

    In-Lab
    SECTION 2: LOGICS GATE

    OR LOGIC:
    File Edit H ierarc hy View Simul ate Tools Wind ow H el p

    Draft2.a
    sc

    --- operating Point ---

    W(a 6 voltage
    5.96242 voltage
    "(q): 5.30401 voltage
    5.53389 voltage
    W(b): 5.53389 voltage
    z« (92 I : 7.2431e-011 devioe
    current
    lb (Q2 } : D 'qevine_curr'=nt
    -7. 243le—011 devin'•_current
    I c (Ql ) : D. DO112475 devin'• current
    • (Ql ) : 3. 7583le—006 'qevin'• current
    I. (Ql ) : -0. 00112851 'qevine_current
    (R3} : D cleviM_current
    (P2) : - 3. 7SB 3le-DD clevi current
    6
    D. DD ll2B5l cleui current
    -0.00112851 devicm_current

    File Edit H ierarc hy View Simul ate Tools Wind ow H el p

    Draft2.a
    sc

    --- operating Point


    ---
    V (b) : uOl tage
    6
    5. 9B111 uc 1 tags
    W(q): 5.33999 voltage
    5.98111 voltage
    z« (92 I : 0.000566195 devioe_current
    lb (Q2 l : 1.B8947e-006 devioe_current
    -0.00056808f devioe_current
    (qi ) : 0.000566195 device_current
    lb (Ql ) : 1.B8947e-006 device
    current
    ie (qi ) : -0.00056808f device current
    (R3} : -1.88947e-006 device_current
    I (R2) : -1.88947e-006 device_current
    x (RI) : 0.00113617 device_current
    -0.00113617 device current
    AND LOGIC:
    File Edit Hierarchy View Simulate To ols Window Help

    Draft2.a
    sc

    --- Operating Point


    ---

    4.71641
    5.5soi5
    V(q): 4.69848

    6.0512e-
    011

    I c lqi ) : -
    0.00469848
    lb (Ql ) :1.OOOJ7e-015
    Is(Q1):-6.06129e-011
    I(R):-0.00469848

    —
    0.00469848

    File Edit Hierarchy View Simulate To ols Window Help

    Draft2.a
    sc

    --- Operating Point


    ---
    V(a): 6voltage
    6voltage
    5.60206 voltage
    0.397944 voltage 4.858]1e-
    V(q): 007 voltage 0.397944
    v voltage
    (b) :
    5.66989e-019 device current

    I c lqi ) : lb 4.80627e-010 device current


    (Ql ) :
    Is(Q1): -4.85831e-010
    I(R): devicc_current
    0 device_current
    -5.20422e-012
    device_current 4.858B1e-010
    device_current
    -4.858]le-010 device
    current
    NOT GATE:
    Conclusion:
    In this lab we studied the switching properties of BJT and we
    also studied its cut- off region.
    We also achieved the digital switching by comparing input and
    output voltages. Then implement OR, AND, NOT gats using NPN
    transistors and gain the resulting outputs.
    We also verified the or gate nor gate and And gate.

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