ISD1700

ISD ChipCorder®
ISD1700 Series
Datasheet

The information described in this document is the exclusive intellectual property of

Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.

Nuvoton is providing this document only for reference purposes of Audio Product Line based system
design. Nuvoton assumes no responsibility for errors or omissions.
All data and specifications are subject to change without notice.

For additional information or questions, please contact: Nuvoton Technology Corporation.

www.nuvoton.com

Jun 28, 2021 Page 1 of 26 Rev2.3

 ISD1700

TABLE OF CONTENTS
1 GENERAL DESCRIPTION .................................................................................. 3
2 FEATURES.......................................................................................................... 4
3 BLOCK DIAGRAM ............................................................................................... 6
4 PINOUT CONFIGURATION ................................................................................ 7
5 PIN DESCRIPTION ............................................................................................. 8
6 MODES OF OPERATIONS ................................................................................. 9
6.1 Standalone (Push-Button) Mode ................................................................... 9
6.2 SPI Mode....................................................................................................... 9
7 TIMING DIAGRAMS .......................................................................................... 10
7.1 Basic Operation ........................................................................................... 10
7.2 SPI Operation .............................................................................................. 14
8 ABSOLUTE MAXIMUM RATINGS .................................................................... 15
8.1 Operating Conditions ................................................................................... 16
9 ELECTRICAL CHARACTERISTICS .................................................................. 17
9.1 DC Parameters............................................................................................ 17
9.2 AC Parameters ............................................................................................ 18
10 TYPICAL APPLICATION CIRCUITS ................................................................. 19
11 PACKAGING ..................................................................................................... 22
11.1 28-Lead 300-Mil Plastic Small Outline Integrated Circuit (SOIC) ........... 22
11.2 28-Lead 600-Mil Plastic Dual Inline Package (PDIP) ............................. 23
12 ORDERING INFORMATION ............................................................................. 24
13 REVISION HISTORY ......................................................................................... 25
Important Notice ....................................................................................................... 26

Jun 28, 2021 Page 2 of 26 Rev2.3

 ISD1700

1 GENERAL DESCRIPTION
The Nuvoton® ISD1700 ChipCorder® Series is a high quality, fully integrated, single-
chip multi-message voice record and playback device ideally suited to a variety of
electronic systems. The message duration is user selectable in ranges from 26 seconds
to 120 seconds, depending on the specific device. The sampling frequency of each
device can also be adjusted from 4 kHz to 12 kHz with an external resistor, giving the
user greater flexibility in duration versus recording quality for each application.
Operating voltage spans a range from 2.4 V to 5.5 V to ensure that the ISD1700 devices
are optimized for a wide range of battery or line-powered applications.

The ISD1700 is designed for operation in either standalone or microcontroller (SPI)

mode. The device incorporates a proprietary message management system that allows
the chip to self-manage address locations for multiple messages. This unique feature
provides sophisticated messaging flexibility in a simple push-button environment. The
devices include an on-chip oscillator (with external resistor control), microphone
preamplifier with Automatic Gain Control (AGC), an auxiliary analog input, anti-aliasing
filter, Multi-Level Storage (MLS) array, smoothing filter, volume control, Pulse Width
Modulation (PWM) Class D speaker driver, and current/voltage output.

The ISD1700 devices also support an optional “vAlert” (voiceAlert) feature that can be
used as a new message indicator. With vAlert, the device flashes an external LED to
indicate that a new message is present. Besides, four special sound effects are
reserved for audio confirmation of operations, such as “Start Record”, “Stop Record”,
“Erase”, “Forward”, “Global Erase”, and etc.

Recordings are stored into on-chip Flash memory, providing zero-power message
storage. This unique single-chip solution is made possible through Nuvoton’s patented
Multi-Level Storage (MLS) technology. Audio data are stored directly in solid-state
memory without digital compression, providing superior quality voice and music
reproduction.

Voice signals can be fed into the chip through two independent paths: a differential
microphone input and a single-ended analog input. For outputs, the ISD1700 provides
a Pulse Width Modulation (PWM) Class D speaker driver and a separate analog output
simultaneously. The PWM can directly drive a standard 8Ω speaker or typical buzzer,
while the separate analog output can be configured as a single-ended current or voltage
output to drive an external amplifier.

While in Standalone mode, the ISD1700 devices automatically enter into power down
mode for power conservation after an operation is completed.
In the SPI mode, the user has full control via the serial interface in operating the device.
This includes random access to any location inside the memory array by specifying the
start address and end address of operations. SPI mode also allows access to the
Jun 28, 2021 Page 3 of 26 Rev2.3
 ISD1700

Analog Path Configuration (APC) register. This register allows flexible configuration of
audio paths, inputs, outputs and mixing. The APC default configuration for standalone
mode can also be modified by storing the APC data into a non-volatile register
(NVCFG) that is loaded at initialization. Utilizing the capabilities of ISD1700 Series,
designers have the control and flexibility to implement voice functionality into the high-
end products.

2 FEATURES
 Integrated message management systems for single-chip, push-button
applications
o REC : level-trigger for recording
o PLAY : edge-trigger for individual message or level-trigger for looping playback
sequentially
o ERASE : edge-triggered erase for first or last message or level-triggered erase for
all messages
o FWD : edge-trigger to advance to the next message or fast message scan during
the playback
o VOL : 8 levels output volume control
o RDY INT : ready or busy status indication
o RESET : return to the default state
o Automatic power-down after each operation cycle
 Selectable sampling frequency controlled by an external oscillator resistor
Sampling Frequency 12 kHz 8 kHz 6.4 kHz 5.3 kHz 4 kHz
Rosc 53 kΩ 80 kΩ 100 kΩ 120 kΩ 160 kΩ
 Selectable message duration
o A wide range selection from 20 secs to 480 secs pending upon sampling
frequency chosen
Sample Freq. ISD1730 ISD1760 ISD17120 ISD17240
12 kHz 20 secs 40 secs 80 secs 160 secs
8 kHz 30 secs 60 secs 120 secs 240 secs
6.4 kHz 37 secs 75 secs 150 secs 300 secs
5.3 kHz 45 secs 90 secs 181 secs 362 secs
4 kHz 60 secs 120 secs 240 secs 480 secs

 Message and operation indicators

o Four customizable Sound Effects (SEs) for audible indication
o Optional vAlert (voiceAlert) to indicate the presence of new messages
o LED: stay on during recording, blink during playback, forward and erase
operations
 Dual operating modes
o Standalone mode:
 Integrated message management techniques
 Automatic power-down after each operation cycle
o SPI mode:

Jun 28, 2021 Page 4 of 26 Rev2.3

 ISD1700

 Fully user selectable and controllable options via APC register and various
SPI commands
 Two individual input channels
o MIC+/MIC-: differential microphone inputs with AGC (Automatic Gain Control)
o AnaIn: single-ended auxiliary analog input for recording or feed-through
 Dual output channels
o Differential PWM Class D speaker outputs directly drives an 8 Ω speaker or a
typical buzzer
o Configurable AUD (current) or AUX (voltage) single-ended output drives external
audio amplifier
 ChipCorder standard features
o High-quality, natural voice and audio reproduction
o 2.4V to 5.5V operating voltage
o 100-year message retention (typical)
o 100,000 record cycles (typical)
 Temperature options:
o Commercial: 0°C to +50°C (die); 0°C to +70°C (packaged units)
o Industrial: -40°C to +85°C (packaged units)
 Packaging types: available in Die, PDIP and SOIC
 Package option: Lead-free packaged units

Jun 28, 2021 Page 5 of 26 Rev2.3

 ISD1700

3 BLOCK DIAGRAM

Jun 28, 2021 Page 6 of 26 Rev2.3

 ISD1700

4 PINOUT CONFIGURATION
Refer to Design Guide for details before performing any design or PCB layout.

Jun 28, 2021 Page 7 of 26 Rev2.3

 ISD1700

5 PIN DESCRIPTION
Refer to Design Guide for details before performing any design or PCB layout.
PIN NAME FUNCTIONS
VCCD Digital Power Supply: Power supply for digital circuitry.
LED LED: An LED output.

RESET RESET: When active, the device enters into a known state.
MISO Master In Slave Out: Data is shifted out on the falling edge of SCLK. When
the SPI is inactive ( SS = high), it’s tri-state.
MOSI Master Out Slave In: Data input of the SPI interface when ISD1700 is a
slave. Data is latched into the device on the rising edge of SCLK.
SCLK Serial Clock: Clock of the SPI interface.
SS Slave Select: Selects as a slave device and enables the SPI interface.
VSSA Analog Ground: Ground path for analog circuitry.
AnaIn AnaIn: Auxiliary analog input to the device for recording or feed-through.
MIC+ MIC+: Non-inverting input of the differential microphone signal.
MIC- MIC-: Inverting input of the differential microphone signal.
VSSP2 Ground: Ground path for negative PWM speaker drive.
SP- SP-: The negative Class D PWM speaker output.
VCCP Power Supply for PWM Speaker Driver: Power for PWM speaker drive.
SP+ SP+: The positive Class D PWM speaker output.
VSSP1 Ground: Ground path for positive PWM speaker drive.
AUD/AUX Auxiliary Output: Either an AUD (current) or AUX (voltage) output.
AGC Automatic Gain Control (AGC): The AGC adjusts the gain of the
microphone preamplifier circuitry.
VOL Volume: This control has 8 levels of volume adjustment.
ROSC Oscillator Resistor: A resistor determines the sample frequency of the
device, which sets the duration.
VCCA Analog Power Supply. Power supply for analog circuitry.
FT Feed-through: Enable the feed-through path for AnaIn signal to the
outputs.
PLAY Playback: Plays the recorded message individually, or plays messages
sequential in a looping mode.
REC Record: When active, starts recording message.

ERASE Erase: When active, can erase individual message or do global erase.

FWD Forward: Advances to the next message from the current location.
RDY INT An open drain output. Can review ready or interrupt status.

VSSD Digital Ground: Ground path for digital circuitry

Jun 28, 2021 Page 8 of 26 Rev2.3

 ISD1700

6 MODES OF OPERATIONS

The ISD1700 Series can operate in either Standalone (Push-Button) or microcontroller

(SPI) mode.

6.1 STANDALONE (PUSH-BUTTON) MODE

One can utilize the REC , PLAY , FT , FWD , ERASE , VOL or RESET control to initiate
a desired operation. As completed, the device automatically enters into the power-
down state.

6.2 SPI MODE

In SPI mode, control of the device is achieved through the 4-wire serial interface
via SPI commands.

For technical details, please refer to the design guide.

Jun 28, 2021 Page 9 of 26 Rev2.3

 ISD1700

7 TIMING DIAGRAMS
The following estimated timing diagrams are not in proper scale.
7.1 BASIC OPERATION

Tr Tf

REC

TDeb

RDY

TSc1 TRU TER TRD TSet1

LED

Mic+/-,
AnaIn

Figure 12.1: Record Operation with No Sound Effect

Tr > TDeb Tf
TDeb

PLAY

TDeb
TRDTSet1

RDY

TSc1 TSc2 TRU TLH TCyc

LED

Sp+, Sp-

Figure 12.2: Start and Stop Playback Operation

Jun 28, 2021 Page 10 of 26 Rev2.3

 ISD1700

Tr > TDeb Tf

ERASE

TDeb
TRD

RDY

TSc1 TSc2 TE TLS2 TSc2

LED

Figure 12.3: Single Erase Operation with No Sound Effect

Tr > T Deb Tf

FWD

TDeb TRD

RDY

TSc1 TSc2 TLS1 or T LS2

LED

Figure 12.4: Forward Operation with No Sound Effect

Jun 28, 2021 Page 11 of 26 Rev2.3

 ISD1700

Tr Tf

ERASE

TDeb
TRD

RDY

TSc1 TSc2 TGE1 or (TE + TLS2 or TSE2) 3x(T LS1 or TSE1) TGE2 TLS4 or TSE4

LED

Sp+, Sp-

Note: If SEs are recorded, then Sp+/- will have output.

Figure 12.5: Global Erase Operation with or without Sound Effects

Tr Tf

RESET

TReset TSet2
Device returns to Power Down state

RDY

LED

Figure 12.6: Reset Operation

Jun 28, 2021 Page 12 of 26 Rev2.3

 ISD1700

Tr > T Deb Tf

PLAY

TDeb TRD

RDY

TSc1 TSc2 TRU TLH TCyc

LED
TRU
TRD

AUD

Figure 12.7: Playback Operation with ramp up and ramp down effect at AUD output

Jun 28, 2021 Page 13 of 26 Rev2.3

 ISD1700

7.2 SPI OPERATION

TSSH TSSmin

SS

TSSS TSCKlow TSCKhi

SCLK
TDIS TDIH

MOSI LSB MSB

TPD TDF

(TRISTATE)
MISO LSB MSB

Figure 12.8: SPI Operation

PARAMETER SYMBOL MIN TYP MAX UNITS

TSSS 500 nsec
SS Setup Time
TSSH 500 nsec
SS Hold Time
Data in Setup Time TDIS 200 nsec
Data in Hold Time TDIH 200 nsec
Output Delay TPD 500 nsec
Output Delay to HighZ TDF 500 nsec
TSSmin 1 µsec
SS HIGH
SCLK High Time TSCKhi 400 nsec
SCLK Low Time TSCKlow 400 nsec
CLK Frequency F0 1,000 KHz
[1]
Power-Up Delay TPUD 50 msec
[1]
Notes: The value shown is based upon 8 kHz sampling frequency. Delay increases proportionally for
slower sampling frequency.

Jun 28, 2021 Page 14 of 26 Rev2.3

 ISD1700

8 ABSOLUTE MAXIMUM RATINGS

ABSOLUTE MAXIMUM RATINGS (DIE) [1]
CONDITIONS VALUES
Junction temperature 1500C
Storage temperature range -650C to +1500C
Voltage Applied to any pads (VSS - 0.3V) to (VCC + 0.3V)
Power supply voltage to ground potential -0.3V to +7.0V

ABSOLUTE MAXIMUM RATINGS (PACKAGED PARTS) [1]

CONDITIONS VALUES
Junction temperature 1500C
Storage temperature range -650C to +1500C
Voltage Applied to any pins (VSS - 0.3V) to (VCC + 0.3V)
Voltage applied to any pin (Input current limited to +/-20 mA) (VSS – 1.0V) to (VCC + 1.0V)
Power supply voltage to ground potential -0.3V to +7.0V
[1] Stresses above those listed may cause permanent damage to the device. Exposure to the absolute
maximum ratings may affect device reliability. Functional operation is not implied at these conditions.

Jun 28, 2021 Page 15 of 26 Rev2.3

 ISD1700

8.1 OPERATING CONDITIONS

OPERATING CONDITIONS (DIE)
CONDITIONS VALUES
Operating temperature range 0°C to +50°C
Supply voltage (VCC) [1] +2.4 V to +5.5 V
Ground voltage (VSS) [2] 0V
Input voltage (VCC) [1] 0 V to 5.5 V
Voltage applied to any pins (VSS –0.3 V) to (VCC +0.3 V)

OPERATING CONDITIONS (PACKAGED PARTS)

CONDITIONS VALUES
Operating temperature range (Case temperature) -40°C to +85°C
Supply voltage (VDD) [1] +2.4V to +5.5V
Ground voltage (VSS) [2] 0V
Input voltage (VDD) [1] 0V to 5.5V
Voltage applied to any pins (VSS –0.3V) to (VDD +0.3V)
[1] V
CC = VCCA = VCCD= VCCP
[2] VSS = VSSA = VSSD = VSSP1 VSSP2

Jun 28, 2021 Page 16 of 26 Rev2.3

 ISD1700

9 ELECTRICAL CHARACTERISTICS
9.1 DC PARAMETERS

PARAMETER SYMBOL MIN TYP [1] MAX UNITS CONDITIONS

Supply Voltage VDD 2.4 5.5 V
Input Low Voltage VIL VSS-0.3 0.3xVDD V
Input High Voltage VIH 0.7xVDD VDD V
Output Low Voltage VOL VSS-0.3 0.3xVDD V IOL = 4.0 mA[2]
Output High Voltage VOH 0.7xVDD VDD V IOH = -1.6 mA[2]
Record Current IDD_Record 20 mA VDD = 5.5 V, No load,
Playback Current IDD_Playback 20 mA Sampling freq = 12 kHz
Erase Current IDD_Erase 20 mA
Standby Current ISB 1 10 µA [3] [4]

Input Leakage Current IILPD1 ±1 µA Force VDD

Input Current Low IILPD2 -3 -10 µA Force VSS , others at Vcc
Preamp Input Impedance RMIC+,RMIC- 7 kΩ Power-up AGC
AnaIn Input Impedance RAnaIn 42 kΩ When active
MIC Differential Input VIN1 15 300 mV Peak-to-Peak[5]
AnaIn Input Voltage VIN2 1 V Peak-to-Peak
Gain from MIC to SP+/- AMSP 6 40 dB VIN = 15~300 mV, AGC =
4.7 µF, VCC = 2.4V~5.5V
Speaker Output Load RSPK 8 Ω Across both Speaker pins
AUX Output Load RAux 5 kΩ When active
Speaker Output Power Pout 670 mW VDD = 5.5 V 1Vp-p,
313 mW VDD = 4.4 V 1 kHz sine
117 mW VDD= 3 V wave at
AnaIn. RSPK
49 mW VDD= 2.4 V
= 8 Ω.
Speaker Output Voltage VOUT1 VDD V RSPK = 8Ω (Speaker),
Typical buzzer
AUX Output Swing VOUT2 1 V Peak-to-Peak
AUX Output DC Level VOUT3 1.2 V When active
AUD IAUD -3.0 mA VDD =4.5 V, REXT= 390 Ω
Volume Output AVol 0 to -28 dB 8 steps of 4dB each
reference to output
Total Harmonic Distortion THD 1 % 15 mV p-p 1 kHz sine
wave, Cmessage
weighted
[1]
Notes: Conditions: VCC = 4.5V, 8 kHz sampling frequency and TA = 25°C, unless otherwise stated.
[2]
LED output during Record operation.
[3]
VCCA, VCCD and VCCP are connected together. VSSA, VSSP1, VSSP2 and VSSD are connected together.
[4]
REC , PLAY , FT , FWD , ERASE , VOL and RESET must be at VCCD.
[5]
Balanced input signal applied between MIC+ and MIC- as shown in the applications example. Single-ended MIC+ or
MIC- input is recommended no more than 150 mV p-p.

Jun 28, 2021 Page 17 of 26 Rev2.3

 ISD1700

9.2 AC PARAMETERS

CHARACTERISTIC SYMBOL MIN TYP [1] MAX UNITS CONDITIONS

Sampling Frequency [2] FS 4 12 kHz [2] [4]

Duration [3] TDur Refer to sec [3]

duration
table
Rising Time Tr 100 nsec
Falling Time Tf 100 nsec
Debounce Time TDeb 192/FS msec [4]

Ramp Up Time TRU 128/FS msec

Ramp Down Time TRD 128/FS msec
Initial Scan Time after TSc1 DRN/8/FS msec DRN= device row# [4]
power is applied
Initial Scan Time from PD TSc2 DRN/16/FS msec After a PB operation
state is run [4]
End Recording Time TER 32/FS msec [4]

LED High Time TLH 0.5K/FS msec [4]

LED Flash Time for SE1 TLS1 3.5K/FS sec SE1 not recorded [5]
LED Flash Time for SE2 TLS2 7.5K/FS sec SE2 not recorded [5]
LED Flash Time for SE3 TLS3 11.5K/FS sec SE3 not recorded [5]
LED Flash Time for SE4 TLS4 15.5K/FS sec SE4 not recorded [5]
SE1 Recorded Duration TSE1 4K/FS sec [4] [5]

SE2 Recorded Duration TSE2 4K/FS sec [4] [5]

SE3 Recorded Duration TSE3 4K/FS sec [4] [5]

SE4 Recorded Duration TSE4 4K/FS sec [4] [5]

Erase Time TE 10MRN/FS sec MRN=message row #

[4]

Global Erase Wait Time TGE1 20K/FS sec [4] [5]

Global Erase Time TGE2 34/FS sec

RESET Pulse TReset 1 µsec All Fs [4]
Settle Time TSet1 128/FS msec [4]

Settle Time after Reset TSet2 64/FS msec [4]

LED Error Time TLErr 27.5K/FS msec [4] [5]

LED Cycle frequency TCyc 1 4 Hz Pending upon FS

[1]
Notes: Typical values: VCC = 4.5 V, FS = 8 kHz and @ TA = 25°C, unless otherwise stated.
[2]
Characterization data shows that sampling frequency resolution is ±5 percent across temperature and voltage
ranges.
[3]
Characterization data shows that duration resolution is ±5 percent across temperature and voltage ranges.
[4]
Vcc=2.4 V~5.5V
[5]
K = 1024

Jun 28, 2021 Page 18 of 26 Rev2.3

 ISD1700

10 TYPICAL APPLICATION CIRCUITS

The following typical applications examples on ISD1700 Series are for references only.
They make no representation or warranty that such applications shall be suitable for
the use specified. Each design has to be optimized in its own system for the best
performance on voice quality, current consumption, functionalities and etc.

The below notes apply to the following applications examples:

* These capacitors may be needed in order to optimize for the best voice quality, which is also dependent upon
the layout of the PCB. Depending on system requirements, they can be 10 µF, 4.7 µF or other values. Please
refer to the applications notes or consult Nuvoton for layout advice.
** It is important to have a separate path for each ground and power back to the related terminals to minimize
the noise. Also, the power supplies should be decoupled as close to the device as possible.

Example #1: Recording using microphone input via push-button controls

Reset
3
24 REC RESET
23
PLAY 0.1µ F
25 D1 vAlert
ERASE 1 KΩ
2
LED
26
FWD Vcc Gnd
VCCD ** **
19 VCCA
VOL VCCD 1 VCCD
22
FT 0.1 µF * VCCP
VSSD 28
VCCA
VCCA 21
VCC 7 VSSA 8 0.1µ F *
SS
6 VCCP
SCLK VCCP 14
4.7 K Ω
5 ISD1700 VSSP1 16 0.1µF * *
MOSI 0.1 µ F
4.7 µ F 4
MISO VSSP2 12
4.7 K Ω
15 Speaker
10 SP+ VCC
MIC+ or Buzzer
0.1 µ F SP- 13 Speaker
11
MIC -
0.1 µ F AUD
4.7 KΩ 9 AUD/AUX 17 8050C
AnaIn VCCD

Rosc *** AUX 390 Ω

20
ROSC 100 K Ω 0.1 µ F
27
18
INT/RDY
AGC Optional
4.7 µ F Optional: based upon the applications
*** At 8kHz sampling freq, Rosc = 80 K

: Digital ground; : Analog ground; : Ground for SP+; : Ground for SP-

Jun 28, 2021 Page 19 of 26 Rev2.3

 ISD1700

Example #2: Recording using AnaIn input via push-button controls

Jun 28, 2021 Page 20 of 26 Rev2.3

 ISD1700

Example #3: Connecting the SPI Interface to a microcontroller

10.1 GOOD AUDIO DESIGN PRACTICES

Nuvoton’s ChipCorder are very high-quality single-chip voice recording and playback
devices. To ensure the highest quality voice reproduction, it is important that good
audio design practices on layout and power supply decoupling are followed. See
Application Information links below for details.
• Design considerations for ISD1600B Series (AN-CC1001.pdf)
• Good Audio Design Practices (apin11.pdf)
• Single-Chip Board Layout Diagrams (apin12.pdf)

Jun 28, 2021 Page 21 of 26 Rev2.3

 ISD1700

11 PACKAGING
11.1 28-LEAD 300-MIL PLASTIC SMALL OUTLINE INTEGRATED CIRCUIT (SOIC)

28 27 26 25 24 23 22 21 20 19 18 17 16 15

1 2 3 4 5 6 7 8 9 10 11 12 13 14

A
G
C

B
D

E F H

Plastic Small Outline Integrated Circuit (SOIC) Dimensions

INCHES MILLIMETERS
Min Nom Max Min Nom Max
A 0.701 0.706 0.711 17.81 17.93 18.06
B 0.097 0.101 0.104 2.46 2.56 2.64
C 0.292 0.296 0.299 7.42 7.52 7.59
D 0.005 0.009 0.0115 0.127 0.22 0.29
E 0.014 0.016 0.019 0.35 0.41 0.48
F 0.050 1.27
G 0.400 0.406 0.410 10.16 10.31 10.41
H 0.024 0.032 0.040 0.61 0.81 1.02

Note: Lead coplanarity to be within 0.004 inches.

Jun 28, 2021 Page 22 of 26 Rev2.3

 ISD1700

11.2 28-LEAD 600-MIL PLASTIC DUAL INLINE PACKAGE (PDIP)

Plastic Dual Inline Package (PDIP) (P) Dimensions

INCHES MILLIMETERS

Min Nom Max Min Nom Max

A 1.445 1.450 1.455 36.70 36.83 36.96
B1 0.150 3.81
B2 0.065 0.070 0.075 1.65 1.78 1.91
C1 0.600 0.625 15.24 15.88
C2 0.530 0.540 0.550 13.46 13.72 13.97
D 0.19 4.83
D1 0.015 0.38
E 0.125 0.135 3.18 3.43
F 0.015 0.018 0.022 0.38 0.46 0.56
G 0.055 0.060 0.065 1.40 1.52 1.65
H 0.100 2.54
J 0.008 0.010 0.012 0.20 0.25 0.30
S 0.070 0.075 0.080 1.78 1.91 2.03
0 0° 15° 0° 15°

Jun 28, 2021 Page 23 of 26 Rev2.3

 ISD1700

12 ORDERING INFORMATION

Jun 28, 2021 Page 24 of 26 Rev2.3

 ISD1700

13 REVISION HISTORY
VERSION DATE DESCRIPTION
1.0 Sep, 2006 Initial version
1.1 Nov, 2006 Revise Pinout Configuration & Pin Description sections
1.2 Jan, 2007 Revise Rosc resistor value
Revise Selectable Message Duration section
Update standby current, sampling frequency & duration
parameters
1.3 Oct 31, 2008 Change logo.
2.0 Feb 4, 2010 Remove preliminary sign.
2.1 Mar, 2017 Removed TSOP pakage option (Not recommended for
new Desig)
2.2 Apr 1, 2020 Update Document Format
2.3 Jun 28, 2021 Update Ordering Information

Jun 28, 2021 Page 25 of 26 Rev2.3

 ISD1700

Important Notice
Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any
malfunction or failure of which may cause loss of human life, bodily injury or severe property
damage. Such applications are deemed, “Insecure Usage”.
Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic
energy control instruments, airplane or spaceship instruments, the control or operation of
dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all types
of safety devices, and other applications intended to support or sustain life.
All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay claims
to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the damages and
liabilities thus incurred by Nuvoton.

Jun 28, 2021 Page 26 of 26 Rev2.3