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    Question Paper: A Answer All The Questions

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    Harshita Gaurav
    This document contains a question paper for an exam on Basic Electronics with 50 marks and a duration of 180 minutes. It consists of 5 questions with 3 subparts each, covering topics such as biasing circuits, rectifiers, op-amps, logic circuits, modulation, and communication systems. Students are required to answer all questions and provide relevant diagrams, calculations, and explanations with their responses.

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    Question Paper: A Answer All The Questions

    Uploaded by

    Harshita Gaurav
    22 views3 pages
    This document contains a question paper for an exam on Basic Electronics with 50 marks and a duration of 180 minutes. It consists of 5 questions with 3 subparts each, covering topics such as biasing circuits, rectifiers, op-amps, logic circuits, modulation, and communication systems. Students are required to answer all questions and provide relevant diagrams, calculations, and explanations with their responses.

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    ICS (2)

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    This document contains a question paper for an exam on Basic Electronics with 50 marks and a duration of 180 minutes. It consists of 5 questions with 3 subparts each, covering topics such as biasing circuits, rectifiers, op-amps, logic circuits, modulation, and communication systems. Students are required to answer all questions and provide relevant diagrams, calculations, and explanations with their responses.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    22 views3 pages

    Question Paper: A Answer All The Questions

    Uploaded by

    Harshita Gaurav
    This document contains a question paper for an exam on Basic Electronics with 50 marks and a duration of 180 minutes. It consists of 5 questions with 3 subparts each, covering topics such as biasing circuits, rectifiers, op-amps, logic circuits, modulation, and communication systems. Students are required to answer all questions and provide relevant diagrams, calculations, and explanations with their responses.

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    Question Paper

    Exam Date & Time: 26-Nov-2018 (08:30 AM - 11:30 AM)

    FIRST SEMESTER B.TECH END SEMESTER EXAMINATIONS, NOV 2018


    Basic Electronics [ECE 1051 - 2018 -PHY]
    Marks: 50 Duration: 180 mins.
    A
    Answer all the questions.
    Instructions to Candidates: Answer ALL questions Missing data may be
    suitably assumed
    1) For the biasing circuit shown in figure Q1A with silicon (4)

    A)
    transistor, R1 = 39k , R 2 = 8.2k , R C = 3.3k , R E = 1k ,
    VCC = 18V, V BE = 0.7V and = 120. Determine IB, IC, VCE,
    VE and VB.

    B) Draw the circuit diagram of a full wave bridge rectifier with (3)
    capacitor filter. Given Vm = 24V, R L= 1k , C = 1000 F and
    f = 50Hz, calculate the DC voltage and ripple factor.

    Page #1
    C) Draw the circuit diagram of RC coupled amplifier and (3)

    discuss the role of coupling capacitor and emitter bypass


    capacitor.
    2) (i) Draw the circuit diagram of an OPAMP non inverting (4)

    A)
    amplifier and derive the expression for its output
    voltage.
    (ii) The inputs to the OPAMP are V 1(non-inv) = 3.5mV and
    V2(inv) = -1.5mV. If the differential gain is 60dB and CMRR
    is 40dB, calculate the output voltage.
    B) In an OPAMP comparator circuit V ref=-2V is applied to the (3)

    non-inverting terminal and Vin=10sin( t) V is applied to


    the inverting terminal. Draw the circuit diagram and plot
    the input and output waveforms. Assume Vsat = ±15V.
    C) Subtract (11.75) 10 from (5.50)8 using 2's complement (3)

    method.
    3) In a certain application, four inputs A, B, C, D are fed to a (4)

    A)
    logic circuit, producing an output Z which controls a relay.
    Z = 1 for the input states (ABCD): 0000, 0010, 0101, 0110,
    1101 and 1110. The states 1000 and 1001 do not occur
    and Z = 0 for the remaining input states.
    i) Obtain truth table for Z.
    ii) Use Karnaugh map to find a minimal SOP and
    implement the same using NAND gates only.
    B) Draw the logic circuit of 3 bit up counter using negative (3)

    edge triggered JK flip-flops. Also sketch the timing diagram.

    C) With a neat logic diagram and table explain the shifting of (3)

    data 111011 in a Serial-In Serial-Out 4-bit shift register.


    Also mention how many clock cycles are required to shift
    the MSB of above mentioned data to the output.
    4) Define frequency modulation. Sketch frequency modulated (4)

    A)
    signal in time domain for a sinusoidal modulating signal. A
    carrier of peak amplitude 5V and frequency 90MHz is
    frequency modulated by a sinusoidal voltage of peak
    amplitude 5V and frequency 10 KHz. If the frequency
    sensitivity is 10Hz/V, calculate the frequency deviation and
    modulation index. Write the equation for the resulting FM
    wave.
    Page #2
    B) The output current of a 60% modulated AM signal (3)

    generator is 1.5A. To what value will this current rise if the


    generator is modulated additionally by another audio
    wave, whose modulation index is 0.7?
    C) Highlight three important reasons why modulation is (3)

    required in wireless communication.


    5) List the different types of analog pulse modulation (4)

    A)
    schemes. Describe each with relevant waveforms.
    B) Sketch the modulated signal waveforms for ASK, FSK and (3)

    PSK if the modulating data stream is 10101.


    C) Explain the following terms with reference to electronic (3)

    communication systems
    i) TDMA ii) MAN iii) EIR

    -----End-----

    Page #3

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