Modern Operating Systems: Third Edition Andrew S. Tanenbaum

MODERN OPERATING SYSTEMS
Third Edition
ANDREW S. TANENBAUM
Chapter 1
Introduction
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
What Is An Operating System (1)
A modern computer consists of:
• One or more processors

• Main memory
• Disks
• Printers
• Various input/output devices
Managing all these components requires a layer of

software – the operating system
What Is An Operating System (2)
Figure 1-1. Where the operating system fits in.
The Operating System as an Extended
Machine
Figure 1-2. Operating systems turn ugly hardware into beautiful

abstractions.
The Operating System as a Resource
Manager
• Allow multiple programs to run at the same time

• Manage and protect memory, I/O devices, and
other resources
• Includes multiplexing (sharing) resources in two
different ways:
• In time
• In space
History of Operating Systems
Generations:
• (1945–55) Vacuum Tubes

• (1955–65) Transistors and Batch Systems
• (1965–1980) ICs and Multiprogramming
• (1980–Present) Personal Computers
Transistors and Batch Systems (1)
Figure 1-3. An early batch system.

(a) Programmers bring cards to 1401.
(b)1401 reads batch of jobs onto tape.
Figure 1-3. (c) Operator carries input tape to 7094.

(d) 7094 does computing. (e) Operator carries output tape to
1401. (f) 1401 prints output.
Figure 1-4. Structure of a typical FMS job.

ICs and Multiprogramming
Figure 1-5. A multiprogramming system

with three jobs in memory.
Computer Hardware Review
Figure 1-6. Some of the components

of a simple personal computer.
CPU Pipelining
Figure 1-7. (a) A three-stage pipeline. (b) A superscalar CPU.
Multithreaded and Multicore Chips
Figure 1-8. (a) A quad-core chip with a shared L2 cache.

(b) A quad-core chip with separate L2 caches.
Memory (1)
Figure 1-9. A typical memory hierarchy.

The numbers are very rough approximations.
Memory (2)
Questions when dealing with cache:
• When to put a new item into the cache.

• Which cache line to put the new item in.
• Which item to remove from the cache when a slot
is needed.
• Where to put a newly evicted item in the larger
memory.
Disks
Figure 1-10. Structure of a disk drive.
I/O Devices
Figure 1-11. (a) The steps in starting an I/O device and

getting an interrupt.
Buses
Figure 1-12. The structure of a large Pentium system

The Operating System Zoo
• Mainframe operating systems

• Server operating systems
• Multiprocessor operating systems
• Personal computer operating systems
• Handheld operating systems
• Embedded operating systems
• Sensor node operating systems
• Real-time operating systems
• Smart card operating systems
Operating System Concepts
• Processes
• Address spaces
• Files
• Input/Output
• Protection
• The shell
• Ontogeny recapitulates phylogeny
• Large memories
• Protection hardware
• Disks
• Virtual memory
Processes
Figure 1-13. A process tree. Process A created two child

processes, B and C. Process B created three child
processes, D, E, and F.
Files (1)
Figure 1-14. A file system for a university department.

Files (2)
Figure 1-15. (a) Before mounting, the files on the CD-ROM are not
accessible. (b) After mounting, they are part of the file
hierarchy.
Files (3)
Figure 1-16. Two processes connected by a pipe.
System Calls
Figure 1-17. The 11 steps in making the system call

read(fd, buffer, nbytes).
System Calls for Process Management
Figure 1-18. Some of the major POSIX system calls.
System Calls for File Management (1)
System Calls for File Management (2)
Miscellaneous System Calls
A Simple Shell
Figure 1-19. A stripped-down shell.
Memory Layout
Figure 1-20. Processes have three segments:

text, data, and stack.
Linking
Figure 1-21. (a) Two directories before linking /usr/jim/memo to

ast’s directory. (b) The same directories after linking.
Mounting
Figure 1-22. (a) File system before the mount.

(b) File system after the mount.
Windows Win32 API
Figure 1-23. The Win32 API calls that roughly correspond

to the UNIX calls of Fig. 1-18.
Operating Systems Structure
Monolithic systems – basic structure:
• A main program that invokes the requested

service procedure.
• A set of service procedures that carry out the
system calls.
• A set of utility procedures that help the service
procedures.
Monolithic Systems
Figure 1-24. A simple structuring model for a monolithic system.
Layered Systems
Figure 1-25. Structure of the THE operating system.
Microkernels
Figure 1-26. Structure of the MINIX 3 system.
Client-Server Model
Figure 1-27. The client-server model over a network.
Virtual Machines (1)
Figure 1-28. The structure of VM/370 with CMS.
Virtual Machines (2)
Figure 1-29. (a) A type 1 hypervisor. (b) A type 2 hypervisor.
The World According to C
• The C language
• Header files
• Large programming projects
• The model of run time
The Model of Run Time
Figure 1-30. The process of compiling C and header files to

make an executable.
Chapter 3: Processes
Operating System Concepts – 9th Edition Silberschatz, Galvin and Gagne ©2013
Chapter 3: Processes
 Process Concept
 Process Scheduling
 Operations on Processes
 Interprocess Communication
 Examples of IPC Systems
 Communication in Client-Server Systems
Operating System Concepts – 9th Edition 3.2 Silberschatz, Galvin and Gagne ©2013
Objectives
 To introduce the notion of a process -- a program in
execution, which forms the basis of all computation
 To describe the various features of processes, including
scheduling, creation and termination, and communication
 To explore interprocess communication using shared memory
and message passing
 To describe communication in client-server systems
Process Concept
 An operating system executes a variety of programs:


Batch system – jobs
 Time-shared systems – user programs or tasks
 Textbook uses the terms job and process almost interchangeably
 Process – a program in execution; process execution must
progress in sequential fashion
 Multiple parts
 The program code, also called text section
 Current activity including program counter, processor
registers
 Stack containing temporary data
 Function parameters, return addresses, local variables
 Data section containing global variables
 Heap containing memory dynamically allocated during run time
Process Concept (Cont.)
 Program is passive entity stored on disk (executable file),
process is active
 Program becomes process when executable file loaded into
memory
 Execution of program started via GUI mouse clicks, command
line entry of its name, etc
 One program can be several processes
 Consider multiple users executing the same program
Process in Memory
Process State
 As a process executes, it changes state

 new: The process is being created
 running: Instructions are being executed
 waiting: The process is waiting for some event to occur
 ready: The process is waiting to be assigned to a processor
 terminated: The process has finished execution
Diagram of Process State
Process Control Block (PCB)
Information associated with each process
(also called task control block)
 Process state – running, waiting, etc
 Program counter – location of
instruction to next execute
 CPU registers – contents of all process-
centric registers
 CPU scheduling information- priorities,
scheduling queue pointers
 Memory-management information –
memory allocated to the process
 Accounting information – CPU used,
clock time elapsed since start, time
limits
 I/O status information – I/O devices
allocated to process, list of open files
CPU Switch From Process to Process
Threads
 So far, process has a single thread of execution
 Consider having multiple program counters per process
 Multiple locations can execute at once
 Multiple threads of control -> threads
 Must then have storage for thread details, multiple program
counters in PCB
 See next chapter
Process Representation in Linux
Represented by the C structure task_struct
pid t_pid; /* process identifier */

long state; /* state of the process */
unsigned int time_slice /* scheduling information */
struct task_struct *parent; /* this process’s parent */
struct list_head children; /* this process’s children */
struct files_struct *files; /* list of open files */
struct mm_struct *mm; /* address space of this process */
Process Scheduling
 Maximize CPU use, quickly switch processes onto CPU for

time sharing
 Process scheduler selects among available processes for
next execution on CPU
 Maintains scheduling queues of processes
 Job queue – set of all processes in the system
 Ready queue – set of all processes residing in main
memory, ready and waiting to execute
 Device queues – set of processes waiting for an I/O device
 Processes migrate among the various queues
Ready Queue And Various I/O Device Queues
Representation of Process Scheduling
 Queueing diagram represents queues, resources, flows
Schedulers
 Short-term scheduler (or CPU scheduler) – selects which process should
be executed next and allocates CPU
 Sometimes the only scheduler in a system
 Short-term scheduler is invoked frequently (milliseconds) ⇒ (must be
fast)
 Long-term scheduler (or job scheduler) – selects which processes should
be brought into the ready queue
 Long-term scheduler is invoked infrequently (seconds, minutes) ⇒
(may be slow)
 The long-term scheduler controls the degree of multiprogramming
 Processes can be described as either:
 I/O-bound process – spends more time doing I/O than computations,
many short CPU bursts
 CPU-bound process – spends more time doing computations; few very
long CPU bursts
 Long-term scheduler strives for good process mix
Addition of Medium Term Scheduling
 Medium-term scheduler can be added if degree of multiple
programming needs to decrease
 Remove process from memory, store on disk, bring back in
from disk to continue execution: swapping
Multitasking in Mobile Systems
 Some mobile systems (e.g., early version of iOS) allow only one
process to run, others suspended
 Due to screen real estate, user interface limits iOS provides for a
 Single foreground process- controlled via user interface
 Multiple background processes– in memory, running, but not
on the display, and with limits
 Limits include single, short task, receiving notification of events,
specific long-running tasks like audio playback
 Android runs foreground and background, with fewer limits
 Background process uses a service to perform tasks
 Service can keep running even if background process is
suspended
 Service has no user interface, small memory use
Context Switch
 When CPU switches to another process, the system must save
the state of the old process and load the saved state for the
new process via a context switch
 Context of a process represented in the PCB
 Context-switch time is overhead; the system does no useful
work while switching
 The more complex the OS and the PCB  the longer the
context switch
 Time dependent on hardware support
 Some hardware provides multiple sets of registers per CPU
 multiple contexts loaded at once
Operations on Processes
 System must provide mechanisms for:

 process creation,
 process termination,
 and so on as detailed next
Process Creation
 Parent process create children processes, which, in turn
create other processes, forming a tree of processes
 Generally, process identified and managed via a process
identifier (pid)
 Resource sharing options
 Parent and children share all resources
 Children share subset of parent’s resources
 Parent and child share no resources
 Execution options
 Parent and children execute concurrently
 Parent waits until children terminate
A Tree of Processes in Linux
Process Creation (Cont.)
 Address space
 Child duplicate of parent
 Child has a program loaded into it
 UNIX examples
 fork() system call creates new process
 exec() system call used after a fork() to replace the
process’ memory space with a new program
C Program Forking Separate Process
Creating a Separate Process via Windows API
Process Termination
 Process executes last statement and then asks the operating

system to delete it using the exit() system call.
 Returns status data from child to parent (via wait())
 Process’ resources are deallocated by operating system
 Parent may terminate the execution of children processes using
the abort() system call. Some reasons for doing so:
 Child has exceeded allocated resources
 Task assigned to child is no longer required
 The parent is exiting and the operating systems does not
allow a child to continue if its parent terminates
Process Termination
 Some operating systems do not allow child to exists if its parent

has terminated. If a process terminates, then all its children must
also be terminated.
 cascading termination. All children, grandchildren, etc. are
terminated.
 The termination is initiated by the operating system.
 The parent process may wait for termination of a child process by
using the wait()system call. The call returns status information
and the pid of the terminated process
pid = wait(&status);
 If no parent waiting (did not invoke wait()) process is a zombie
 If parent terminated without invoking wait , process is an orphan
Multiprocess Architecture – Chrome Browser
 Many web browsers ran as single process (some still do)

 If one web site causes trouble, entire browser can hang or crash
 Google Chrome Browser is multiprocess with 3 different types of
processes:
 Browser process manages user interface, disk and network I/O
 Renderer process renders web pages, deals with HTML,
Javascript. A new renderer created for each website opened
 Runs in sandbox restricting disk and network I/O, minimizing
effect of security exploits
 Plug-in process for each type of plug-in
Interprocess Communication
 Processes within a system may be independent or cooperating

 Cooperating process can affect or be affected by other processes,
including sharing data
 Reasons for cooperating processes:
 Information sharing
 Computation speedup
 Modularity
 Convenience
 Cooperating processes need interprocess communication (IPC)
 Two models of IPC
 Shared memory
 Message passing
Communications Models
(a) Message passing. (b) shared memory.
Cooperating Processes
 Independent process cannot affect or be affected by the execution
of another process
 Cooperating process can affect or be affected by the execution of
another process
 Advantages of process cooperation
 Information sharing
 Computation speed-up
 Modularity
 Convenience
Producer-Consumer Problem
 Paradigm for cooperating processes, producer process
produces information that is consumed by a consumer
process
 unbounded-buffer places no practical limit on the size
of the buffer
 bounded-buffer assumes that there is a fixed buffer
size
Bounded-Buffer – Shared-Memory Solution
 Shared data
#define BUFFER_SIZE 10
typedef struct {
. . .
} item;
item buffer[BUFFER_SIZE];
int in = 0;
int out = 0;
 Solution is correct, but can only use BUFFER_SIZE-1 elements
Bounded-Buffer – Producer
item next_produced;
while (true) {
/* produce an item in next produced */
while (((in + 1) % BUFFER_SIZE) == out)
; /* do nothing */
buffer[in] = next_produced;
in = (in + 1) % BUFFER_SIZE;
}
Bounded Buffer – Consumer
item next_consumed;
while (true) {
while (in == out)
; /* do nothing */
next_consumed = buffer[out];
out = (out + 1) % BUFFER_SIZE;
/* consume the item in next consumed */

}
Interprocess Communication – Shared Memory
 An area of memory shared among the processes that wish

to communicate
 The communication is under the control of the users
processes not the operating system.
 Major issues is to provide mechanism that will allow the
user processes to synchronize their actions when they
access shared memory.
 Synchronization is discussed in great details in Chapter 5.
Interprocess Communication – Message Passing
 Mechanism for processes to communicate and to synchronize

their actions
 Message system – processes communicate with each other

without resorting to shared variables
 IPC facility provides two operations:

 send(message)
 receive(message)
 The message size is either fixed or variable
Message Passing (Cont.)
 If processes P and Q wish to communicate, they need to:


Establish a communication link between them
 Exchange messages via send/receive
 Implementation issues:
 How are links established?
 Can a link be associated with more than two processes?
 How many links can there be between every pair of
communicating processes?
 What is the capacity of a link?
 Is the size of a message that the link can accommodate fixed or
variable?
 Is a link unidirectional or bi-directional?
Message Passing (Cont.)
 Implementation of communication link

 Physical:
Shared memory

 Hardware bus
 Network
 Logical:
 Direct or indirect
 Synchronous or asynchronous
 Automatic or explicit buffering
Direct Communication
 Processes must name each other explicitly:
 send (P, message) – send a message to process P
 receive(Q, message) – receive a message from process Q
 Properties of communication link
 Links are established automatically
 A link is associated with exactly one pair of communicating
processes
 Between each pair there exists exactly one link
 The link may be unidirectional, but is usually bi-directional
Indirect Communication
 Messages are directed and received from mailboxes (also referred

to as ports)
 Each mailbox has a unique id
 Processes can communicate only if they share a mailbox
 Properties of communication link
 Link established only if processes share a common mailbox
 A link may be associated with many processes
 Each pair of processes may share several communication links
 Link may be unidirectional or bi-directional
 Operations
 create a new mailbox (port)
 send and receive messages through mailbox
 destroy a mailbox
 Primitives are defined as:
send(A, message) – send a message to mailbox A
receive(A, message) – receive a message from mailbox A
 Mailbox sharing
 P1, P2, and P3 share mailbox A
 P1, sends; P2 and P3 receive
 Who gets the message?
 Solutions
 Allow a link to be associated with at most two processes
 Allow only one process at a time to execute a receive
operation
 Allow the system to select arbitrarily the receiver.
Sender is notified who the receiver was.
Synchronization
 Message passing may be either blocking or non-blocking
 Blocking is considered synchronous
 Blocking send -- the sender is blocked until the message is
received
 Blocking receive -- the receiver is blocked until a message
is available
 Non-blocking is considered asynchronous
 Non-blocking send -- the sender sends the message and
continue
 Non-blocking receive -- the receiver receives:
 A valid message, or
 Null message
 Different combinations possible
 If both send and receive are blocking, we have a rendezvous
Synchronization (Cont.)
 Producer-consumer becomes trivial
message next_produced;
while (true) {
/* produce an item in next produced */
send(next_produced);
}
message next_consumed;
while (true) {
receive(next_consumed);
/* consume the item in next consumed */

}
Buffering
 Queue of messages attached to the link.

 implemented in one of three ways
1. Zero capacity – no messages are queued on a link.
Sender must wait for receiver (rendezvous)
2. Bounded capacity – finite length of n messages
Sender must wait if link full
3. Unbounded capacity – infinite length
Sender never waits
Examples of IPC Systems - POSIX
 POSIX Shared Memory

 Process first creates shared memory segment
shm_fd = shm_open(name, O CREAT | O RDWR, 0666);
 Also used to open an existing segment to share it
 Set the size of the object
ftruncate(shm fd, 4096);
 Now the process could write to the shared memory
sprintf(shared memory, "Writing to shared
memory");
IPC POSIX Producer
IPC POSIX Consumer
Examples of IPC Systems - Mach
 Mach communication is message based
 Even system calls are messages
 Each task gets two mailboxes at creation- Kernel and Notify
 Only three system calls needed for message transfer
msg_send(), msg_receive(), msg_rpc()
 Mailboxes needed for commuication, created via
port_allocate()
 Send and receive are flexible, for example four options if mailbox full:
 Wait indefinitely
 Wait at most n milliseconds
 Return immediately
 Temporarily cache a message
Examples of IPC Systems – Windows
 Message-passing centric via advanced local procedure call

(LPC) facility
 Only works between processes on the same system
 Uses ports (like mailboxes) to establish and maintain
communication channels
 Communication works as follows:
 The client opens a handle to the subsystem’s
connection port object.
 The client sends a connection request.
 The server creates two private communication ports
and returns the handle to one of them to the client.
 The client and server use the corresponding port handle
to send messages or callbacks and to listen for replies.
Local Procedure Calls in Windows
Communications in Client-Server Systems
 Sockets
 Remote Procedure Calls
 Pipes
 Remote Method Invocation (Java)
Sockets
 A socket is defined as an endpoint for communication
 Concatenation of IP address and port – a number included at

start of message packet to differentiate network services on a
host
 The socket 161.25.19.8:1625 refers to port 1625 on host

161.25.19.8
 Communication consists between a pair of sockets
 All ports below 1024 are well known, used for standard
services
 Special IP address 127.0.0.1 (loopback) to refer to system on

which process is running
Socket Communication
Sockets in Java
 Three types of sockets

 Connection-oriented
(TCP)
 Connectionless (UDP)
 MulticastSocket
class– data can be sent
to multiple recipients
 Consider this “Date” server:
Remote Procedure Calls
 Remote procedure call (RPC) abstracts procedure calls
between processes on networked systems
 Again uses ports for service differentiation
 Stubs – client-side proxy for the actual procedure on the
server
 The client-side stub locates the server and marshalls the
parameters
 The server-side stub receives this message, unpacks the
marshalled parameters, and performs the procedure on the
server
 On Windows, stub code compile from specification written in
Microsoft Interface Definition Language (MIDL)
Remote Procedure Calls (Cont.)
 Data representation handled via External Data
Representation (XDL) format to account for different
architectures
 Big-endian and little-endian
 Remote communication has more failure scenarios than local
 Messages can be delivered exactly once rather than at
most once
 OS typically provides a rendezvous (or matchmaker) service
to connect client and server
Execution of RPC
Pipes
 Acts as a conduit allowing two processes to communicate
 Issues:
 Is communication unidirectional or bidirectional?
 In the case of two-way communication, is it half or full-
duplex?
 Must there exist a relationship (i.e., parent-child) between
the communicating processes?
 Can the pipes be used over a network?
 Ordinary pipes – cannot be accessed from outside the process
that created it. Typically, a parent process creates a pipe and
uses it to communicate with a child process that it created.
 Named pipes – can be accessed without a parent-child
relationship.
Ordinary Pipes
 Ordinary Pipes allow communication in standard producer-consumer

style
 Producer writes to one end (the write-end of the pipe)
 Consumer reads from the other end (the read-end of the pipe)
 Ordinary pipes are therefore unidirectional
 Require parent-child relationship between communicating processes
 Windows calls these anonymous pipes

 See Unix and Windows code samples in textbook
Named Pipes
 Named Pipes are more powerful than ordinary pipes

 Communication is bidirectional
 No parent-child relationship is necessary between the
communicating processes
 Several processes can use the named pipe for communication
 Provided on both UNIX and Windows systems
End of Chapter 3
Chapter 6: CPU Scheduling
Chapter 6: CPU Scheduling
 Basic Concepts
 Scheduling Criteria
 Scheduling Algorithms
 Thread Scheduling
 Multiple-Processor Scheduling
 Real-Time CPU Scheduling
 Operating Systems Examples
 Algorithm Evaluation
Objectives
 To introduce CPU scheduling, which is the basis for

multiprogrammed operating systems
 To describe various CPU-scheduling algorithms
 To discuss evaluation criteria for selecting a CPU-scheduling
algorithm for a particular system
 To examine the scheduling algorithms of several operating
systems
Basic Concepts
 Maximum CPU utilization

obtained with multiprogramming
 CPU–I/O Burst Cycle – Process
execution consists of a cycle of
CPU execution and I/O wait
 CPU burst followed by I/O burst
 CPU burst distribution is of main
concern
Histogram of CPU-burst Times
CPU Scheduler
 Short-term scheduler selects from among the processes in
ready queue, and allocates the CPU to one of them
 Queue may be ordered in various ways
 CPU scheduling decisions may take place when a process:
1. Switches from running to waiting state
2. Switches from running to ready state
3. Switches from waiting to ready
4. Terminates
 Scheduling under 1 and 4 is nonpreemptive
 All other scheduling is preemptive
 Consider access to shared data
 Consider preemption while in kernel mode
 Consider interrupts occurring during crucial OS activities
Dispatcher
 Dispatcher module gives control of the CPU to the process

selected by the short-term scheduler; this involves:
 switching context
 switching to user mode
 jumping to the proper location in the user program to
restart that program
 Dispatch latency – time it takes for the dispatcher to stop
one process and start another running
Scheduling Criteria
 CPU utilization – keep the CPU as busy as possible

 Throughput – # of processes that complete their execution per
time unit
 Turnaround time – amount of time to execute a particular
process
 Waiting time – amount of time a process has been waiting in the
ready queue
 Response time – amount of time it takes from when a request
was submitted until the first response is produced, not output (for
time-sharing environment)
Scheduling Algorithm Optimization Criteria
 Max CPU utilization

 Max throughput
 Min turnaround time
 Min waiting time
 Min response time
First- Come, First-Served (FCFS) Scheduling
Process Burst Time

P1 24
P2 3
P3 3
 Suppose that the processes arrive in the order: P1 , P2 , P3
The Gantt Chart for the schedule is:
P1 P2 P3
0 24 27 30
 Waiting time for P1 = 0; P2 = 24; P3 = 27

 Average waiting time: (0 + 24 + 27)/3 = 17
FCFS Scheduling (Cont.)
Suppose that the processes arrive in the order:
P2 , P3 , P1
 The Gantt chart for the schedule is:
P2 P3 P1
0 3 6 30
 Waiting time for P1 = 6; P2 = 0; P3 = 3

 Average waiting time: (6 + 0 + 3)/3 = 3
 Much better than previous case
 Convoy effect - short process behind long process
 Consider one CPU-bound and many I/O-bound processes
Shortest-Job-First (SJF) Scheduling
 Associate with each process the length of its next CPU burst
 Use these lengths to schedule the process with the shortest
time
 SJF is optimal – gives minimum average waiting time for a given
set of processes
 The difficulty is knowing the length of the next CPU request
 Could ask the user
Example of SJF
ProcessArrival Time Burst Time

P1 0.0 6
P2 2.0 8
P3 4.0 7
P4 5.0 3
 SJF scheduling chart
P4 P1 P3 P2
0 3 9 16 24
 Average waiting time = (3 + 16 + 9 + 0) / 4 = 7
Determining Length of Next CPU Burst
 Can only estimate the length – should be similar to the previous one
 Then pick process with shortest predicted next CPU burst
 Can be done by using the length of previous CPU bursts, using

exponential averaging
1. t n = actual length of n th CPU burst

2. τ n +1 = predicted value for the next CPU burst
3. α , 0 ≤ α ≤ 1
4. Define : τ n =1 = α t n + (1 − α )τ n .
 Commonly, α set to ½
 Preemptive version called shortest-remaining-time-first
Prediction of the Length of the Next CPU Burst
Examples of Exponential Averaging
 α =0
τn+1 = τn

 Recent history does not count
 α =1
 τn+1 = α tn
 Only the actual last CPU burst counts
 If we expand the formula, we get:
τn+1 = α tn+(1 - α)α tn -1 + …
+(1 - α )j α tn -j + …
+(1 - α )n +1 τ0
 Since both α and (1 - α) are less than or equal to 1, each

successive term has less weight than its predecessor
Example of Shortest-remaining-time-first
 Now we add the concepts of varying arrival times and preemption to

the analysis
ProcessAarri Arrival TimeT Burst Time
P1 0 8
P2 1 4
P3 2 9
P4 3 5
 Preemptive SJF Gantt Chart
P1 P2 P4 P1 P3
0 1 5 10 17 26
 Average waiting time = [(10-1)+(1-1)+(17-2)+5-3)]/4 = 26/4 = 6.5

msec
Priority Scheduling
 A priority number (integer) is associated with each process
 The CPU is allocated to the process with the highest priority

(smallest integer ≡ highest priority)
 Preemptive
 Nonpreemptive
 SJF is priority scheduling where priority is the inverse of predicted

next CPU burst time
 Problem ≡ Starvation – low priority processes may never execute
 Solution ≡ Aging – as time progresses increase the priority of the

process
Example of Priority Scheduling
ProcessA arri Burst TimeT Priority

P1 10 3
P2 1 1
P3 2 4
P4 1 5
P5 5 2
 Priority scheduling Gantt Chart
P1 P2 P1 P3 P4
0 1 6 16 18 19
 Average waiting time = 8.2 msec
Round Robin (RR)
 Each process gets a small unit of CPU time (time quantum q),
usually 10-100 milliseconds. After this time has elapsed, the
process is preempted and added to the end of the ready queue.
 If there are n processes in the ready queue and the time
quantum is q, then each process gets 1/n of the CPU time in
chunks of at most q time units at once. No process waits more
than (n-1)q time units.
 Timer interrupts every quantum to schedule next process
 Performance
 q large ⇒ FIFO
 q small ⇒ q must be large with respect to context switch,
otherwise overhead is too high
Example of RR with Time Quantum = 4
Process Burst Time
P1 24
P2 3
P3 3
 The Gantt chart is:
P1 P2 P3 P1 P1 P1 P1 P1
0 4 7 10 14 18 22 26 30
 Typically, higher average turnaround than SJF, but better

response
 q should be large compared to context switch time
 q usually 10ms to 100ms, context switch < 10 usec
Time Quantum and Context Switch Time
Turnaround Time Varies With The Time Quantum
80% of CPU bursts

should be shorter than q
Multilevel Queue
 Ready queue is partitioned into separate queues, eg:
 foreground (interactive)
 background (batch)
 Process permanently in a given queue
 Each queue has its own scheduling algorithm:
 foreground – RR
 background – FCFS
 Scheduling must be done between the queues:
 Fixed priority scheduling; (i.e., serve all from foreground then
from background). Possibility of starvation.
 Time slice – each queue gets a certain amount of CPU time
which it can schedule amongst its processes; i.e., 80% to
foreground in RR
 20% to background in FCFS
Multilevel Queue Scheduling
Multilevel Feedback Queue
 A process can move between the various queues; aging can be

implemented this way
 Multilevel-feedback-queue scheduler defined by the following
parameters:
 number of queues
 scheduling algorithms for each queue
 method used to determine when to upgrade a process
 method used to determine when to demote a process
 method used to determine which queue a process will enter
when that process needs service
Example of Multilevel Feedback Queue
 Three queues:
 Q0 – RR with time quantum 8
milliseconds
 Q1 – RR time quantum 16 milliseconds
 Q2 – FCFS
 Scheduling
 A new job enters queue Q0 which is
served FCFS
 When it gains CPU, job receives 8
milliseconds
 If it does not finish in 8
milliseconds, job is moved to
queue Q1
 At Q1 job is again served FCFS and
receives 16 additional milliseconds
 If it still does not complete, it is
preempted and moved to queue Q2
Thread Scheduling
 Distinction between user-level and kernel-level threads

 When threads supported, threads scheduled, not processes
 Many-to-one and many-to-many models, thread library schedules
user-level threads to run on LWP
 Known as process-contention scope (PCS) since scheduling
competition is within the process
 Typically done via priority set by programmer
 Kernel thread scheduled onto available CPU is system-contention
scope (SCS) – competition among all threads in system
Pthread Scheduling
 API allows specifying either PCS or SCS during thread creation

 PTHREAD_SCOPE_PROCESS schedules threads using
PCS scheduling
 PTHREAD_SCOPE_SYSTEM schedules threads using
SCS scheduling
 Can be limited by OS – Linux and Mac OS X only allow
PTHREAD_SCOPE_SYSTEM
Pthread Scheduling API
#include <pthread.h>
#include <stdio.h>
#define NUM_THREADS 5
int main(int argc, char *argv[]) {
int i, scope;
pthread_t tid[NUM THREADS];
pthread_attr_t attr;
/* get the default attributes */
pthread_attr_init(&attr);
/* first inquire on the current scope */
if (pthread_attr_getscope(&attr, &scope) != 0)
fprintf(stderr, "Unable to get scheduling scope\n");
else {
if (scope == PTHREAD_SCOPE_PROCESS)
printf("PTHREAD_SCOPE_PROCESS");
else if (scope == PTHREAD_SCOPE_SYSTEM)
printf("PTHREAD_SCOPE_SYSTEM");
else
fprintf(stderr, "Illegal scope value.\n");
}
Pthread Scheduling API
/* set the scheduling algorithm to PCS or SCS */
pthread_attr_setscope(&attr, PTHREAD_SCOPE_SYSTEM);
/* create the threads */
for (i = 0; i < NUM_THREADS; i++)
pthread_create(&tid[i],&attr,runner,NULL);
/* now join on each thread */
pthread_join(tid[i], NULL);
}
/* Each thread will begin control in this function */
void *runner(void *param)
{
/* do some work ... */
pthread_exit(0);
}
Multiple-Processor Scheduling
 CPU scheduling more complex when multiple CPUs are
available
 Homogeneous processors within a multiprocessor
 Asymmetric multiprocessing – only one processor accesses
the system data structures, alleviating the need for data sharing
 Symmetric multiprocessing (SMP) – each processor is self-
scheduling, all processes in common ready queue, or each has
its own private queue of ready processes
 Currently, most common
 Processor affinity – process has affinity for processor on which
it is currently running
 soft affinity
 hard affinity
 Variations including processor sets
NUMA and CPU Scheduling
Note that memory-placement algorithms can also consider affinity
Multiple-Processor Scheduling – Load Balancing
 If SMP, need to keep all CPUs loaded for efficiency

 Load balancing attempts to keep workload evenly distributed
 Push migration – periodic task checks load on each processor,
and if found pushes task from overloaded CPU to other CPUs
 Pull migration – idle processors pulls waiting task from busy
processor
Multicore Processors
 Recent trend to place multiple processor cores on same

physical chip
 Faster and consumes less power
 Multiple threads per core also growing
 Takes advantage of memory stall to make progress on
another thread while memory retrieve happens
Multithreaded Multicore System
Real-Time CPU Scheduling
 Can present obvious
challenges
 Soft real-time systems – no
guarantee as to when critical
real-time process will be
scheduled
 Hard real-time systems –
task must be serviced by its
deadline
 Two types of latencies affect
performance
1. Interrupt latency – time from
arrival of interrupt to start of
routine that services interrupt
2. Dispatch latency – time for
schedule to take current process
off CPU and switch to another
Real-Time CPU Scheduling (Cont.)
 Conflict phase of
dispatch latency:
1. Preemption of
any process
running in kernel
mode
2. Release by low-
priority process
of resources
needed by high-
priority
processes
Priority-based Scheduling
 For real-time scheduling, scheduler must support preemptive, priority-
based scheduling
 But only guarantees soft real-time
 For hard real-time must also provide ability to meet deadlines

 Processes have new characteristics: periodic ones require CPU at
constant intervals
 Has processing time t, deadline d, period p
 0≤t≤d≤p
 Rate of periodic task is 1/p
Virtualization and Scheduling
 Virtualization software schedules multiple guests onto
CPU(s)
 Each guest doing its own scheduling
 Not knowing it doesn’t own the CPUs
 Can result in poor response time
 Can effect time-of-day clocks in guests
 Can undo good scheduling algorithm efforts of guests
Rate Montonic Scheduling
 A priority is assigned based on the inverse of its period
 Shorter periods = higher priority;
 Longer periods = lower priority
 P1 is assigned a higher priority than P2.
Missed Deadlines with Rate Monotonic Scheduling
Earliest Deadline First Scheduling (EDF)
 Priorities are assigned according to deadlines:
the earlier the deadline, the higher the priority;

the later the deadline, the lower the priority
Proportional Share Scheduling
 T shares are allocated among all processes in the system
 An application receives N shares where N < T
 This ensures each application will receive N / T of the total

processor time
POSIX Real-Time Scheduling
 The POSIX.1b standard
 API provides functions for managing real-time threads
 Defines two scheduling classes for real-time threads:
1. SCHED_FIFO - threads are scheduled using a FCFS strategy with a
FIFO queue. There is no time-slicing for threads of equal priority
2. SCHED_RR - similar to SCHED_FIFO except time-slicing occurs for
threads of equal priority
 Defines two functions for getting and setting scheduling policy:
1. pthread_attr_getsched_policy(pthread_attr_t *attr,
int *policy)
2. pthread_attr_setsched_policy(pthread_attr_t *attr,
int policy)
POSIX Real-Time Scheduling API
#include <pthread.h>
#include <stdio.h>
#define NUM_THREADS 5
int main(int argc, char *argv[])
{
int i, policy;
pthread_t_tid[NUM_THREADS];
pthread_attr_t attr;
/* get the default attributes */
pthread_attr_init(&attr);
/* get the current scheduling policy */
if (pthread_attr_getschedpolicy(&attr, &policy) != 0)
fprintf(stderr, "Unable to get policy.\n");
else {
if (policy == SCHED_OTHER) printf("SCHED_OTHER\n");
else if (policy == SCHED_RR) printf("SCHED_RR\n");
else if (policy == SCHED_FIFO) printf("SCHED_FIFO\n");
}
POSIX Real-Time Scheduling API (Cont.)
/* set the scheduling policy - FIFO, RR, or OTHER */

if (pthread_attr_setschedpolicy(&attr, SCHED_FIFO) != 0)
fprintf(stderr, "Unable to set policy.\n");
/* create the threads */
pthread_create(&tid[i],&attr,runner,NULL);
/* now join on each thread */
pthread_join(tid[i], NULL);
}
/* Each thread will begin control in this function */

void *runner(void *param)
{
/* do some work ... */
pthread_exit(0);
}
Operating System Examples
 Linux scheduling
 Windows scheduling
 Solaris scheduling
Linux Scheduling Through Version 2.5
 Prior to kernel version 2.5, ran variation of standard UNIX

scheduling algorithm
 Version 2.5 moved to constant order O(1) scheduling time
 Preemptive, priority based
 Two priority ranges: time-sharing and real-time
 Real-time range from 0 to 99 and nice value from 100 to 140
 Map into global priority with numerically lower values indicating higher
priority
 Higher priority gets larger q
 Task run-able as long as time left in time slice (active)
 If no time left (expired), not run-able until all other tasks use their slices
 All run-able tasks tracked in per-CPU runqueue data structure
 Two priority arrays (active, expired)
 Tasks indexed by priority
 When no more active, arrays are exchanged
 Worked well, but poor response times for interactive processes
Linux Scheduling in Version 2.6.23 +
 Completely Fair Scheduler (CFS)

 Scheduling classes
 Each has specific priority
 Scheduler picks highest priority task in highest scheduling class
 Rather than quantum based on fixed time allotments, based on proportion of CPU
time
 2 scheduling classes included, others can be added
1. default
2. real-time
 Quantum calculated based on nice value from -20 to +19

 Lower value is higher priority
 Calculates target latency – interval of time during which task should run at least
once
 Target latency can increase if say number of active tasks increases
 CFS scheduler maintains per task virtual run time in variable vruntime
 Associated with decay factor based on priority of task – lower priority is higher
decay rate
 Normal default priority yields virtual run time = actual run time
 To decide next task to run, scheduler picks task with lowest virtual run time
CFS Performance
Linux Scheduling (Cont.)
 Real-time scheduling according to POSIX.1b
 Real-time tasks have static priorities
 Real-time plus normal map into global priority scheme
 Nice value of -20 maps to global priority 100
 Nice value of +19 maps to priority 139
Windows Scheduling
 Windows uses priority-based preemptive scheduling
 Highest-priority thread runs next
 Dispatcher is scheduler
 Thread runs until (1) blocks, (2) uses time slice, (3)
preempted by higher-priority thread
 Real-time threads can preempt non-real-time
 32-level priority scheme
 Variable class is 1-15, real-time class is 16-31
 Priority 0 is memory-management thread
 Queue for each priority
 If no run-able thread, runs idle thread
Windows Priority Classes
 Win32 API identifies several priority classes to which a process can belong
 REALTIME_PRIORITY_CLASS, HIGH_PRIORITY_CLASS,
ABOVE_NORMAL_PRIORITY_CLASS,NORMAL_PRIORITY_CLASS,
BELOW_NORMAL_PRIORITY_CLASS, IDLE_PRIORITY_CLASS
 All are variable except REALTIME
 A thread within a given priority class has a relative priority
 TIME_CRITICAL, HIGHEST, ABOVE_NORMAL, NORMAL, BELOW_NORMAL,
LOWEST, IDLE
 Priority class and relative priority combine to give numeric priority
 Base priority is NORMAL within the class
 If quantum expires, priority lowered, but never below base
Windows Priority Classes (Cont.)
 If wait occurs, priority boosted depending on what was waited for

 Foreground window given 3x priority boost
 Windows 7 added user-mode scheduling (UMS)
 Applications create and manage threads independent of kernel
 For large number of threads, much more efficient
 UMS schedulers come from programming language libraries like
C++ Concurrent Runtime (ConcRT) framework
Windows Priorities
Solaris
 Priority-based scheduling
 Six classes available
 Time sharing (default) (TS)
 Interactive (IA)
 Real time (RT)
 System (SYS)
 Fair Share (FSS)
 Fixed priority (FP)
 Given thread can be in one class at a time
 Each class has its own scheduling algorithm
 Time sharing is multi-level feedback queue
 Loadable table configurable by sysadmin
Solaris Dispatch Table
Solaris Scheduling
Solaris Scheduling (Cont.)
 Scheduler converts class-specific priorities into a per-thread global
priority
 Thread with highest priority runs next
 Runs until (1) blocks, (2) uses time slice, (3) preempted by
higher-priority thread
 Multiple threads at same priority selected via RR
Algorithm Evaluation
 How to select CPU-scheduling algorithm for an OS?
 Determine criteria, then evaluate algorithms
 Deterministic modeling
 Type of analytic evaluation
 Takes a particular predetermined workload and defines the
performance of each algorithm for that workload
 Consider 5 processes arriving at time 0:
Deterministic Evaluation
 For each algorithm, calculate minimum average waiting time

 Simple and fast, but requires exact numbers for input, applies only to
those inputs
 FCS is 28ms:
 Non-preemptive SFJ is 13ms:
 RR is 23ms:
Queueing Models
 Describes the arrival of processes, and CPU and I/O bursts
probabilistically
 Commonly exponential, and described by mean
 Computes average throughput, utilization, waiting time, etc
 Computer system described as network of servers, each with
queue of waiting processes
 Knowing arrival rates and service rates
 Computes utilization, average queue length, average wait
time, etc
Little’s Formula
 n = average queue length
 W = average waiting time in queue
 λ = average arrival rate into queue
 Little’s law – in steady state, processes leaving queue must equal
processes arriving, thus:
n=λxW
 Valid for any scheduling algorithm and arrival distribution
 For example, if on average 7 processes arrive per second, and
normally 14 processes in queue, then average wait time per
process = 2 seconds
Simulations
 Queueing models limited
 Simulations more accurate
 Programmed model of computer system
 Clock is a variable
 Gather statistics indicating algorithm performance
 Data to drive simulation gathered via
 Random number generator according to probabilities
 Distributions defined mathematically or empirically
 Trace tapes record sequences of real events in real systems
Evaluation of CPU Schedulers by Simulation
Implementation
 Even simulations have limited accuracy

 Just implement new scheduler and test in real systems
 High cost, high risk
 Environments vary
 Most flexible schedulers can be modified per-site or per-system
 Or APIs to modify priorities
 But again environments vary
End of Chapter 6
Chapter 7: Deadlocks
Chapter 7: Deadlocks
 System Model
 Deadlock Characterization
 Methods for Handling Deadlocks
 Deadlock Prevention
 Deadlock Avoidance
 Deadlock Detection
 Recovery from Deadlock
Chapter Objectives
 To develop a description of deadlocks, which prevent

sets of concurrent processes from completing their
tasks
 To present a number of different methods for
preventing or avoiding deadlocks in a computer
system
System Model
 System consists of resources
 Resource types R1, R2, . . ., Rm
CPU cycles, memory space, I/O devices
 Each resource type Ri has Wi instances.
 Each process utilizes a resource as follows:
 request
 use
 release
Deadlock Characterization
Deadlock can arise if four conditions hold simultaneously.
 Mutual exclusion: only one process at a time can use a

resource
 Hold and wait: a process holding at least one resource is
waiting to acquire additional resources held by other
processes
 No preemption: a resource can be released only voluntarily
by the process holding it, after that process has completed
its task
 Circular wait: there exists a set {P0, P1, …, Pn} of waiting
processes such that P0 is waiting for a resource that is held
by P1, P1 is waiting for a resource that is held by P2, …, Pn–1
is waiting for a resource that is held by Pn, and Pn is waiting
for a resource that is held by P0.
Deadlock with Mutex Locks
 Deadlocks can occur via system calls, locking, etc.
 See example box in text page 318 for mutex deadlock
Resource-Allocation Graph
A set of vertices V and a set of edges E.
 V is partitioned into two types:
 P = {P1, P2, …, Pn}, the set consisting of all the processes
in the system
 R = {R1, R2, …, Rm}, the set consisting of all resource

types in the system
 request edge – directed edge Pi → Rj
 assignment edge – directed edge Rj → Pi
Resource-Allocation Graph (Cont.)
 Process
 Resource Type with 4 instances
 Pi requests instance of Rj
Pi
Rj
 Pi is holding an instance of Rj
Pi
Rj
Example of a Resource Allocation Graph
Resource Allocation Graph With A Deadlock
Graph With A Cycle But No Deadlock
Basic Facts
 If graph contains no cycles ⇒ no deadlock

 If graph contains a cycle ⇒
 if only one instance per resource type, then deadlock
 if several instances per resource type, possibility of
deadlock
Methods for Handling Deadlocks
 Ensure that the system will never enter a deadlock

state:
 Deadlock prevention
 Deadlock avoidence
 Allow the system to enter a deadlock state and then
recover
 Ignore the problem and pretend that deadlocks never
occur in the system; used by most operating systems,
including UNIX
Deadlock Prevention
Restrain the ways request can be made
 Mutual Exclusion – not required for sharable resources

(e.g., read-only files); must hold for non-sharable resources
 Hold and Wait – must guarantee that whenever a process
requests a resource, it does not hold any other resources
 Require process to request and be allocated all its
resources before it begins execution, or allow process
to request resources only when the process has none
allocated to it.
 Low resource utilization; starvation possible
Deadlock Prevention (Cont.)
 No Preemption –
 If a process that is holding some resources requests
another resource that cannot be immediately allocated to
it, then all resources currently being held are released
 Preempted resources are added to the list of resources
for which the process is waiting
 Process will be restarted only when it can regain its old
resources, as well as the new ones that it is requesting
 Circular Wait – impose a total ordering of all resource types,
and require that each process requests resources in an
increasing order of enumeration
Deadlock Example
/* thread one runs in this function */
void *do_work_one(void *param)
{
pthread_mutex_lock(&first_mutex);
pthread_mutex_lock(&second_mutex);
/** * Do some work */
pthread_mutex_unlock(&second_mutex);
pthread_mutex_unlock(&first_mutex);
pthread_exit(0);
}
/* thread two runs in this function */
void *do_work_two(void *param)
{
pthread_mutex_lock(&second_mutex);
pthread_mutex_lock(&first_mutex);
/** * Do some work */
pthread_mutex_unlock(&first_mutex);
pthread_mutex_unlock(&second_mutex);
pthread_exit(0);
}
Deadlock Example with Lock Ordering
void transaction(Account from, Account to, double amount)
{
mutex lock1, lock2;
lock1 = get_lock(from);
lock2 = get_lock(to);
acquire(lock1);
acquire(lock2);
withdraw(from, amount);
deposit(to, amount);
release(lock2);
release(lock1);
}
Transactions 1 and 2 execute concurrently. Transaction 1 transfers $25

from account A to account B, and Transaction 2 transfers $50 from account
B to account A
Deadlock Avoidance
Requires that the system has some additional a priori information
available
 Simplest and most useful model requires that each process
declare the maximum number of resources of each type
that it may need
 The deadlock-avoidance algorithm dynamically examines
the resource-allocation state to ensure that there can never
be a circular-wait condition
 Resource-allocation state is defined by the number of
available and allocated resources, and the maximum
demands of the processes
Safe State
 When a process requests an available resource, system must

decide if immediate allocation leaves the system in a safe state
 System is in safe state if there exists a sequence <P1, P2, …, Pn>
of ALL the processes in the systems such that for each Pi, the
resources that Pi can still request can be satisfied by currently
available resources + resources held by all the Pj, with j < I
 That is:
 If Pi resource needs are not immediately available, then Pi can
wait until all Pj have finished
 When Pj is finished, Pi can obtain needed resources, execute,
return allocated resources, and terminate
 When Pi terminates, Pi +1 can obtain its needed resources, and
so on
Basic Facts
 If a system is in safe state ⇒ no deadlocks
 If a system is in unsafe state ⇒ possibility of deadlock
 Avoidance ⇒ ensure that a system will never enter an

unsafe state.
Safe, Unsafe, Deadlock State
Avoidance Algorithms
 Single instance of a resource type

 Use a resource-allocation graph
 Multiple instances of a resource type

 Use the banker’s algorithm
Resource-Allocation Graph Scheme
 Claim edge Pi → Rj indicated that process Pj may request
resource Rj; represented by a dashed line
 Claim edge converts to request edge when a process requests
a resource
 Request edge converted to an assignment edge when the
resource is allocated to the process
 When a resource is released by a process, assignment edge
reconverts to a claim edge
 Resources must be claimed a priori in the system
Resource-Allocation Graph
Unsafe State In Resource-Allocation Graph
Resource-Allocation Graph Algorithm
 Suppose that process Pi requests a resource Rj

 The request can be granted only if converting the
request edge to an assignment edge does not result
in the formation of a cycle in the resource allocation
graph
Banker’s Algorithm
 Multiple instances
 Each process must a priori claim maximum use
 When a process requests a resource it may have to wait
 When a process gets all its resources it must return them in a

finite amount of time
Data Structures for the Banker’s Algorithm
Let n = number of processes, and m = number of resources types.
 Available: Vector of length m. If available [j] = k, there are k

instances of resource type Rj available
 Max: n x m matrix. If Max [i,j] = k, then process Pi may request at

most k instances of resource type Rj
 Allocation: n x m matrix. If Allocation[i,j] = k then Pi is currently

allocated k instances of Rj
 Need: n x m matrix. If Need[i,j] = k, then Pi may need k more

instances of Rj to complete its task
Need [i,j] = Max[i,j] – Allocation [i,j]
Safety Algorithm
1. Let Work and Finish be vectors of length m and n, respectively.
Initialize:
Work = Available
Finish [i] = false for i = 0, 1, …, n- 1
2. Find an i such that both:

(a) Finish [i] = false
(b) Needi ≤ Work
If no such i exists, go to step 4
3. Work = Work + Allocationi

Finish[i] = true
go to step 2
4. If Finish [i] == true for all i, then the system is in a safe state
Resource-Request Algorithm for Process Pi
Requesti = request vector for process Pi. If Requesti [j] = k then

process Pi wants k instances of resource type Rj
1. If Requesti ≤ Needi go to step 2. Otherwise, raise error condition,
since process has exceeded its maximum claim
2. If Requesti ≤ Available, go to step 3. Otherwise Pi must wait,
since resources are not available
3. Pretend to allocate requested resources to Pi by modifying the
state as follows:
Available = Available – Requesti;
Allocationi = Allocationi + Requesti;
Needi = Needi – Requesti;
 If safe ⇒ the resources are allocated to Pi
 If unsafe ⇒ Pi must wait, and the old resource-allocation state
is restored
Example of Banker’s Algorithm
 5 processes P0 through P4;

3 resource types:
A (10 instances), B (5instances), and C (7 instances)
 Snapshot at time T0:
Allocation Max Available
ABC ABC ABC
P0 010 753 332
P1 200 322
P2 302 902
P3 211 222
P4 002 433
Example (Cont.)
 The content of the matrix Need is defined to be Max – Allocation
Need
ABC
P0 743
P1 122
P2 600
P3 011
P4 431
 The system is in a safe state since the sequence < P1, P3, P4, P2, P0>
satisfies safety criteria
Example: P1 Request (1,0,2)
 Check that Request ≤ Available (that is, (1,0,2) ≤ (3,3,2) ⇒ true
Allocation Need Available
ABC ABC ABC
P0 010 743 230
P1 302 020
P2 302 600
P3 211 011
P4 002 431
 Executing safety algorithm shows that sequence < P1, P3, P4, P0, P2>
satisfies safety requirement
 Can request for (3,3,0) by P4 be granted?
 Can request for (0,2,0) by P0 be granted?
Deadlock Detection
 Allow system to enter deadlock state
 Detection algorithm
 Recovery scheme
Single Instance of Each Resource Type
 Maintain wait-for graph

 Nodes are processes
 Pi → Pj if Pi is waiting for Pj
 Periodically invoke an algorithm that searches for a cycle in the

graph. If there is a cycle, there exists a deadlock
 An algorithm to detect a cycle in a graph requires an order of n2

operations, where n is the number of vertices in the graph
Resource-Allocation Graph and Wait-for Graph
Resource-Allocation Graph Corresponding wait-for graph
Several Instances of a Resource Type
 Available: A vector of length m indicates the number of
available resources of each type
 Allocation: An n x m matrix defines the number of resources
of each type currently allocated to each process
 Request: An n x m matrix indicates the current request of
each process. If Request [i][j] = k, then process Pi is
requesting k more instances of resource type Rj.
Detection Algorithm
1. Let Work and Finish be vectors of length m and n, respectively

Initialize:
(a) Work = Available
(b) For i = 1,2, …, n, if Allocationi ≠ 0, then
Finish[i] = false; otherwise, Finish[i] = true
2. Find an index i such that both:

(a) Finish[i] == false
(b) Requesti ≤ Work
If no such i exists, go to step 4
Detection Algorithm (Cont.)
3. Work = Work + Allocationi
Finish[i] = true
go to step 2
4. If Finish[i] == false, for some i, 1 ≤ i ≤ n, then the system is in

deadlock state. Moreover, if Finish[i] == false, then Pi is
deadlocked
Algorithm requires an order of O(m x n2) operations to detect

whether the system is in deadlocked state
Example of Detection Algorithm
 Five processes P0 through P4; three resource types
A (7 instances), B (2 instances), and C (6 instances)
 Snapshot at time T0:

Allocation Request Available
ABC ABC ABC
P0 010 000 000
P1 200 202
P2 303 000
P3 211 100
P4 002 002
 Sequence <P0, P2, P3, P1, P4> will result in Finish[i] = true for all i
Example (Cont.)
 P2 requests an additional instance of type C

Request
ABC
P0 000
P1 202
P2 001
P3 100
P4 002
 State of system?
 Can reclaim resources held by process P0, but insufficient
resources to fulfill other processes; requests
 Deadlock exists, consisting of processes P1, P2, P3, and P4
Detection-Algorithm Usage
 When, and how often, to invoke depends on:
 How often a deadlock is likely to occur?
 How many processes will need to be rolled back?
 one for each disjoint cycle
 If detection algorithm is invoked arbitrarily, there may be many

cycles in the resource graph and so we would not be able to tell
which of the many deadlocked processes “caused” the
deadlock.
Recovery from Deadlock: Process Termination
 Abort all deadlocked processes
 Abort one process at a time until the deadlock cycle is eliminated
 In which order should we choose to abort?

1. Priority of the process
2. How long process has computed, and how much longer to
completion
3. Resources the process has used
4. Resources process needs to complete
5. How many processes will need to be terminated
6. Is process interactive or batch?
Recovery from Deadlock: Resource Preemption
 Selecting a victim – minimize cost
 Rollback – return to some safe state, restart process for that

state
 Starvation – same process may always be picked as victim,

include number of rollback in cost factor
End of Chapter 7
Chapter 8: Main Memory
Chapter 8: Memory Management
 Background
 Swapping
 Contiguous Memory Allocation
 Segmentation
 Paging
 Structure of the Page Table
 Example: The Intel 32 and 64-bit Architectures
 Example: ARM Architecture
Objectives
 To provide a detailed description of various ways of

organizing memory hardware
 To discuss various memory-management techniques,
including paging and segmentation
 To provide a detailed description of the Intel Pentium, which
supports both pure segmentation and segmentation with
paging
Background
 Program must be brought (from disk) into memory and

placed within a process for it to be run
 Main memory and registers are only storage CPU can
access directly
 Memory unit only sees a stream of addresses + read
requests, or address + data and write requests
 Register access in one CPU clock (or less)
 Main memory can take many cycles, causing a stall
 Cache sits between main memory and CPU registers
 Protection of memory required to ensure correct operation
Base and Limit Registers
 A pair of base and limit registers define the logical address space
 CPU must check every memory access generated in user mode to
be sure it is between base and limit for that user
Hardware Address Protection
Address Binding
 Programs on disk, ready to be brought into memory to execute form an
input queue
 Without support, must be loaded into address 0000
 Inconvenient to have first user process physical address always at 0000
 How can it not be?
 Further, addresses represented in different ways at different stages of a
program’s life
 Source code addresses usually symbolic
 Compiled code addresses bind to relocatable addresses
 i.e. “14 bytes from beginning of this module”
 Linker or loader will bind relocatable addresses to absolute addresses
 i.e. 74014
 Each binding maps one address space to another
Binding of Instructions and Data to Memory
 Address binding of instructions and data to memory addresses

can happen at three different stages
 Compile time: If memory location known a priori, absolute
code can be generated; must recompile code if starting
location changes
 Load time: Must generate relocatable code if memory
location is not known at compile time
 Execution time: Binding delayed until run time if the
process can be moved during its execution from one memory
segment to another
 Need hardware support for address maps (e.g., base and
limit registers)
Multistep Processing of a User Program
Logical vs. Physical Address Space
 The concept of a logical address space that is bound to a

separate physical address space is central to proper memory
management
 Logical address – generated by the CPU; also referred to
as virtual address
 Physical address – address seen by the memory unit
 Logical and physical addresses are the same in compile-time
and load-time address-binding schemes; logical (virtual) and
physical addresses differ in execution-time address-binding
scheme
 Logical address space is the set of all logical addresses
generated by a program
 Physical address space is the set of all physical addresses
generated by a program
Memory-Management Unit (MMU)
 Hardware device that at run time maps virtual to physical
address
 Many methods possible, covered in the rest of this chapter
 To start, consider simple scheme where the value in the
relocation register is added to every address generated by a
user process at the time it is sent to memory
 Base register now called relocation register
 MS-DOS on Intel 80x86 used 4 relocation registers
 The user program deals with logical addresses; it never sees the
real physical addresses
 Execution-time binding occurs when reference is made to
location in memory
 Logical address bound to physical addresses
Dynamic relocation using a relocation register
 Routine is not loaded until it is

called
 Better memory-space utilization;
unused routine is never loaded
 All routines kept on disk in
relocatable load format
 Useful when large amounts of
code are needed to handle
infrequently occurring cases
 No special support from the
operating system is required
 Implemented through program
design
 OS can help by providing libraries
to implement dynamic loading
Dynamic Linking
 Static linking – system libraries and program code combined by
the loader into the binary program image
 Dynamic linking –linking postponed until execution time
 Small piece of code, stub, used to locate the appropriate
memory-resident library routine
 Stub replaces itself with the address of the routine, and executes
the routine
 Operating system checks if routine is in processes’ memory
address
 If not in address space, add to address space
 Dynamic linking is particularly useful for libraries
 System also known as shared libraries
 Consider applicability to patching system libraries
 Versioning may be needed
Swapping
 A process can be swapped temporarily out of memory to a
backing store, and then brought back into memory for continued
execution
 Total physical memory space of processes can exceed
physical memory
 Backing store – fast disk large enough to accommodate copies
of all memory images for all users; must provide direct access to
these memory images
 Roll out, roll in – swapping variant used for priority-based
scheduling algorithms; lower-priority process is swapped out so
higher-priority process can be loaded and executed
 Major part of swap time is transfer time; total transfer time is
directly proportional to the amount of memory swapped
 System maintains a ready queue of ready-to-run processes
which have memory images on disk
Swapping (Cont.)
 Does the swapped out process need to swap back in to same
physical addresses?
 Depends on address binding method
 Plus consider pending I/O to / from process memory space
 Modified versions of swapping are found on many systems (i.e.,
UNIX, Linux, and Windows)
 Swapping normally disabled
 Started if more than threshold amount of memory allocated
 Disabled again once memory demand reduced below
threshold
Schematic View of Swapping
Context Switch Time including Swapping
 If next processes to be put on CPU is not in memory, need to

swap out a process and swap in target process
 Context switch time can then be very high
 100MB process swapping to hard disk with transfer rate of
50MB/sec
 Swap out time of 2000 ms
 Plus swap in of same sized process
 Total context switch swapping component time of 4000ms
(4 seconds)
 Can reduce if reduce size of memory swapped – by knowing
how much memory really being used
 System calls to inform OS of memory use via
request_memory() and release_memory()
Context Switch Time and Swapping (Cont.)
 Other constraints as well on swapping

 Pending I/O – can’t swap out as I/O would occur to wrong
process
 Or always transfer I/O to kernel space, then to I/O device
 Known as double buffering, adds overhead
 Standard swapping not used in modern operating systems
 But modified version common
 Swap only when free memory extremely low
Swapping on Mobile Systems
 Not typically supported
 Flash memory based
 Small amount of space
 Limited number of write cycles
 Poor throughput between flash memory and CPU on mobile
platform
 Instead use other methods to free memory if low
 iOS asks apps to voluntarily relinquish allocated memory
 Read-only data thrown out and reloaded from flash if needed
 Failure to free can result in termination
 Android terminates apps if low free memory, but first writes
application state to flash for fast restart
 Both OSes support paging as discussed below
Contiguous Allocation
 Main memory must support both OS and user processes
 Limited resource, must allocate efficiently
 Contiguous allocation is one early method
 Main memory usually into two partitions:
 Resident operating system, usually held in low memory with
interrupt vector
 User processes then held in high memory
 Each process contained in single contiguous section of
memory
Contiguous Allocation (Cont.)
 Relocation registers used to protect user processes from each
other, and from changing operating-system code and data
 Base register contains value of smallest physical address
 Limit register contains range of logical addresses – each
logical address must be less than the limit register
 MMU maps logical address dynamically
 Can then allow actions such as kernel code being transient
and kernel changing size
Hardware Support for Relocation and Limit Registers
Multiple-partition allocation
 Multiple-partition allocation
 Degree of multiprogramming limited by number of partitions
 Variable-partition sizes for efficiency (sized to a given process’ needs)
 Hole – block of available memory; holes of various size are scattered
throughout memory
 When a process arrives, it is allocated memory from a hole large enough to
accommodate it
 Process exiting frees its partition, adjacent free partitions combined
 Operating system maintains information about:
a) allocated partitions b) free partitions (hole)
Dynamic Storage-Allocation Problem
How to satisfy a request of size n from a list of free holes?
 First-fit: Allocate the first hole that is big enough
 Best-fit: Allocate the smallest hole that is big enough; must

search entire list, unless ordered by size
 Produces the smallest leftover hole
 Worst-fit: Allocate the largest hole; must also search entire list
 Produces the largest leftover hole
First-fit and best-fit better than worst-fit in terms of speed and storage
utilization
Fragmentation
 External Fragmentation – total memory space exists to
satisfy a request, but it is not contiguous
 Internal Fragmentation – allocated memory may be slightly
larger than requested memory; this size difference is memory
internal to a partition, but not being used
 First fit analysis reveals that given N blocks allocated, 0.5 N
blocks lost to fragmentation
 1/3 may be unusable -> 50-percent rule
Fragmentation (Cont.)
 Reduce external fragmentation by compaction

 Shuffle memory contents to place all free memory together
in one large block
 Compaction is possible only if relocation is dynamic, and is
done at execution time
 I/O problem
 Latch job in memory while it is involved in I/O
 Do I/O only into OS buffers
 Now consider that backing store has same fragmentation
problems
Segmentation
 Memory-management scheme that supports user view of memory
 A program is a collection of segments
 A segment is a logical unit such as:
main program
procedure
function
method
object
local variables, global variables
common block
stack
symbol table
arrays
User’s View of a Program
Logical View of Segmentation
4
1
3 2
4
user space physical memory space
Segmentation Architecture
 Logical address consists of a two tuple:
<segment-number, offset>,
 Segment table – maps two-dimensional physical addresses; each

table entry has:
 base – contains the starting physical address where the
segments reside in memory
 limit – specifies the length of the segment
 Segment-table base register (STBR) points to the segment

table’s location in memory
 Segment-table length register (STLR) indicates number of

segments used by a program;
segment number s is legal if s < STLR
Segmentation Architecture (Cont.)
 Protection
 With each entry in segment table associate:
 validation bit = 0 ⇒ illegal segment
 read/write/execute privileges
 Protection bits associated with segments; code sharing
occurs at segment level
 Since segments vary in length, memory allocation is a
dynamic storage-allocation problem
 A segmentation example is shown in the following diagram
Segmentation Hardware
Paging
 Physical address space of a process can be noncontiguous;
process is allocated physical memory whenever the latter is
available
 Avoids external fragmentation
 Avoids problem of varying sized memory chunks
 Divide physical memory into fixed-sized blocks called frames
 Size is power of 2, between 512 bytes and 16 Mbytes
 Divide logical memory into blocks of same size called pages
 Keep track of all free frames
 To run a program of size N pages, need to find N free frames and
load program
 Set up a page table to translate logical to physical addresses
 Backing store likewise split into pages
 Still have Internal fragmentation
Address Translation Scheme
 Address generated by CPU is divided into:
 Page number (p) – used as an index into a page table which
contains base address of each page in physical memory
 Page offset (d) – combined with base address to define the
physical memory address that is sent to the memory unit
page number page offset

p d
m -n n
 For given logical address space 2m and page size 2n
Paging Hardware
Paging Model of Logical and Physical Memory
Paging Example
n=2 and m=4 32-byte memory and 4-byte pages
Paging (Cont.)
 Calculating internal fragmentation

 Page size = 2,048 bytes
 Process size = 72,766 bytes
 35 pages + 1,086 bytes
 Internal fragmentation of 2,048 - 1,086 = 962 bytes
 Worst case fragmentation = 1 frame – 1 byte
 On average fragmentation = 1 / 2 frame size
 So small frame sizes desirable?
 But each page table entry takes memory to track
 Page sizes growing over time
 Solaris supports two page sizes – 8 KB and 4 MB
 Process view and physical memory now very different
 By implementation process can only access its own memory
Free Frames
Before allocation After allocation
Implementation of Page Table
 Page table is kept in main memory
 Page-table base register (PTBR) points to the page table
 Page-table length register (PTLR) indicates size of the page
table
 In this scheme every data/instruction access requires two
memory accesses
 One for the page table and one for the data / instruction
 The two memory access problem can be solved by the use of
a special fast-lookup hardware cache called associative
memory or translation look-aside buffers (TLBs)
Implementation of Page Table (Cont.)
 Some TLBs store address-space identifiers (ASIDs) in each
TLB entry – uniquely identifies each process to provide
address-space protection for that process
 Otherwise need to flush at every context switch
 TLBs typically small (64 to 1,024 entries)
 On a TLB miss, value is loaded into the TLB for faster access
next time
 Replacement policies must be considered
 Some entries can be wired down for permanent fast
access
Associative Memory
 Associative memory – parallel search
Page # Frame #
 Address translation (p, d)

 If p is in associative register, get frame # out
 Otherwise get frame # from page table in memory
Paging Hardware With TLB
Effective Access Time
 Associative Lookup = ε time unit

Can be < 10% of memory access time
 Hit ratio = α
 Hit ratio – percentage of times that a page number is found in the
associative registers; ratio related to number of associative
registers
 Consider α = 80%, ε = 20ns for TLB search, 100ns for memory access
 Effective Access Time (EAT)
EAT = (1 + ε) α + (2 + ε)(1 – α)
=2+ε–α
 Consider α = 80%, ε = 20ns for TLB search, 100ns for memory access
 EAT = 0.80 x 100 + 0.20 x 200 = 120ns
 Consider more realistic hit ratio -> α = 99%, ε = 20ns for TLB search,
100ns for memory access
 EAT = 0.99 x 100 + 0.01 x 200 = 101ns
Memory Protection
 Memory protection implemented by associating protection bit
with each frame to indicate if read-only or read-write access is
allowed
 Can also add more bits to indicate page execute-only, and
so on
 Valid-invalid bit attached to each entry in the page table:
 “valid” indicates that the associated page is in the
process’ logical address space, and is thus a legal page
 “invalid” indicates that the page is not in the process’
logical address space
 Or use page-table length register (PTLR)
 Any violations result in a trap to the kernel
Valid (v) or Invalid (i) Bit In A Page Table
Shared Pages
 Shared code
 One copy of read-only (reentrant) code shared among
processes (i.e., text editors, compilers, window systems)
 Similar to multiple threads sharing the same process space
 Also useful for interprocess communication if sharing of
read-write pages is allowed
 Private code and data
 Each process keeps a separate copy of the code and data
 The pages for the private code and data can appear
anywhere in the logical address space
Shared Pages Example
Structure of the Page Table
 Memory structures for paging can get huge using straight-
forward methods
 Consider a 32-bit logical address space as on modern
computers
 Page size of 4 KB (212)
 Page table would have 1 million entries (232 / 212)
 If each entry is 4 bytes -> 4 MB of physical address space /
memory for page table alone
 That amount of memory used to cost a lot
 Don’t want to allocate that contiguously in main memory
 Hierarchical Paging
 Hashed Page Tables
 Inverted Page Tables
Hierarchical Page Tables
 Break up the logical address space into multiple page

tables
 A simple technique is a two-level page table
 We then page the page table
Two-Level Page-Table Scheme
Two-Level Paging Example
 A logical address (on 32-bit machine with 1K page size) is divided into:
 a page number consisting of 22 bits
 a page offset consisting of 10 bits
 Since the page table is paged, the page number is further divided into:
 a 12-bit page number
 a 10-bit page offset
 Thus, a logical address is as follows:
 where p1 is an index into the outer page table, and p2 is the

displacement within the page of the inner page table
 Known as forward-mapped page table
Address-Translation Scheme
64-bit Logical Address Space
 Even two-level paging scheme not sufficient

 If page size is 4 KB (212)
 Then page table has 252 entries
 If two level scheme, inner page tables could be 210 4-byte entries
 Address would look like
 Outer page table has 242 entries or 244 bytes

 One solution is to add a 2nd outer page table
 But in the following example the 2nd outer page table is still 234 bytes in
size
 And possibly 4 memory access to get to one physical memory
location
Three-level Paging Scheme
Hashed Page Tables
 Common in address spaces > 32 bits
 The virtual page number is hashed into a page table
 This page table contains a chain of elements hashing to the same
location
 Each element contains (1) the virtual page number (2) the value of the
mapped page frame (3) a pointer to the next element
 Virtual page numbers are compared in this chain searching for a
match
 If a match is found, the corresponding physical frame is extracted
 Variation for 64-bit addresses is clustered page tables
 Similar to hashed but each entry refers to several pages (such as
16) rather than 1
 Especially useful for sparse address spaces (where memory
references are non-contiguous and scattered)
Hashed Page Table
Inverted Page Table
 Rather than each process having a page table and keeping track
of all possible logical pages, track all physical pages
 One entry for each real page of memory
 Entry consists of the virtual address of the page stored in that
real memory location, with information about the process that
owns that page
 Decreases memory needed to store each page table, but
increases time needed to search the table when a page
reference occurs
 Use hash table to limit the search to one — or at most a few —
page-table entries
 TLB can accelerate access
 But how to implement shared memory?
 One mapping of a virtual address to the shared physical
address
Inverted Page Table Architecture
Oracle SPARC Solaris
 Consider modern, 64-bit operating system example with tightly
integrated HW
 Goals are efficiency, low overhead
 Based on hashing, but more complex
 Two hash tables
 One kernel and one for all user processes
 Each maps memory addresses from virtual to physical memory
 Each entry represents a contiguous area of mapped virtual
memory,
 More efficient than having a separate hash-table entry for
each page
 Each entry has base address and span (indicating the number
of pages the entry represents)
Oracle SPARC Solaris (Cont.)
 TLB holds translation table entries (TTEs) for fast hardware lookups
 A cache of TTEs reside in a translation storage buffer (TSB)
 Includes an entry per recently accessed page
 Virtual address reference causes TLB search
 If miss, hardware walks the in-memory TSB looking for the TTE
corresponding to the address
 If match found, the CPU copies the TSB entry into the TLB
and translation completes
 If no match found, kernel interrupted to search the hash table
– The kernel then creates a TTE from the appropriate hash
table and stores it in the TSB, Interrupt handler returns
control to the MMU, which completes the address
translation.
Example: The Intel 32 and 64-bit Architectures
 Dominant industry chips
 Pentium CPUs are 32-bit and called IA-32 architecture
 Current Intel CPUs are 64-bit and called IA-64 architecture
 Many variations in the chips, cover the main ideas here
Example: The Intel IA-32 Architecture
 Supports both segmentation and segmentation with paging

 Each segment can be 4 GB
 Up to 16 K segments per process
 Divided into two partitions
 First partition of up to 8 K segments are private to
process (kept in local descriptor table (LDT))
 Second partition of up to 8K segments shared among all
processes (kept in global descriptor table (GDT))
Example: The Intel IA-32 Architecture (Cont.)
 CPU generates logical address

 Selector given to segmentation unit
 Which produces linear addresses
 Linear address given to paging unit

 Which generates physical address in main memory
 Paging units form equivalent of MMU
 Pages sizes can be 4 KB or 4 MB
Logical to Physical Address Translation in IA-32
Intel IA-32 Segmentation
Intel IA-32 Paging Architecture
Intel IA-32 Page Address Extensions
 32-bit address limits led Intel to create page address extension (PAE),
allowing 32-bit apps access to more than 4GB of memory space
 Paging went to a 3-level scheme
 Top two bits refer to a page directory pointer table
 Page-directory and page-table entries moved to 64-bits in size
 Net effect is increasing address space to 36 bits – 64GB of physical
memory
Intel x86-64
 Current generation Intel x86 architecture
 64 bits is ginormous (> 16 exabytes)
 In practice only implement 48 bit addressing
 Page sizes of 4 KB, 2 MB, 1 GB
 Four levels of paging hierarchy
 Can also use PAE so virtual addresses are 48 bits and physical
addresses are 52 bits
Example: ARM Architecture
 Dominant mobile platform chip
(Apple iOS and Google Android
devices for example)
 Modern, energy efficient, 32-bit
CPU
 4 KB and 16 KB pages
 1 MB and 16 MB pages (termed
sections)
 One-level paging for sections, two-
level for smaller pages
 Two levels of TLBs
 Outer level has two micro
TLBs (one data, one
instruction)
 Inner is single main TLB
 First inner is checked, on
miss outers are checked,
and on miss page table
walk performed by CPU
End of Chapter 8

Modern Operating Systems: Third Edition Andrew S. Tanenbaum

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MODERN OPERATING SYSTEMS

A modern computer consists of:

• One or more processors

Managing all these components requires a layer of

Figure 1-1. Where the operating system fits in.

Figure 1-2. Operating systems turn ugly hardware into beautiful

• Allow multiple programs to run at the same time

• (1945–55) Vacuum Tubes

Figure 1-3. An early batch system.

Figure 1-3. (c) Operator carries input tape to 7094.

Figure 1-4. Structure of a typical FMS job.

Figure 1-5. A multiprogramming system

Figure 1-6. Some of the components

Figure 1-7. (a) A three-stage pipeline. (b) A superscalar CPU.

Figure 1-8. (a) A quad-core chip with a shared L2 cache.

Figure 1-9. A typical memory hierarchy.

Questions when dealing with cache:

• When to put a new item into the cache.

Figure 1-10. Structure of a disk drive.

Figure 1-11. (a) The steps in starting an I/O device and

Figure 1-12. The structure of a large Pentium system

• Mainframe operating systems

Figure 1-13. A process tree. Process A created two child

Figure 1-14. A file system for a university department.

Figure 1-16. Two processes connected by a pipe.

Figure 1-17. The 11 steps in making the system call

Figure 1-18. Some of the major POSIX system calls.

Figure 1-18. Some of the major POSIX system calls.

Figure 1-18. Some of the major POSIX system calls.

Figure 1-18. Some of the major POSIX system calls.

Figure 1-19. A stripped-down shell.

Figure 1-20. Processes have three segments:

Figure 1-21. (a) Two directories before linking /usr/jim/memo to

Figure 1-22. (a) File system before the mount.

Figure 1-23. The Win32 API calls that roughly correspond

Monolithic systems – basic structure:

• A main program that invokes the requested

Figure 1-24. A simple structuring model for a monolithic system.

Figure 1-25. Structure of the THE operating system.

Figure 1-26. Structure of the MINIX 3 system.

Figure 1-27. The client-server model over a network.

Figure 1-28. The structure of VM/370 with CMS.

Figure 1-29. (a) A type 1 hypervisor. (b) A type 2 hypervisor.

Figure 1-30. The process of compiling C and header files to

 An operating system executes a variety of programs:

 As a process executes, it changes state

Represented by the C structure task_struct

pid t_pid; /* process identifier */

 Maximize CPU use, quickly switch processes onto CPU for

 Queueing diagram represents queues, resources, flows

 System must provide mechanisms for:

 Process executes last statement and then asks the operating

 Some operating systems do not allow child to exists if its parent

 Many web browsers ran as single process (some still do)

 Processes within a system may be independent or cooperating

 Solution is correct, but can only use BUFFER_SIZE-1 elements

/* consume the item in next consumed */

 An area of memory shared among the processes that wish