Adaptive Digital Current Mode Controller for DC-DC Converters

Fazel Taeed, Karsten Holm Andersen, Morten Nymand

Maersk Mc-Kinney Moller Institute
University of Southern Denmark
Campusvej 55, Odense, Denmark

Acknowledgements
This research is primary supported by Interreg 4A- European Regional Development fund for
Schleswig-K.E.R.N. and Southern Denmark region (eMOTION) and partially supported by the Danish
Energy Agency’ EUDP program.

Keywords
Digital control, Converter Control, DC power supply, Adaptive control, Field Programmable Gate
Array (FPGA).

Abstract
An adaptive control technique for a digital current mode control of dc-dc converters is proposed in this
paper. The adaptive digital controller is designed to maintain the optimum gain-phase of the outer
control loop regardless of the changes in the load value. In the control algorithm, the load resistance is
calculated using the average current and output voltage values inside the digital processor. Next the
calculated value of the load resistance is used to tune the Proportional-Integral (PI) controller such that
the requirements for crossover frequency and phase margin values are fulfilled. In order to avoid the
calculation burden to slow down the program execution speed, the parameter values of PI controller
for each value of the load resistance are inserted into a look-up table inside the digital processor. To
verify the proposed technique, the controller is implemented in an FPGA to control a buck converter.
The experimental results show the excellent performance of the controller in presence of a load
change.

Introduction
In dc-dc converters the Current Mode Control (CMC) provides higher bandwidth and inherent over-
current protection compared to voltage mode control [1]. In CMC, the external control loop is a
voltage loop with output voltage as feedback and a voltage reference. The inner loop in CMC is
current loop in which the inductor current (peak, valley or average value of the inductor) is compared
with output of the voltage loop. Implementation of the controllers in discrete-domain has several
advantages compared to continuous domain implementation [2]. Discrete-domain (digital) controller
performance is less affected by temperature drift or component aging compared to continuous-domain
(analog) controller [2]. Digital controllers are also more flexible and easier to update. But they achieve
lower bandwidth compared to analog controllers due to delays created by Analog-to-Digital Converter
(ADC) and calculations [3]. Different types of solutions are proposed by researchers in order to
implement the digital CMC. A predictive digital CMC is proposed in [4]-[6], in these methods the next
duty cycle is predicted using the present value of duty cycle, inductor size, one sample of inductor
current and input voltage. These methods have dependency on inductor size; the inner current loop in
[4]-[5] has inherent delay which results in bandwidth reduction [7]. In order to avoid sampling and
measuring the inductor current, the sensor-less CMC have been proposed [8]-[10]. In these techniques,
the inductor current is predicted using parasitic parameters. This method requires less hardware
components for implementation; on the other hand it has high dependency on temperature and
component aging. In another approach, the inductor current is re-generated inside the digital processor
using the falling slope of inductor current [11]. This solution does not have any dependency on
inductor size, but it is mainly applicable for dc-dc converters which are operating at Continuous
Conduction Mode (CCM). The common feature of all the proposed methods is dependency of the
outer loop transfer function on load resistance value. In these controlled converters, the outer loop
transfer function changes when the load value changes. Therefore, the controller should be tuned for
worst case condition. As a result, controller cannot always operate in the optimum conditions.
As it was mentioned earlier, digital controller has the merit of flexibility which allows implementation
of complicated control algorithms. Therefore, it is possible to implement a compensation mechanism
inside the digital controller in order to cancel or minimize the effect of load change in the controlled
converter.
In this paper, an adaptive control technique for compensating the load change in digital CMC of the
dc-dc converters is proposed. In the proposed solution, the load resistance is calculated using the
average value of output current and the output voltage. Normally both of these parameters are
available in digital CMC, therefore the proposed solution does not require extra hardware component.
The adaptive controller in this solution is a Proportional-Integral (PI) controller with variable
parameters. Values of PI controller parameters are determined by load resistance and output filter
capacitor.

Digital Peak Current Mode Control

In Fig. 1 the digital Peak Current Mode Control (PCMC) waveforms are shown. The inductor current
(IL) is re-generated inside the digital processor using the inductor current slope measurement technique
[11]. The outer voltage loop output is shown with Ic[n]. The rising and falling slopes of IL are shown
with mr[n] and mf[n] respectively. In PCMC, the switch(es) is turned on in the beginning of the
control cycle; it turns off when the inductor current and output of the compensation counter intersect.

ILp[n]
Ic [n] Compensator Counter

-mc[n]
IL
mr[n] tPWM -m [n]
f

ILdip[n] T𝑠𝑠
1<D[n]<� �
PWM Control Pulse
𝑡𝑡𝑃𝑃𝑃𝑃𝑃𝑃
i
D[n]
Fig. 1: Digital PCMC waveforms

The compensation counter is replica of compensation ramp which exists in analog PCMC [12]. The
compensation slope is shown with mc[n]. The compensation counter (ramp) is required in order to
prevent the sub-harmonic oscillation to happen and destabilize the controlled system [12].
The inner loop of digital PCMC block diagram is shown in Fig. 2. In [13], digital PCMC with
waveforms shown in Fig. 1 is modeled, which yields

𝑉𝑉𝑜𝑜 (𝑠𝑠) 𝐺𝐺𝑣𝑣𝑣𝑣 (𝑠𝑠) 2(1 + 𝛼𝛼)

≈ 𝜔𝜔𝑛𝑛 = √12𝑓𝑓𝑠𝑠 ≃ 𝜋𝜋𝑓𝑓𝑠𝑠 , 𝑄𝑄𝑛𝑛 ≃ (1)
𝐼𝐼𝑐𝑐 (𝑠𝑠) 𝑠𝑠 2 𝑠𝑠 𝜋𝜋(1 − 𝛼𝛼)
𝐺𝐺𝑖𝑖𝑖𝑖 (𝑠𝑠)𝑅𝑅𝑖𝑖 � 2 + + 1�
𝜔𝜔𝑛𝑛 𝑄𝑄𝑛𝑛 𝜔𝜔𝑛𝑛

𝑉𝑉𝑜𝑜 (𝑠𝑠) 𝐼𝐼𝐿𝐿 (𝑠𝑠)

The Gvd(s) and Gid(s) are defined as 𝐺𝐺𝑣𝑣𝑣𝑣 (𝑠𝑠) = and 𝐺𝐺𝑖𝑖𝑖𝑖 (𝑠𝑠) = . Also α in (1) is equal to
𝑑𝑑(𝑠𝑠) 𝑑𝑑(𝑠𝑠)
𝑚𝑚𝑓𝑓 −𝑚𝑚𝑐𝑐
𝑚𝑚𝑟𝑟 +𝑚𝑚𝑐𝑐
.
 Ic (s) d(s) Vo (s)
+ Hfr(s) Gvd(s)
-

IL(s)
Ri Gid(s)

Fig. 2: Inner current loop diagram of digital PCMC

Values of Gvd(s) and Gid(s) for a buck converter are obtained in [13]. The buck converter and its
corresponding transfer functions are shown in Fig. 3.
SW1
𝑉𝑉𝑖𝑖 𝑅𝑅𝑅𝑅𝑅𝑅 + 1
IL(t) 𝐺𝐺𝑖𝑖𝑖𝑖 (𝑠𝑠) =
L 𝑅𝑅 𝐿𝐿𝐿𝐿𝑠𝑠 2 + 𝑠𝑠 � 𝐿𝐿 + 𝑐𝑐𝑐𝑐� + 1
Vi c
+ 𝑅𝑅
D1 R Vo(t) 1 + 𝑟𝑟𝑟𝑟𝑟𝑟
r _ 𝐺𝐺𝑣𝑣𝑣𝑣 (𝑠𝑠) = 𝑉𝑉𝑖𝑖
𝐿𝐿
𝐿𝐿𝐿𝐿𝑠𝑠 2 + 𝑠𝑠 � + 𝑐𝑐𝑐𝑐� + 1
𝑅𝑅

Fig. 3: Buck converter schematic and its Gvd(s) and Gid(s)

Using transfer function in Fig. 3 and (1) the inner current loop transfer function obtains

𝑉𝑉𝑜𝑜 (𝑠𝑠) 𝑅𝑅 (1 + 𝑟𝑟𝑟𝑟𝑟𝑟)

≅ (2)
𝐼𝐼𝑐𝑐 (𝑠𝑠) 𝑅𝑅𝑖𝑖 𝑠𝑠 2 𝑠𝑠
(𝑅𝑅𝑅𝑅𝑅𝑅 + 1) � 2 + + 1�
𝜔𝜔𝑛𝑛 𝜔𝜔𝑛𝑛 𝑄𝑄𝑛𝑛
𝑉𝑉𝑜𝑜 (𝑠𝑠)
In (2) the has a zero and one first order pole and couple of complex conjugate poles. The first
𝐼𝐼𝑐𝑐 (𝑠𝑠)
order pole which is Rcs+1 is dependent on R and c. The output filter capacitor (c) is a fixed parameter,
but the R value which represents the load impedance can change due to the load variation. Normally,
the PI controller in the outer loop is tuned such that, the PI zero cancels the pole in inner current loop
transfer function [13]. A PI controller has the following transfer function

𝐼𝐼𝑐𝑐 (𝑠𝑠) 𝐾𝐾𝐼𝐼 𝐾𝐾𝑃𝑃 𝑠𝑠 + 𝐾𝐾𝐼𝐼

𝑇𝑇𝑃𝑃𝑃𝑃 (𝑠𝑠) = = 𝐾𝐾𝑃𝑃 + = (3)
𝑒𝑒(𝑠𝑠) 𝑠𝑠 𝑠𝑠
𝐾𝐾
From (3) the TPI(s) has a zero at − 𝐾𝐾 𝐼𝐼 . The error signal which is input to the PI controller is shown
𝑃𝑃
with e(s). In the common PI controller structures, the KP and KI values are constant; they are tuned
either for nominal load values or the worst case condition. In analog controllers the PI parameters are
represented by capacitor and resistance values, therefore it is difficult to have time variable KP and KI.
In digital controllers these parameters are coefficients in algebraic controller equation. Using the bi-
linear transform TPI(s) can convert to z-domain

𝑇𝑇𝑖𝑖 𝑇𝑇𝑖𝑖 −1
𝐼𝐼𝑐𝑐 (𝑧𝑧) �𝐾𝐾𝑃𝑃 + 𝐾𝐾𝐼𝐼 2 � + (−𝐾𝐾𝑃𝑃 + 𝐾𝐾𝑃𝑃 2 )𝑧𝑧 (4)
𝑇𝑇𝑃𝑃𝑃𝑃 (𝑧𝑧) = =
𝑒𝑒(𝑧𝑧) 1 − 𝑧𝑧 −1
𝐼𝐼𝑐𝑐 (𝑧𝑧)
In (4), Ti is sampling time for conversion of the system from s-domain into z-domain. The in (4)
𝑒𝑒(𝑧𝑧)
can be converted to an algebraic equation

𝑇𝑇𝑖𝑖 𝑇𝑇𝑖𝑖 (5)

𝐼𝐼𝑐𝑐 [𝑛𝑛] = 𝐼𝐼𝑐𝑐 [𝑛𝑛 − 1] + 𝐾𝐾1 ∙ 𝑒𝑒[𝑛𝑛] + 𝐾𝐾2 ∙ 𝑒𝑒[𝑛𝑛 − 1] 𝐾𝐾1 = �𝐾𝐾𝑃𝑃 + 𝐾𝐾𝐼𝐼 � , 𝐾𝐾2 = �−𝐾𝐾𝑃𝑃 + 𝐾𝐾𝑃𝑃 �
2 2
Adaptive Digital PI Controller
1
Using (2) the buck converter has a pole at − in the inner current loop transfer function. Using the
𝑅𝑅𝑅𝑅
design criteria in which the PI controller zero should cancel the pole in (2), one tuning rule for PI
controller obtains

𝐾𝐾𝐼𝐼 1 (6)
=
𝐾𝐾𝑃𝑃 𝑅𝑅𝑅𝑅

The next tuning rule obtains by keeping the gain constant at crossover frequency (fc). The open loop
transfer function of the outer loop including the PI controllers equal to

𝑅𝑅 ∙ 𝐾𝐾𝐼𝐼 (𝑠𝑠𝑠𝑠𝑃𝑃 /𝐾𝐾𝐼𝐼 + 1) ∙ (1 + 𝑟𝑟𝑟𝑟𝑟𝑟)

𝑇𝑇𝑂𝑂𝑂𝑂 (𝑠𝑠) ≅ (7)
𝑠𝑠 2 𝑠𝑠
𝑠𝑠 ∙ 𝑅𝑅𝑖𝑖 ∙ (𝑅𝑅𝑅𝑅𝑅𝑅 + 1) ∙ � 2 + 𝜔𝜔 𝑄𝑄 + 1�
𝜔𝜔𝑛𝑛 𝑛𝑛 𝑛𝑛

The load dependent parameters in (7) can be separated as

𝑅𝑅 ∙ 𝐾𝐾𝐼𝐼 (𝑠𝑠𝑠𝑠𝑃𝑃 /𝐾𝐾𝐼𝐼 + 1) (8)

𝐺𝐺𝑅𝑅 (𝑠𝑠) =
𝑠𝑠 ∙ (𝑅𝑅𝑅𝑅𝑅𝑅 + 1)

Substituting (6) in (8) yields

𝑅𝑅 ∙ 𝐾𝐾𝐼𝐼
𝐺𝐺𝑅𝑅 (𝑠𝑠) = (9)
𝑠𝑠

Assuming |𝐺𝐺𝑅𝑅 (2𝜋𝜋𝑓𝑓𝑐𝑐 )| = 𝐺𝐺, the second tuning rule for PI controller parameters obtains. Using (6) and
(9) values of KP and KI can be calculated as

𝐾𝐾𝑃𝑃 [𝑛𝑛] = 𝑅𝑅[𝑛𝑛] ∙ 𝑐𝑐 ∙ 𝐾𝐾𝐼𝐼 (10)

And

𝐺𝐺 ∙ 2𝜋𝜋𝑓𝑓𝑐𝑐
𝐾𝐾𝐼𝐼 [𝑛𝑛] = (11)
𝑅𝑅[𝑛𝑛]

Substituting (10) and (11) in (5) yield the required K1 and K2 parameters for digital PI controller. The
G value can be found by sketching the bode plot of the system using (7) and (8) and finding the
required amplitude at fc.

In Fig.4 the block diagram of adaptive digital PCMC is shown. The “PI parameters calculation”
calculates the R using measured ILavg and Vo values. Additionally, it calculates K1 and K2 using (10)
and (11). In the buck converter average value of inductor current (ILavg) and average value of load
current in steady-state condition are equal; therefore ILavg can be used instead of the average load
current for finding the load resistance. The measurement gains for output voltage and inductor current
are shown by RV and Ri respectively.

𝑅𝑅𝑖𝑖 𝑉𝑉𝑜𝑜 [𝑛𝑛]

𝑅𝑅[𝑛𝑛] = (12)
𝑅𝑅𝑉𝑉 𝐼𝐼𝐿𝐿 [𝑛𝑛]
 Digital processor (FPGA)
ILavg[n] Ri IL
Slope Decoder ADC
Calculation
ILdip[n]
mr[n]

Vref )c [𝑛𝑛] Digital PWM DC

PI controller

+ -
PWM
K1 K2 DC
ILavg[n] PI parameters
Calculation mc[n]
R vV o
ADC

Fig. 4: Block diagram of digital PCMC with adaptive control

The slope calculation block uses the same principles as described in [11] to find the rising inductor
current slope (mr[n]). Finding the appropriate value of compensation slope (mc[n]) requires sketching
the bode plot of the system using (7). The mc[n] value does not have significant on crossover
frequency, but it changes the phase margin value. Theoretical approach of tuning mc[n] is explained in
[13].
10

4 K1
K2

-4

-8
1 4 7 10 13 16 19 22 25 26
R(ohm)

Fig. 5: K1 and K2 values versus the load resistance

In order to reduce the calculation time of the digital processor, values of K1 and K2 for defined range
of R can be calculated offline and saved in a look-up table.

Hardware Implementation and experimental results

The proposed controller is implemented in Xilinx Spartan XI FPGA. A buck converter same as the
schematic in Fig. 3 is built to verify the controller strategy. The buck converter specifications are
shown in Table I. The switching frequency (fs) is 50 kHz. The nominal load is 4Ω, the light load
resistance is 26Ω. Two 12 bits ADCs are used to sample the inductor current and output voltage. The
sampling frequency of these ADCs is equal to switching frequency.

Table I: Buck Converter Parameters

Vi 40 V
Vo 20 V
L 164 µH
C 22 µF
r 10 mΩ
R 4-26Ω
fs 50 kHz
In order to evaluate the adaptive controller performance, a constant-parameter PI controller
(conventional PI) is also implemented. The tuning criterion for PI controller is defined to have at least
60° of phase margin in worst condition. For conventional type of PI controller, the worst condition is
the maximum load resistance (light load). Tuning the conventional PI controller in the light load
condition leads to high phase margin in nominal load value. Although the high phase margin value
results in a more stable controller, but it will slow down the transient response. Therefore, it is
expected that the conventional PI controller has slower transient response than the adaptive PI
controller.

4.8 kHz

(a) Magnitude (dB)

4.8 kHz
61.8°

(b) Phase (degree)

Fig. 6 : Comparison of measured open-loop gain and phase controllers in minimum load of 26Ω

The open-loop gain and phase which is identified by (7) is measured using Agilent 4395A network
analyzer and an injection transformer. The measured values are saved in an ASCII file, and then they
are plotted in MATLAB. In Fig. 6, the measured open-loop transfer functions using Adaptive and
conventional PI controllers in minimum load value are shown. Since the minimum load condition is
the worst design case, both of the controllers have equal crossover frequency (≈ 4.8 kHz) and phase
margin (≈61.8°).

4.333 kHz

3.948 kHz

(a) Magnitude (dB)

 3.948 kHz
91.4°

70.6° 4.333 kHz

(b) Phase(degree)
Fig. 7: Comparison of measured open-loop gain and phase controllers in nominal load of 4Ω

The Top(s) changes due to the load value change. The adaptive PI controller is able to compensate for
the transfer function changes due to the load variation. But in the conventional PI controller, no
reaction to the load change occurs. Therefore as Fig. 7 indicates, the crossover frequency declines and
phase margin increases in the nominal load condition in the case of conventional PI controller. The
phase margin increase and crossover frequency decline result in slower response of conventional
controller compared with the adaptive controller. The crossover frequency variation for adaptive
controller from the minimum load to nominal load condition is around 467 Hz, whereas this value is
852 Hz for conventional PI controller (almost two times of adaptive controller). In the same manner,
the phase margin change for adaptive controller is about 9° versus 30° for conventional PI controller.
5
Conventional PI
4.75 Adaptive PI
Crossover frequency (kHz)

4.5

4.25

3.75

3.5
0 4 10 16 21 26 30
R(ohm)

(a) Crossover frequency

100
Conventional PI

90 Adaptive PI

80
Phase margin (degree)

70

60

50
0 4 10 16 21 26 30
R(ohm)
(b) Phase margin
Fig. 8: Comparison of measured crossover frequency and phase margin in different load values

The measured crossover frequency and phase margin in five load values using conventional and
adaptive controllers are shown in Fig. 8. This figure demonstrates that the crossover frequency of
conventional PI controller is always lower or at most equal to crossover frequency of adaptive PI
controller. Therefore, adaptive controller has generally faster transient response. Furthermore, phase
margin of conventional PI controller is mostly larger or at least equal to adaptive PI controller. The
phase margin of the adaptive PI controller is always larger than defined design target of 60°. The
higher phase margin value is another reason for slower transient response of the conventional PI
controller.

In Fig. 9 transient response of the buck converter using conventional and adaptive PI controllers are
compared. The settling time for adaptive controller is around 400 µs versus the 1.6 ms for
conventional PI controller. The main reason for the difference is that the conventional PI controller has
lower crossover frequency and higher phase margin in nominal load value. When the step change in
the load occurs, the load current increases; therefore parameters of adaptive PI controller change in
order to compensate the effect of load change.

Vo 10V/div Vo 10V/div

2A/div 2A/div

IL IL

500µs/div 500µs/div
(a) Adaptive PI controller (b) Conventional PI controller
Fig. 9: Comparison of controller responses for step change in the load from 26Ω to 4Ω

Conclusion
An adaptive digital PI controller for current mode control of dc-dc converters is proposed in this
paper. Controller parameters are updated with changes in the load resistance value. The load resistance
value is calculated using measured output voltage and inductor current. The adaptive PI controller is
designed to maintain the crossover frequency and phase margin almost constant in presence of the
load change. The proposed controller is implemented in an FPGA to control a buck converter. The
experimental results show the superiority of proposed solution in the term of maintaining crossover
frequency and phase margin compared to conventional (constant parameter) PI controller.
Additionally, the proposed solution has much faster transient response versus the conventional
controller in presence of load step-up disturbance.

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