Logic Level TOPFET BUK130-50DL SMD Version of BUK119-50DL: Description Quick Reference Data
Logic Level TOPFET BUK130-50DL SMD Version of BUK119-50DL: Description Quick Reference Data
Logic Level TOPFET BUK130-50DL SMD Version of BUK119-50DL: Description Quick Reference Data
General purpose switch for driving IISL Input supply current VIS = 5 V 650 µA
lamps
motors
solenoids
heaters
in automotive systems and other
applications.
SOURCE
2 drain I P
3 source
2
mb drain
1 3 S
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDS Continuous drain source voltage1 - 50 V
ID Continuous drain current VIS = 5 V; Tmb = 25˚C - self - A
limited
ID Continuous drain current VIS = 5 V; Tmb ≤ 121˚C - 20 A
II Continuous input current -5 5 mA
IIRM Repetitive peak input current δ ≤ 0.1, tp = 300 µs -50 50 mA
PD Total power dissipation Tmb ≤ 25˚C - 90 W
Tstg Storage temperature -55 175 ˚C
Tj Continuous junction temperature2 normal operation - 150 ˚C
Tsold Case temperature during soldering - 260 ˚C
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Thermal resistance
Rth j-mb Junction to mounting base - - 1.25 1.39 K/W
Rth j-a Junction to ambient minimum footprint FR4 PCB - 50 - K/W
1 Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy.
2 A higher Tj is allowed as an overload condition but at the threshold Tj(TO) the over temperature trip operates to protect the switch.
3 All control logic and protection functions are disabled during conduction of the source drain diode.
OUTPUT CHARACTERISTICS
Limits are for -40˚C ≤ Tmb ≤ 150˚C; typicals are for Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Off-state VIS = 0 V
V(CL)DSS Drain-source clamping voltage ID = 10 mA 50 - - V
IDM = 4 A; tp ≤ 300 µs; δ ≤ 0.01 50 60 70 V
IDSS Drain source leakage current VDS = 40 V - - 100 µA
Tmb = 25˚C - 0.1 10 µA
On-state VIS ≥ 4.4 V; tp ≤ 300 µs; δ ≤ 0.01
RDS(ON) Drain-source resistance IDM = 10 A - - 52 mΩ
Tmb = 25˚C - 22 28 mΩ
OVERLOAD CHARACTERISTICS
VIS = 5 V; Tmb = 25˚C unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Short circuit load
ID Drain current limiting VDS = 13 V 28.5 43 57 A
4.4 V ≤ VIS ≤ 5.5 V; 21 - 65 A
-40˚C ≤ Tmb ≤ 150˚C
Overload protection
PD(TO) Overload power threshold device trips if PD > PD(TO) 75 185 250 W
TDSC Characteristic time which determines trip time1 200 380 600 µs
Overtemperature protection
Tj(TO) Threshold junction 150 170 - ˚C
temperature2
1 Trip time td sc varies with overload dissipation PD according to the formula td sc ≈ TDSC / ln[ PD / PD(TO)].
2 This is independent of the dV/dt of input voltage VIS.
INPUT CHARACTERISTICS
The supply for the logic and overload protection is taken from the input.
Limits are for -40˚C ≤ Tmb ≤ 150˚C; typicals are for Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VIS(TO) Input threshold voltage VDS = 5 V; ID = 1 mA 0.6 - 2.4 V
Tmb = 25˚C 1.1 1.6 2.1 V
IIS Input supply current normal operation; VIS = 5 V 100 220 400 µA
VIS = 4 V 80 195 330 µA
IISL Input supply current protection latched; VIS = 5 V 200 400 650 µA
VIS = 3 V 130 250 430 µA
VISR Protection reset voltage1 reset time tr ≥ 100 µs 1.5 2 2.9 V
tlr Latch reset time VIS1 = 5 V, VIS2 < 1 V 10 40 100 µs
V(CL)IS Input clamping voltage II = 1.5 mA 5.5 - 8.5 V
2
RIG Input series resistance Tmb = 25˚C - 33 - kΩ
to gate of power MOSFET
SWITCHING CHARACTERISTICS
Tmb = 25˚C; VDD = 13 V; resistive load RL = 4 Ω. Refer to waveform figure and test circuit.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
td on Turn-on delay time VIS = 5 V - 25 50 µs
tr Rise time - 50 100 µs
td off Turn-off delay time VIS = 0 V - 60 120 µs
tf Fall time - 50 100 µs
1 The input voltage below which the overload protection circuits will be reset.
2 Not directly measureable from device terminals.
MECHANICAL DATA
E A1
D1 mounting
base
HD
Lp
1 3
b c
e e Q
0 2.5 5 mm
scale
mm 4.50 1.40 0.85 0.64 11 1.60 10.30 2.54 2.90 15.40 2.60
4.10 1.27 0.60 0.46 1.20 9.70 2.10 14.80 2.20
98-12-14
SOT404
99-06-25
Fig.2. SOT404 surface mounting package1, centre pin connected to mounting base.
DEFINITIONS
DATA SHEET STATUS
DATA SHEET PRODUCT DEFINITIONS
STATUS1 STATUS2
Objective data Development This data sheet contains data from the objective specification for
product development. Philips Semiconductors reserves the right to
change the specification in any manner without notice
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in ordere to improve the design and supply the best possible
product
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in
order to improve the design, manufacturing and supply. Changes will
be communicated according to the Customer Product/Process
Change Notification (CPCN) procedure SNW-SQ-650A
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
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The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
1 Please consult the most recently issued datasheet before initiating or completing a design.
2 The product status of the device(s) described in this datasheet may have changed since this datasheet was published. The latest information is
available on the Internet at URL http://www.semiconductors.philips.com.