A Web-Based Little Man Computer Simulator
A Web-Based Little Man Computer Simulator
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William Yurcik
University of Illinois, Urbana-Champaign
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SIGCSE 2001 2/01 Charlotte, NC, USA
© 2001 A C M ISBN 1 - 5 8 1 1 3 - 3 2 9 - 4 / 0 1 / 0 0 0 2 . - $ 5 . 0 0 It should be observed that the LMC is a direct
implementation of a yon Neumann architecture. The
calculator corresponds to the ALU, mailboxes correspond
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to memory, the location counter corresponds to the PC, the SKIP
I/O corresponds to input/output baskets, and the Little Man 800 SKN - skip next line if calculator value is negative SKN
himself corresponds to the control unit. Both data and 801 SKZ - skip next line if calculator value is zero SKZ
instructions are stored in the mailboxes. There is no 802 SKI' - skip next line if calculator is positive SKP
distinction between data and instructions except when a
9 J U M P - goto address JMP XX
specific operation is taking place. It is important for
students to visualize the exact steps performed by the Little NOTE: XX represents a two-digit mailbox address
Man because they reflect the steps performed in a real CPU
when executing an instruction. 4 The Little Man Computer Simulator
It should also be noted that the analogy is not perfect. In a LMC was developed using Java JDK1.2 and is embedded
real computer, memory (mailboxes) is actually separated in an applet so as to provide ubiquitous access to users over
both physically and functionally from the central the Internet without the need for JDK1.2 to be installed
processing unit (CPU). In a most computers, general- locally. Another advantage of using this approach is that
purpose registers (accumulators) are available to the applet is loaded in a separate window allowing the user
temporarily hold data being processed. In LMC, the to run the application as well as look at the HTML
calculator display panel loosely serves the purpose of an documentation in other windows. To enable control o f the
aceurnulator. The path of Little Man performing tasks is LMC simulation, multiple threads were implemented: one
loosely equivalent to computer bus connections but does thread for executing the program and a second thread
not allow for data to be on different buses simultaneously listening for a user interrupt to halt the program.
(Little Man can not be in two places at once). Clock timing
and interrupts are not part of the LMC paradigm. Lastly, FIGURE II
the LMC instruction set is based on the decimal system and
TIIELrrrLEMANCOMPUTERSIMULATOR
a real CPU operates in binary. We make this numbering
system trade-off to simplify understanding of computer
architecture while rigorously covering binary/octal/
hexadecimal representations elsewhere in the course.
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at a time; and (3) Step Over, which is similar to Step Into same data is accessed as executable instructions. The LMC
except for SKIP instructions. For SKIP instructions, if the editor holds the Loader program. The application program
condition is met the program executes the next instruction and all its data are placed in the Input. Optionally, the
and then waits for user interaction. Debugging break points editor can contain both programs and the Loader could
can be set for all three execution modes. A flag register transfer the application to a different location in memory.
indicates error conditions and is set/reset for corresponding As an extension o f this, when an application finishes it
overflow/underflow conditions and zero/negative/positive transfers control back to the Loader which loads a second
values within the calculator. (or several) application(s) into memory. In addition, the
present program can occupy the same memory locations
5 Using LMC in the Classroom formerly used by the previous program. A stream o f
programs can be executed in this manner. The only
Most students taking the computer organization and limitation is the size of the Input. The Loader program
architecture course have not programmed in an assembler provides a good working example that illustrates several
language. All their coding experience is in a high level basic operating system concepts.
language (C, C++, Java, etc.). Hence, some class time
(usually one period) is spent describing and illustrating
basic assembler language programming with LMC. The 5.2 Addressing Modes
LMC equivalents of high level language instructions such Addressing modes provide a programmer with additional
as looping, IF-THEN-ELSE and I/O operations are flexibility and convenience without significantly altering
identified. Some o f the most common syntax and logic the fundamental simplicity o f LMC. The Madaick LMC
errors that occur with LMC programming are described. paradigm is limited to direct, absolute addressing but we
Following this, if a computer lab is available, it is have extended our LMC simulation to include other
worthwhile to let the students write several small programs, addressing modes. Students fred these addressing modes
which they enter and run. Several larger sample programs allow them to understand how data structures such as
are placed on a server and students copy them. The arrays and linked lists using pointers (learned in previous
students make simple modifications and additions to the algorithm courses) can be implemented. The current
programs and then try to successfully run them. Students implementation of LMC supports four types o f addressing.
quickly become familiar with providing Input, using the Here c(address) means the value stored at the location.
LMC editor to enter their code, stepping through a program
and working with the various LMC controls. AbsoluteAddressing ADD 95 e(95)+e(Ace)..->e(Aee)
IndirectAddressing ADD *95 c(X)+e(Ace).->e(Aee)
5.1 ProgrammingAssignments (a pointer) where e(95)=X
Writing a program that performs integer multiplication and ImmediateAddressing ADD #95 95+e(Aee)->e(Aee)
division illustrates how significant processing can be done RelativeAddressing ADD t95 c(c(Pc)+95)+e(Aee)--~c(Aec)
using only the basic LMC instructions. It also shows how
difficult this can be and the convenience of having actual Absolute addressing uses the LMC mailbox directly
multiplication and division instructions available. without performing any calculations or conversions with it.
Multiplication is implemented using repeated addition. To With indirect addressing the address included with the
calculate A ' B , add A to itself a total o f B times, or add B instruction identifies the actual address that the instruction
to itself A times. To improve efficiency, some students will use. The value at the instruction address is an address
preface their addition by determining the smaller input (pointer) rather than a 'data' value. With immediate
value (say A) and calculate B+B+B ... +13. Compare the addressing, the data value is stored inside the instruction
calculation o f 479*0 and 0*479. Division is performed and no additional memory location is accessed. Immediate
using repeated subtraction and both a quotient and addressing allows faster execution and can be a
remainder are calculated. considerable convenience to the programmer when
A Loader program processes 'user' programs as input. The incrementing or decrementing a counter or to clear a
Loader program reads an application program from the memory location. Immediate addressing is used in the
LMC Input and stores it in an unoccupied portion o f code on the left below and its absolute address counterpart
memory. After the Loader copies the entire program into is shown on the right.
memory, it transfers control to the initial statement in the
loaded program and it starts executing. ADD #1 ADD 90 ~- incrementby 1
SUB #1 orADD #-1 SUB 90 <- decrementby 1
This is an excellent illustration o f the yon Neumann
architecture showing that both data and executing LDA #0 LDA 91 ~ clear
instructions are stored in memory. Initially, the Loader
processes the application program as 'data'. Later, the 90 DAT 1 @ an additionalmemoryaccess
91 DAT 0 ~- requiredwithabsoluteaddressing
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Relative addressing provides additional processing power N array elements are processed with subscript values of N-
and programmer convenience. The program counter (PC) 1, N-2 . . . . 1, 0. When the subscript becomes negative, the
contains the address of the currently executing instruction. loop is terminated. A SKI' instruction (skip if value is
With relative addressing the PC functions like a base greater than or equal to zero) controls processing.
register and the address within the instruction is a Linked lists are a special type o f array where each element
displacement fTom the PC value. This allows instructions in the array consists o f two consecutive memory addresses.
to be written with a relative rather than an absolute value. The low memory address contains the data value and the
The instruction "JMP !+3" transfers control to the third second holds the address o f the next location in the linked
instruction following the current one. Coding "JMP !+0" list. A tree is a further generalization with three memory
creates an infinite loop that an interrupt will eventually end. locations, a data value and two pointers. However, the
Initial LMC programming uses absolute addresses almost small amount o f memory available with LMC limits the
exclusively. Absolute addresses are calculated and then scope o f linked list and tree processing.
recalculated as instructions are moved, added, and deleted.
Relative addressing simplifies some o f this process. By
using entirely relative and immediate addressing, 5.4 Impure Code and Pure Code
relocatable programs can be written. Wherever the Another illustration o f the von Neumarm architecture
program is loaded in memory, it works the same. R is n o t involves writing a program whose executable instructions
dependent upon accessing data at specific absolute are modified while the program runs. Such code is
locations. sometimes said to be impure or noureentrant. During
Base displacement addressing is not implemented in the execution, the program code is different than the code at
current LMC. This requires an additional register n o t the beginning o f execution. Most programs modify data,
currently included in the latest version of LMC. not their own instructions. In the impure code shown in
Figure IV every element in an array is set to zero.
FIGURE IV
5.3 Creating Data Structures "PURE" VERSUS "IMPURE"CODE
ARer writing several LMC programs, students are ready to Mailbox/Instruction/Address (A)
incorporate data structures into their program. Without 03 LDA 99 load datavalue, which is a store instruction
using data structures, most LMC programs are relatively
04 STA 05 place the store instruction in location 5
simple. The basic LMC instruction set allows both arrays
and linked lists to be created. An array is uniquely 05 DAT 000 a 0 is stored in an arrayelement
identified as a contiguous area in memory that has (a) a 06 LDA 99 the value in 99 is loaded into the accumulator
beginning location, (b) a total length or number o f elements 07 ADD # 1 the accumulatorvalue is incrementedby 1
in the array, and (c) the size o f an array element, that is 08 STA 99 the value is stored in location99
usually one memory location, but can be two or more 09 JMP 05 control transfersto location05
locations. 99 DAT 240 d~aavalue and store value in location40
FIGURE III Mailbox/Instruction/Address (B)
A LOOPIS CODEDTO LOADVALUESINTOTHE ARRAY. 04 LDA 00 load 0 in the accumulator
IN <start location> graft of array 05 STA *85 store 0 at locationcontainedin location 85
STA 99 06 LDA 85 as in code the value that servesas the array
IN <end of array> {anelement is
07 ADD #1 subscript is incrementedby I
STA 98 one memory
Inesttinn~ 08 STA 85
IN <size of clement> 09JMP 05 control transfersto location05
end of array
STA 97 85 DAT 40 data value and also location40 in memory
The impure code shown in Figure IV(A) can be modified in
After an array is created, standard processing functions can several ways to create comparable pure code. Several
be implemented, including finding the largest (smallest) techniques are possible. Figure IV(B) uses indirect
element in the array, the location where the largest addresses.
(smallest) element is stored, the sum o f the elements in the
array, whether a particular value occurs in the array and
how many times it occurs, and processing the elements at 5.5 Operating System Concepts
opposite ends o f the array. L M C also introduces fundamental Operating Systems (OS)
A standard LMC looping structure is used for most array concepts in several different ways. While Englander
processing. Prior to beginning processing an array with N discusses a "Little Man multitasking OS" or MINOS in [I],
elements, load N into the accumulator and subtract 1. The we prefer to focus only on a single-task OS since it can be
illustrated with the LMC simulator. With the major
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difference between single-tasking and multi-tasking OSs With the success of this LMC simulation of a general
being context-switching in response to interrupts, interrupts computer architecture, we have embarked on simulating
are not currently supported in our LMC simulator. more complex computer architectures modeled on real
First, students understand that the external reset for the CPUs. Specifically we want students to visualize different
LMC location counter is similar to the bootstrap process of ways of implementing the von Neumann architecture based
a real computer accessing a predetermined address in ROM on cost/speed tradeoffs. We have a prototype 8085 CPLI
to load the OS kernel. Second, students realize the LMC is simulator in beta test and a VAX11 CPU simulator under
a one-trick pony in that it only executes a single program development. See the following URL for future
and stops. A real computer would have an operating contributions: http://www.aes.ilstu.edu/faeulty/wjyureileaalel
system allocating resources between different processes
and would not stop and require rebooting after the 8 Acknowledgments
execution of each program. Third, visualizing the fetch-
execute cycle with the use of highlighted colors The following students are especially acknowledged since
demonstrates the clustering "concept of locality" upon they were instrumental in the development of this LMC
which virtual memory and caching is based. simulation: Anita Knap who programmed the fwst LMC
prototype, Rahul Gedupudi who programmed this second
Lastly, students learn to appreciate the OS fimction to version of LMC simulation as a Masters Project [3] and
maximize available memory space for applications to both continues to maintain and provide upgrades, and lastly all
load and execute. We have already discussed the use of a the students with ACS 254 classes at Illinois State
Loader program showing how an OS may relocate University during the Fall 1999/Spring 2000/Fall 2000
programs within memory under the dynamic computer semesters who learned along with us the value of active
conditions at load ttirne. We can illustrate variable memory learning using interactive simulation. We would also like
partitioning algorithms such as best-fit, f~t-fit, largest fit, to thank the anonymous reviewers whose insightful
and worst fit and then visually compare the fragmentation comments greatly improved this paper.
results. A visualization of external fi'agmentation
highlights the relationship between scheduling and memory
management - available memory limits the number and References
rate at which user processes can be scheduled for CPU [1] Englander, I., The Architecture of Hardware and
execution with the main tradeoff being blocking (no
Systems Software: An Information Technology
execution) versus delay (response time).
Approach second edition, John Wiley & Sons (2000).
[2] Cassel, L., Kumar, D. et. al. Distributed Expertise for
6 Future LMC Enhancements Teaching Computer Organization & Architecture,
One planned significant enhancement is index ITiCSE 2000 Working Group Report [to appear in the
register/displacement addressing. This will provide an ACM SIGCSE Bulletin], (July 2000).
important addressing method. It requires an index register. [3] Gedupudi, R., Simulation of Little Man Computer,
Including one or more General Purpose Registers is also Masters Degree Project Documentation, Department of
being considered. Register-to-Register addressing could be Applied Computer Science, Illinois State University,
used with many of the instructions. Another enhancement (February 29, 2000).
is to take an individual instruction and decompose the steps [4] Yehezkel, C., Yurcik, W., and Pearson, M. Teaching
(microcode) that comprise its fetch/execute cycle. This Computer Architecture with a Computer-Aided
will require at least three additional registers: Memory Learning Environment: State-of-the-Art Simulators,
Address Register (MAR), Memory Data Register (MDR), Proceedings of the 2001 International ConJbrence on
and Instruction Register (If). Depending on the addressing
Simulation and Multimedia in Engineering Education
mode used, the Fetch/Execute cycle will change.
(ICSEE), Society for Computer Simulation (SCS)
Press, (January 2001).
7 Summary [5] Yurcik, W., Vila J., and Brnrnhaugh L., An Interactive
We have presented a web-based simulation of a general Web-Based Simulation of a General Computer
computer architecture based on the LMC paradigm of Architecture, Proceedings of IEEE International
Stuart Madnick/Irv Englander and showed how LMC can Conference on Engineering and Computer Education,
be used as the central tool for Computer Architecture and (August 2000).
Assembly Language Education (CAALE). We feel that
the use of interactive simulation is a powerful tool to
enable CAALE active learning and report our teaching
techniques here with the hope that others will use LMC and
provide us feedback.
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