THE MICROPROCESSOR

TODAY
Michael Slater

MicroDesign Resources F rom their humble beginnings 25 years

ago, microprocessors have proliferat-
ed into an astounding range of chips,
powering devices ranging from telephones
to supercomputers. Today, microprocessors
communication tasks in multimedia PCs.
Although the desktop computer market
tends to discard old processors in just a few
years, many processors survive for an amaz-
ingly long time in the embedded market.
for personal computers get widespread Personal computers have moved from 8- to
attention—and have enabled Intel to 16-bit and now to 32-bit processors, and
become the world’s largest semiconductor many workstations and servers are already
maker. In addition, embedded micro- using 64-bit microprocessors. In the embed-
processors are at the heart of a diverse range ded market, however, even 4-bit micro-
of devices that have become staples of con- processors continue to sell well, and 8-bit
sumers worldwide. devices lead in volume.
Microprocessors have become specialized Figure 1 shows the changes in market
in many ways. Those for desktop computers share for 32- and 64-bit microprocessors over
fall into classes based on their instruction set the past five years. Driven by the success of
architectures: either x86, the primary sur- the PC, the x86 architecture has dominated.
viving complex instruction set computing Motorola’s 68000 has held a strong second-
(CISC) architecture, or one of the five major place position in units (though not in dollars),
reduced instruction set computing (RISC) with the embedded market as its stronghold.
architectures—PA-RISC, Mips, Sparc, Alpha, Hitachi’s SuperH has come from nowhere to
and PowerPC. Such chips typically integrate take third place, while other architectures
few functions other than cache memory and have much more modest positions. As the
bus interfaces with the processor but usual- dramatic changes during this period show,
ly include a floating-point unit and memory market share can be quite turbulent among
management unit. these second-tier embedded processors.
Embedded microprocessors, on the other There are far more microprocessors avail-
hand, typically do not have floating-point or able for sale today than it would be possible
memory management units but often inte- to describe, even briefly, in an article such as
grate various peripheral functions with the this. The current market includes more than 50
processor to reduce system cost. This makes surviving instruction set architectures, hun-
them more application specific, leading to a dreds of different implementations, and thou-
Microprocessor massive proliferation of devices character- sands of minor variations. Rather than
ized not only by their processor’s instruction attempting to be comprehensive, I will focus
Report’s publisher set and core CPU performance but also by on a selection of the leading-edge micro-
their on-chip peripherals. processors and issues in each market segment.
outlines technology Digital signal processors (DSPs) are the
most specialized embedded microprocessors. Dividing up the market
and business issues in Designed for real-time processing of digitized Microprocessors for personal computers
analog signals, these processors have unique get the most public attention because the
today’s instruction sets and other architectural features performance and compatibility of PCs
that give them high performance for a rela- depend on the microprocessors at their
microprocessor tively narrow range of tasks. Recently, a new cores. In recent years, PC microprocessors
class of DSPs, called media processors, has have become so high profile that a bug of
industry. emerged to handle audio, video, graphics, and minor significance in Intel’s Pentium proces-

32 IEEE Micro 0272-1732/96/$5.00 © 1996 IEEE

sor captured headlines in the mainstream press for months. 70
x86 PowerPC
Microprocessor commercials even appear on prime-time tele- 680x0 ARM
vision. Embedded applications, on the other hand, have a 60 SuperH 29K
fixed complement of software, so the microprocessor inside i960 Sparc
is of relatively little interest to the consumer. Mips Alpha
PC microprocessors are also a major profit area in the micro- 50

Units shipped (millions)

processor business. PCs are the only application so far that
uses expensive microprocessors—typically costing $75 to
40
$500—in volumes of tens of millions per year. Embedded appli-
cations use far more processors—literally billions per year—but
most of them are very low cost devices, selling for under $5, 30
with thin profit margins. Some embedded applications use
processors in the same price range as PCs, but they are very
low volume—often only thousands of units per year. Today, 20
even among 32-bit embedded processors, more than 60 chips
sell for less than $40 and some for less than $10.
10
Microprocessors for PCs generate far more profit than
embedded processors for two reasons. First, because the PC
is the most expensive device to use a microprocessor in high
volume, PC makers can afford more expensive processors. 0
When coupled with large amounts of DRAM, disk drives, 1991 1992 1993 1994 1995
and CRT displays that cost hundreds of dollars each, even a Year
relatively expensive microprocessor does not dominate sys-
tem cost. Second, the overwhelming importance of software Figure 1. Unit shipments of leading 32- and 64-bit archi-
compatibility in the PC market has enabled Intel to achieve tectures.
tremendous control over the PC microprocessor market. With
no close competitors, Intel can enforce much higher profit
margins than makers of embedded microprocessors, which designed for workstations. Because they are built in much
must compete in a field where instruction set compatibility lower volumes than PC microprocessors, their amortized
commands less value. design cost per unit is much greater. Such processors have
Unix workstations constitute the high-performance segment survived primarily because they enable system businesses
of the desktop computer market. (I use the term desktop com- that produce far more revenue (and profit) than would the
puter as a shorthand for a single-user, general-purpose com- sale of a comparable number of microprocessors. This eco-
puter; in this context, it includes deskside and portable systems nomic reality has led to large workstation makers designing
as well as true desktops, workstations as well as PCs, and even nearly all of today’s workstation-specific microprocessors,
many servers.) The workstation market has some of the same with chip companies playing little more than a foundry role.
attributes as the PC market, in that application software com- As microprocessors for PCs have increased in speed, they
patibility with previous-generation systems is of great impor- have reached a performance level that makes them suitable
tance. There are two big differences, however. First, the total for much of the workstation market. This factor, combined
Unix workstation market, in units, is less than 1% of the PC with the emergence of Microsoft’s Windows NT as a viable
market, and second, performance is more important than alternative to Unix as a workstation operating system, is lead-
price. As a result, microprocessors for workstations are typi- ing to a convergence of the technology for PCs with that for
cally designed with performance as a higher priority than workstations. Ultimately, this convergence will threaten the
price. survival of some of the workstation processor architectures.
This digression into business issues is necessary for any com-
prehensive discussion of the microprocessor industry, because The battle for the desktop
these issues have a pervasive effect on microprocessor design Two operating systems account for the vast majority of desk-
and manufacturing. Companies such as Intel and Motorola top computer use today: Microsoft Windows (in its various ver-
fund leading-edge manufacturing plants for logic devices with sions) and Macintosh. IBM’s OS/2 is in third place, and Unix
the high profits they make (or hope to make) supplying micro- is a distant fourth. Windows’ popularity has given Intel’s x86
processors for desktop computers. In contrast, makers of architecture a preeminent position, while the Macintosh has
embedded processors generally get by with lower cost manu- established PowerPC as the only RISC architecture with a sig-
facturing processes and depreciated fabrication plants. The nificant share of the desktop market. Even so, the Mac’s share
divergent characters of the embedded and PC microprocessor is modest—around 8%—and shows no signs of increasing.
markets also drives the evolution of instruction set architec- Nearly every maker of RISC microprocessors has dreamed
tures: New architectures find relatively easy entry into the of capturing part of the x86 architecture’s high-volume mar-
embedded market, while desktop processor makers go to great ket. The first to try was Sun, which hoped to repeat the PC
lengths to stick with dominant architectures. industry phenomenon by making its Sparc-based worksta-
Economics have had a huge effect on microprocessors tions, running Sun’s version of Unix, an openly licensed stan-

December 1996 33
 Current status

Table 1. Originators and licensees for Digital plans to begin moving down into high-end PCs, setting
leading desktop architectures. the stage for an eventual attack on the mainstream PC market.
It is a long shot for Alpha to capture a significant mainstream
Architecture Originator Licensees role, but at least it can’t be counted out yet.
It is in this light that PowerPC’s position in the Windows NT
Alpha Digital Semiconductor Mitsubishi, Samsung market appears so weak. PowerPC processors are not nearly
Mips Mips Technologies IDT, NEC, Toshiba as fast as the Alpha chips and don’t offer a significant perfor-
PA-RISC Hewlett-Packard Hitachi, Samsung mance advantage over Intel processors, leaving them between
PowerPC Apple, IBM, Motorola Groupe Bull, Exponential a rock and a hard place. Customers looking for safety and com-
Sparc Sun Microelectronics Fujitsu (includes HaL, patibility choose Intel; those seeking maximum performance
ICL, and Ross) on a small set of applications are drawn to Alpha. This leaves
few for whom PowerPC would be a compelling choice.
The staying power of the PowerPC backers is the archi-
dard. This effort failed miserably for at least two reasons. tecture’s key strength. If a future generation of chips is much
First, Unix was, and is, unsuitable for a mass-market oper- stronger than today’s, the architecture could end up head to
ating system because of its complexity, its resource require- head with Alpha in an attempt to capture the number two
ments, and its lack of personal productivity applications. position in the Windows NT market.
Second, Sun was never willing to let Sun-compatible system This leaves Hewlett-Packard’s PA-RISC as the only RISC
makers operate unrestrained, for fear of the effect that might architecture whose owner never attempted to use it in an
have on Sun’s own hardware business. attack on Intel’s market share. This may have been an excel-
Next up was Mips, then an independent company (Mips lent decision, considering the fate of companies that have
Computer Systems). Microsoft chose Mips as the first RISC tried. HP is now engaged with Intel in a joint development
architecture that the emerging high-end version of Windows, project that will lead to a new architecture around 1998. The
Windows NT, would support. Mips engineered the ACE ini- architecture, called IA-64 and to be first implemented in a
tiative, and at one point had both Digital Equipment chip code-named Merced, will provide backward compati-
Corporation and Compaq planning to build Mips-based sys- bility with both x86 and PA-RISC programs. Having built a
tems to run Windows NT. But the timing was bad; Compaq large computer business around its architecture, HP has
fell on hard times as lower cost PC clones eroded its business, found no compelling reason to spend billions of dollars on
and Digital decided to create its own architecture and aban- fabrication facilities and chip designs to provide processors
don Mips. for these systems. Thus, it has joined future paths with Intel.
Mips made its own contribution to the failure of ACE by Table 1 shows the companies backing each of the archi-
trying to collect large license fees for reference system tectures for general-purpose computers. (Not shown are
designs. Silicon Graphics (SGI) soon thereafter swallowed licensed implementations; for example, Cyrix has licensed
Mips Computer Systems, which became SGI’s Mips its x86 processor designs to IBM Microelectronics and SGS-
Technologies subsidiary. SGI has shown no interest in either Thomson.) Although there has been a mad rush to sign up
Windows NT or the high-volume desktop market, and licensees, it has turned out to be relatively insignificant; the
Microsoft is dropping Mips support in Windows NT. owners and primary backers of each architecture determine
Then came PowerPC, backed by IBM, Motorola, and its fate.
Apple. Apple has successfully converted the Macintosh line
to PowerPC, giving PowerPC the biggest desktop market of Pentium dominates computing today
any RISC processor. Because Apple and the Macintosh plat- Intel’s Pentium processor series dominates today’s desk-
form itself are struggling to maintain their modest position, top computer market. Depending on clock speed, this chip
however, this doesn’t represent much of a growth opportu- spans a price range (in quantities of 1,000) from about $75
nity. Efforts to go beyond Macintosh on the mainstream desk- to just over $500, putting it at the appropriate price points for
top have largely failed: IBM’s OS/2 for PowerPC was most PCs. Although early Pentium processors provided little
stillborn, Taligent folded its tent, and PowerPC’s position in advantage over 486 chips, Intel’s aggressive promotion of
the Windows NT market is weak. Pentium and rapid increase in the chip’s clock speed enabled
The most recent architecture to aim at the desktop market it to sweep the desktop market by the end of 1995 and the
is Alpha, Digital’s home-brewed replacement for the Mips notebook market in the first half of 1996.
architecture. Digital wholeheartedly embraced Windows NT Following a familiar pattern in the microprocessor indus-
and has the benefit of owning its own systems business, try—but at an accelerated pace—Intel has twice moved
including a PC business. But Windows NT is only now Pentium to a new process technology. The initial chips, code-
approaching the maturity that will enable it to become a named P5, were built in 0.8-micron BiCMOS and ran at 60
mainstream operating system; and DRAM prices are only and 66 MHz. These chips were power hungry, and Intel
now becoming low enough to render Windows NT’s addi- phased them out before Pentium began its move into the
tional memory requirement insignificant. mainstream PC market. The next version, the P54C, shrank
Until now, Digital has used Alpha’s outstanding perfor- the design to 0.6-micron BiCMOS and enabled clock rates
mance to sell very fast systems at premium prices—a nice of 75 to 120 MHz. This version also cut the supply voltage
niche business, but hardly a factor in the PC market. Next year, to 3.3 V and added dynamic power management circuitry.

34 IEEE Micro
This feature shuts down portions of
the chip not in use on a cycle-by- Instr. TLB
(32 entries) 8-Kbyte instruction cache
cycle basis, slashing typical power
consumption. Then Intel shrank the
design once again to 0.35-micron 128 64
Branch 1 micro-op
BiCMOS, enabling clock speeds up Simple decoder
to 166 MHz. A minor revision of this target Reorder
buffer 1 micro-op
design pushes the clock speed to 200 Simple decoder buffer
MHz—more than three times that of 4 micro-ops (40 entries)
General decoder
the original Pentium.
Instruction
To keep system design relatively fetch unit In-order RAT RRF
section Micro-op sequencer
easy, however, Intel has held the sys-
32
tem bus speed at 60 or 66 MHz.
Because of this, there is a huge gap
between increasing core CPU speeds Reservation station
(20 entries)
and the bandwidth of the external
bus, which provides access to the
level-two cache as well as to main Store Load
memory. This reduces the benefit of Store Integer FP Integer
addr addr
data ALU unit unit
faster core speeds; the 200-MHz unit unit
Pentium has a typical performance
gain of less than 10% over the 166-
MHz chip. Power consumption has Memory reorder
buffer (MOB) Out-of-order
also crept up to uncomfortable lev- execution engine
els as the clock speed has increased, 1 load 1 load
Load data 32
keeping the 166-MHz and faster
chips out of portable systems. Data TLB
(64 entries) 8-Kbyte dual-ported data cache
Intel will mitigate these problems
early next year with a new version of 64
Pentium, code-named the P55C and
implemented in 0.28-micron CMOS. System bus interface Level-two cache interface
By doubling the size of the on-chip
cache, Intel estimates that the miss rate
will decrease 20 to 40% on typical 36 Address 64 Data 64 Data
Windows applications, mitigating the
performance loss from the relatively
slow external bus. The P55C will also Figure 2. Pentium Pro microprocessor block diagram. TLB: translation look-aside
include pipeline enhancements to buffer.
boost its per-clock performance, as
well as the MMX instruction set exten-
sions for multimedia (described later). Intel’s most recent microprocessor design, Pentium Pro
The P55C will mark Intel’s shift away from the BiCMOS (P6), takes a far more aggressive approach to deliver more
process technology of earlier Pentiums. The 0.28-micron performance per clock cycle while also enabling higher clock
(drawn gate size) process enables Intel to reduce the supply speeds. Figure 2 shows the processor’s block diagram.
voltage from 3.3 to 2.8 V, which significantly reduces power The Pentium Pro design completely decouples instruction
consumption. At this low voltage, however, bipolar transis- dispatch and execution, translating x86 instructions into inter-
tors offer little benefit, making the extra process steps of nal micro-operations, not unlike traditional microcode
BiCMOS unjustified. The supply voltage reduction will make instructions. These micro-ops then pass to a 40-entry reorder
higher clock rates practical for portable systems and will sim- buffer, where they are stored until any required operands
plify cooling in desktop systems. are available. From there, they are issued to a 20-entry reser-
vation station, which queues them until the needed execu-
Intel’s new frontier: Pentium Pro tion unit is free. This design allows micro-ops to execute out
The Pentium design uses a simple, restrictive approach to of order, making it easier to keep parallel execution resources
superscalar operation. Its two pipelines do not operate entire- busy. At the same time, the fixed-length micro-ops are eas-
ly independently; when one stalls, the other must stop as ier to handle in the speculative, out-of-order core than com-
well, so no out-of-order execution is allowed. Furthermore, plex, variable-length x86 instructions.
the floating-point unit is not autonomous but relies on the To enable high clock speeds, Pentium Pro is very deeply
integer pipelines, so integer and floating-point instructions pipelined (also called superpipelined). Because the reser-
cannot execute in parallel. vation station represents an elastic element, the pipeline does

December 1996 35
 Current status

not have a fixed number of stages, PA-8200/

14 220
13
but the minimum number of clock
2116/ 500
R10000/ US2 cycles for an instruction to complete
12 275 350
433 is 12. Cache access and instruction
11 Klamath/
PA-8000/
400 US2/300 Klamath/233 266
decoding are each split across two
10 180 PPro/200
21164/ US2/250 and one-half clock cycles.
SPECint95_base (log scale)

512K 620/233
9 333 To push Pentium Pro performance
PPro/200 620/200
8 as high as possible, Intel designed a
R10000/ Ultra/ 604/225 604e/200 special level-two cache chip that is
7 200 200 mounted in the same package with
PPro/150
6
the CPU chip. The connections
Ultra/167 604/180 between the CPU and the cache chip
604/150 Alpha are point to point and don’t leave the
5 PowerPC
package, which enables Intel to use
R4400/250 Sparc
Mips nonstandard voltage levels and
4 PA-RISC achieve high data rates. The level-two
Intel cache chip, which Intel makes in both
256- and 512-Kbyte versions, delivers
3
64 bits per clock cycle, even with CPU
clock speeds up to 200 MHz.
SS2/85 This cache strategy was effective in
bringing Pentium Pro to market with
3Q95 4Q95 1Q96 2Q96 3Q96 4Q96 1Q97 2Q97 performance numbers that sent shock
Date of first system shipments waves through the planning depart-
ments of most RISC microprocessors
makers. As Figure 3 shows, at its
Figure 3. SPECint95 (base) performance versus time for x86 and RISC architectures. introduction Pentium Pro exceeded
Numbers following processor names are clock speeds in MHz. the SPECint95 performance of all
shipping RISC microprocessors. This
position didn’t last long, however, as
Intel has gone more than a year without either increasing clock
20
speed or introducing a new microarchitecture. Each of Intel’s
18 RISC competitors has done one or both. As Figure 4 shows,
Pentium Pro is even further behind the RISCs when it comes
SPECint95 (base) to floating-point performance.
16
SPECfp95 (base)
In the long run, however, Intel doesn’t want to devote half
14 its fab capacity to relatively low-margin SRAMs; it has been
working with SRAM makers to provide industry-standard
Log scale

12 memory chips for future versions of the P6. In particular, Intel

has disclosed plans for the P6 series’ second member, code-
10 named Klamath, which will use external SRAMs running at
half the processor’s clock speed for the level-two cache and
8
will implement the MMX instruction set extensions. Intel
intends Klamath, due in the first half of 1997, to be the P6
6
chip that drives that architecture into mainstream systems.
4
Going after Intel directly
2 RISC microprocessor makers have tried to take some of
Intel’s market share by leveraging their superior instruction
0 sets to produce faster and less expensive processors. This
UltraSparc-200

R10000-200

PPC604e-225

PentiumPro-200

PA-8000-180

21164-500

has proven a very difficult game, however, due primarily to

the enormous software barriers that new architectures in the
desktop market face.
Other companies have challenged Intel on its own turf,
building microprocessors that run the same software as Intel’s
chips. Today, the primary players are Advanced Micro
Devices (AMD) and Cyrix Corporation, along with Cyrix
Figure 4. SPEC (base) microprocessor performance for licensees IBM Microelectronics and SGS-Thomson. Texas
high-end microprocessors shipping today. Instruments also serves the low end of the market with 486

36 IEEE Micro
 Table 2. Key features of selected x86 microprocessors.

Intel AMD Cyrix

Pentium Pentium Pentium Pentium Pentium 6x86
Feature P54C P54CS P55C Pro P6 Pro P6S Klamath K5 K6 M1 M2

Maximum clock 120 200 200 150 200 233-266† 100 >180 150 225
rate (MHz)
Pinout P54C P54C P54C PPro PPro Klamath P54C P55C P54C P55C
Cache (data/ 8/8 8/8 16/16 8/8 8/8 N.A. 8/16 32/32 16/16 64 (unified)
instr., Kbytes)
MMX No No Yes No No Yes No Yes No Yes
Decode rate 2 2 2 3 3 3 1-4 2 2 2
(instr./clock cycle)
Issue rate per 2 2 2 5 5 5 4 4 2 2
clock cycle instr.* instr. instr. micro-ops micro-ops micro-ops micro-ops micro-ops instr. instr.
Out-of-order No No No Yes Yes Yes Yes Yes Limited Limited
execution
Die size (mm2) 148 90 140 308 196 N.A.** 181 ~180 167 <200
Transistors (millions) 3.3 3.3 4.5 5.5 5.5 N.A. 4.0 8.8 3.3 6.0
Process 0.5/4 0.35/4 0.28/4 0.5/4 0.35/4 0.28/4 0.35/3 0.35/5 0.44/5 0.35/5
(µm/layers) BiCMOS BiCMOS CMOS BiCMOS BiCMOS CMOS CMOS CMOS CMOS CMOS
Mfg. cost† $50 $40 $60 $180†† $145†† N.A. $70 $85 $70 $95
Production Now Now 1Q97 Now Now 1H97 Now 1H97 Now 1H97
List price*** $106-134 $204-509 N.A. $534 $428-1,035 N.A. $60-134 N.A. $98-299 N.A

* Indicates x86 instructions † MicroDesign Resources estimates

** Not available †† Includes 256-Kbyte level-two cache
*** As of 4Q96, quantities of 1,000

microprocessors. Table 2 summarizes the key features of more complex design and a 30% greater transistor count.
today’s most important x86 microprocessors. As of October 1996, AMD had been unable to make the
AMD has a long history as an alternative supplier of x86 chip run faster than 100 MHz, while Intel was shipping
microprocessors. The company was a licensed alternate Pentiums at up to 200 MHz. This failing relegated AMD to the
source of Intel’s 8086 and 286 microprocessors, but the tech- low end of the PC microprocessor business, leaving little
nology exchange agreement between the two companies profit for a chip as large as the K5 (see Table 2). At the same
broke down into a bitter and drawn-out arbitration. As a time, the 486 market had largely dried up, and what
result, Intel never transferred its 386 or later technology to remained was priced in the $20-30 range, leaving AMD no
AMD. Instead, AMD entered the 386 and 486 markets by significant older products to fall back on.
reverse-engineering Intel’s chips. This involved extracting AMD recently released an improved version of the K5
the circuit designs, making minor modifications (such as for design that eliminates bottlenecks and reaches the original-
static rather than dynamic operation), and producing new ly targeted performance levels. At 100 MHz, it delivers per-
physical layouts tuned for AMD’s process technology. formance equivalent to a 133-MHz Pentium, moving AMD
This path proved successful in that it enabled AMD to con- into the midrange Pentium market.
tinue supplying microprocessors to the PC industry. AMD’s big opportunity, however, depends on the K6—a
However, it offered AMD little opportunity for differentia- design that started life as the NexGen 686, which AMD
tion and no chance of catching up with Intel’s performance bought NexGen to obtain. Like the Pentium Pro and K5, the
level. AMD couldn’t even begin its reverse-engineering and K6 uses a decoupled decode/execute design in which x86
reimplementation process until Intel shipped a product. instructions are first decoded into internal, RISC-like opera-
AMD therefore decided to create an entirely independent tions. AMD also is adding the MMX instruction set exten-
design, taking from the Intel chips only the instruction set (for sions. As the K5 design has shown, though, the devil is in the
software compatibility) and the bus interface and pinout (for details: A design’s effectiveness depends on a multitude of
system interface compatibility). After several delays, the K5 subtle design issues, any one of which can become a per-
reached the market, but without delivering the anticipated formance-limiting bottleneck. On paper, the K6 looks good,
performance level. The chip was supposed to deliver perfor- but until AMD ships its first K6 samples, due by the end of
mance 30% higher than an Intel Pentium processor at the same 1996, how well it performs will remain an unknown.
clock rate. Instead, it barely matched Intel’s per-clock perfor- Unlike AMD, Cyrix designed its own x86 cores from the
mance on Windows application benchmarks, despite a much start. The company started with a low-end 486-class core,

December 1996 37
 Current status

Table 3. Key features of selected high-performance microprocessors. (Source: Vendors except where noted)

Digital PowerPC PowerPC Sun Micro HP HP Mips Mips Pentium

Feature 21164 620 604e UltraSparc Sparc-2 PA-8000 PA-7300LC R10000 R5000 Pro

Clock rate (MHz) 500 200 225 250 110 180 160* 200 180 200
Cache size (Kbytes) 8/8/96 32/32 32/32 16/16 16/8 None 64/64 32/32 32/32 8/8
Issue rate 4 4 4 4 2 4 2 4 2 3
(instr./cycle)
Pipeline stages 7 5 6 6/9 5 7-9 5 5-7 5 12-14
Out-of-order 6 loads 16 instr. 16 instr. None None 56 instr. None 32 instr. None 40 ROPs
execution
Rename registers None 8 int/ 12 int/ None None 56 total None 32int/ None 40 total
8 FP 8 FP 32FP
Memory bandwidth ~400 1,200 ~180 1,300 ~100 768 213 539 ~160 528
(Mbytes/s)
Package, pins CPGA- CBGA- CBGA- PBGA- CPGA- LGA- CPGA- CPGA- SBGA- MCM-
499 625 255 521 321 1,085 464 527 272 387
Process (µm/layers) 0.35/4 0.35/4 0.35/4 0.29/5 0.4/3 0.5/4 0.5/4 0.35/4 0.35/3 0.35/4
Die size (mm2) 209 240* 148 149 233 345 259 298 84 196
Transistors (millions) 9.3 6.9 5.1 3.8 2.3 3.9 9.2 5.9 3.6 5.5
Estimated $150 $210 $60 $90 $80 $290 $95 $160 $25 $175**
mfg. cost*
Maximum 25 30 20* 30 9 >40 15 30 10 35**
power (W)
SPEC95 baseline 12.6/18.3 9.0/9.0* 8.5/7.0 8.5/15 1.4/1.9 10.8/18.3 5.5/7.3 8.9/17.2 4.0/3.7 8.7/6.0
performance
(integer/FP)
Availability Now 1H97 Now Now Now Now Now Now Now Now
List price (1,000) N.A. N.A. $594 $1,995 $379 N.A. N.A. $3,000 $365 $1,035

* MicroDesign Resources estimate ** Includes 512-Kbyte level-two cache

which it leveraged into a range of products from the 386SX- is all but guaranteed the lion’s share of the market, but AMD
pin-compatible 486SLC to a 486DX2. Cyrix abandoned these and Cyrix have the opportunity to gain a minority share big
products at the end of 1995, however, as it began the switch enough to be quite significant for them—if they execute well.
to its Pentium-class core, code-named the M1 and officially By the end of 1997, however, there may be other com-
called the 6x86. This chip delivers impressive performance petitors to contend with. Texas Instruments has a long-pend-
per clock cycle: At 133 MHz, for example, it outperforms a ing effort to develop its own x86 CPU core; at least four
166-MHz Pentium on common Windows application bench- start-ups in the United States are working on x86 micro-
marks. Rather than using the complex decoupled processors; and semiconductor makers in Korea and Japan
decode/execute approach of Pentium Pro and the K5, the are probably considering similar efforts as well.
6x86 extends Pentium’s relatively straightforward dual-
pipeline approach with additional features that enable both The pursuit of speed
pipelines to run concurrently more often. In the never-ending pursuit of maximum performance,
If Cyrix had access to Intel’s leading-edge process tech- microprocessor makers have followed a variety of strategies.
nology, its chips might match Intel’s Pentium clock rates. But In each case, designers must make countless judgment
as things stand, Cyrix uses 0.44-micron CMOS technology to calls—generally backed by simulations—on myriad design
compete against Intel’s 0.35-micron chips. That Cyrix can options, hoping to make the best use of transistor budgets.
beat Intel’s Pentium performance even with this handicap is Table 3 summarizes the key characteristics of today’s high-
a testament to the efficiency of its design. est performance microprocessors.
Like AMD, Cyrix will move to a next-generation design in Perhaps the most fundamental trade-off is between doing
early 1997 that will be key to its future success. Code-named lots of work in each clock cycle—which tends to generate
the M2, this chip is based on the 6x86 core but adds a much complex designs with limited clock rates—or streamlining
larger 64-Kbyte cache and other performance enhancements, the design as much as possible in pursuit of maximum clock
as well as the MMX instruction set extensions. speed. Sun’s SuperSparc is a notable example of a chip that
In 1997, makers of leading-edge PCs will be able to use pushed complexity too far, giving up too much in clock rate
Intel’s P55C or P6-series chips, AMD’s K6, or Cyrix’s M2. Intel to justify the per-clock efficiency. Sun remedied this in its

38 IEEE Micro
next design, UltraSparc.
Digital has been the most suc- Branch Instruction
Instruction
history TLB
cessful proponent of the maximum cache (8 Kbytes)
(2K×2) (48 entries) System
clock speed approach. The company bus
plans to ship 500-MHz processors 128 IFC 128
this year, while most other vendors’ Instruction
chips will be at 200 to 250 MHz. buffers
External
Digital’s Alpha 21164 does deliver PC Dispatch logic cache
the industry’s best performance, but unit control
not by as big a margin as the high Decoded Instructions
128
clock speed would indicate. As part
of the speed/complexity trade-off, it Dual Floating- Floating-
integer point add/ point
has among the industry’s worst per- divide multiply
formance per clock cycle. Figure 5 units
shows a block diagram of the 21164. 64
Virtual address

Cache strategy is another area Level-

where many approaches are possi- Two-port two
Dual-ported cache
ble. Here again, Digital stands out data TLB data cache (8 Kbytes) (96
from the pack, with the only micro- (48 entries)
Kbytes)
processor with a two-level cache on
chip. Separate 8-Kbyte first-level Merge Level-two
logic cache control
instruction and data caches enable
single-cycle access even at high
clock rates. A slower 96-Kbyte sec-
ond-level cache provides faster Figure 5. Block diagram of Digital’s Alpha 21164 microprocessor.
access than could an external cache.
Typical 21164 system designs have
an external level-three cache.
Intel’s Pentium Pro has the small- 21164
est on-chip caches of any high-per- PA-7300LC
formance processor: a mere 8 Kbytes PowerPC 620
each for instructions and data. This is R10000
because the custom-designed level- Pentium Pro
two cache chip (described earlier) is PA-8000
mounted in the same package as the UltraSparc Logic
PowerPC 604e Other
processor and can deliver near on-
R5000
chip speeds. Most other high-perfor-
MicroSparc-2
mance processors have on-chip 0 2 4 6 8 10
level-one caches of either 16 or 32
No. of transistors (millions)
Kbytes each for instructions and data.
HP’s 7300LC has the largest caches, at
64 Kbytes each. Figure 6. Allocation of transistors in high-end microprocessors.
All of today’s high-performance
microprocessors are superscalar;
most issue four instructions per clock cycle. One exception out-of-order support, allowing reordering of load operations
is Intel’s Pentium Pro. Its x86 instruction set encodes more only. Sun likewise avoided the complexity of out-of-order
functions into each instruction, so it reaches comparable per- operation. Others allow from 16 to 56 instructions to exe-
formance levels (on integer code) decoding only three cute out of order.
instructions per clock cycle. Pentium Pro must deal with the Other microarchitectural features for which designers have
additional complexity of the x86’s variable-length instruc- chosen different strategies include the size of translation
tions, which make parallel decoding considerably more chal- look-aside buffers, the complexity of the branch prediction
lenging. It also has an additional block of logic to convert algorithm, and the size of the branch history table. As for
complex x86 instructions into multiple internal instructions. external interfaces, 64- or 128-bit-wide data buses are uni-
RISC architectures make no such distinction between exter- versal, and the fastest devices tend to provide a dedicated bus
nal and internal instructions. connected to an external level-two cache.
Most high-performance microprocessors support some Figure 6 shows how today’s leading high-performance
degree of out-of-order execution to keep the entire machine microprocessors allocate transistors. Digital’s 21164, with
from stalling when one instruction stalls. Digital’s 21164 nearly 10 million transistors, is the biggest chip overall, but
designers, in pursuit of high clock speed, provided minimal Pentium Pro, with its more complex instruction set, has more

December 1996 39
 Current status

than twice as many logic transistors. The figure shows that silicon area can deliver much greater performance on signal-
high-end processors today typically have CPU cores with 2 processing applications than could an equal area in an extend-
to 4 million transistors devoted to logic. The number of tran- ed general-purpose architecture.
sistors devoted to memory ranges from less than 1 million to DSP chips are not new; indeed, they are at the heart of
more than 6 million. most modems, cellular phones, disk drives, and countless
other devices. They have had little success in PCs, howev-
Extending instruction sets for multimedia er, because they aren’t well optimized for the PC environ-
Although the gulf in instruction set design style between ment. However, several companies are now making media
the x86 and RISC camps remains, they do agree on one point: processors carefully designed for PCs. These chips typical-
Modest extensions to the instruction set can significantly ly have PCI bus interfaces, integrated codecs or codec inter-
improve multimedia performance. A small increase in die faces, and graphics engines that provide compatibility with
area delivers a significant boost in performance for functions legacy PC display controller standards (such as VGA). Most
such as MPEG encoding and decoding, audio synthesis, importantly, makers of these PC media processors also pro-
image processing, and modems. vide driver software that enables applications to commu-
At the heart of most vendors’ multimedia extensions are nicate with the chips via Microsoft’s DirectX application
single-instruction, multiple-data (SIMD) operations. By tak- programming interfaces (APIs). Thus, programmers need
ing a 64-bit ALU and allowing the carry chain to be broken not customize application programs for each hardware
at various points, essentially the same amount of logic can design.
perform two 32-bit operations, four 16-bit operations, or Today, a start-up company called Chromatic Research
eight 8-bit operations, all in parallel. One complication is (Sunnyvale, Calif.) is the closest to shipping such a media
that multiple carry bits are not available. Fortunately, how- processor. Like many pioneering microprocessor companies
ever, most signal-processing operations benefit from satu- of recent times, Chromatic Research is fabless. LG Semicon
ration arithmetic. Instead of rolling over and setting the carry and Toshiba manufacture and sell the chips, while Chromatic
bit, saturation arithmetic sets the result at the minimum or sells the software that makes them work. Chromatic’s Mpact
maximum value. Most multimedia extensions add satura- media processor can perform not only 2D and 3D graphics
tion arithmetic as an option. Other common additions are rendering but also MPEG-1 and MPEG-2 decompression,
instructions for multiply-add and data element packing and MPEG-1 compression, teleconferencing, 33-Kbps fax/
unpacking. modem, and audio synthesis. Philips has its own media
HP was the first to add such extensions to its RISC archi- processor, TriMedia; Samsung, Mitsubishi, IBM, and others
tecture, but HP’s instructions are quite simple. Sun offers the have media processors in the works.
most comprehensive set of extensions in its VIS (Visual Whether these media processors have a long-term role in
Instruction Set), implemented in UltraSparc. Sun’s extensions PCs remains a subject of controversy. From Intel’s perspec-
include some relatively complex instructions, such as pixel tive, there is room for only one programmable processor in
distance, in addition to the simpler SIMD operations. a system. In this view, functions that require hardware accel-
The most widely discussed, though not yet shipped, set eration—such as 3D rendering—are best performed by fixed-
of extensions is Intel’s MMX, which will appear next year in function accelerators. In time, as the PC’s central processor
the P55C and Klamath processors. Both AMD and Cyrix will becomes faster, less opportunity will remain for media
offer MMX-compatible extensions next year as well. Intel processors. In the near term, though, there appears to be a
estimates that the performance of MMX-enhanced code will clear opportunity for such processors to boost PC capabili-
be from 1.4 times better for MPEG video decoding to more ties for a modest incremental cost.
than 4 times better for still-image processing (such as Adobe
Photoshop filtering). Of course, most programs won’t ben- Embedded processors enable digital
efit at all, and compilers don’t use MMX—programmers must consumer electronics
handcraft the code to realize the benefits. Embedded microprocessors rarely bask in public attention
The Mips and Alpha camps recently announced their own or earn huge profits, but manufacturers produce them in enor-
multimedia extensions, leaving PowerPC as the only popu- mous volume and in great diversity. Because software com-
lar architecture not to follow suit. This is ironic, since patibility is not as driving a force as in the desktop market,
PowerPC’s primary user—Apple—focuses on multimedia, the embedded market allows more architectures to survive.
and one of the PowerPC’s predecessors—Motorola’s ill-fated Early embedded microprocessor applications were control
88110—had a set of graphics instruction set extensions. oriented: Traffic-light and elevator controllers are the classic
examples. As microprocessor performance increased, the range
Media processors enter the fray of tasks that processors can handle broadened. The vast major-
General-purpose microprocessors can improve their han- ity of embedded applications don’t demand any more perfor-
dling of multimedia data types through instruction set exten- mance than low-cost 8-bit—or even 4-bit—processors offer.
sions, but there are compelling reasons to use a separate Figure 7 shows that, as a result, the bulk of the volume remains
processor for these tasks. DSP-like architectures provide mul- with these older devices, which continue to evolve by adding
tiple operand data paths, very-long-instruction-word-like more on-chip peripherals and memory. Ancient 4-bit proces-
arrangements, and other special features that make them fast sors have remained surprisingly popular, but new designs
but often hard to program. With these characteristics, a given rarely use them because low-end 8-bit devices have dropped

40 IEEE Micro
to very low prices and are easier to program. Even so, 4-bit 1,800
chips—long considered obsolete by most observers—are only 4-bit
now beginning to fade away and will continue shipping more 1,600 8-bit
than a billion units per year through the end of the decade. 16-bit
Some automotive engine controllers, as well as disk and 1,400 32-bit
network cards for PCs, use 16-bit embedded processors.
(Note that Figure 7 defines 16-bit processors by their exter-

Units shipped (millions)

1,200
nal bus width, so it includes in this category many chips with
32-bit internal designs.) Many of these applications are mov-
1,000
ing to the 32-bit level as application demands increase and
32-bit processor prices drop. In the long run, 8-bit embed-
ded processors will continue to serve the most cost-sensi- 800
tive applications, while most others gravitate toward 32-bit
processors, leaving little room for other sizes. 600
The most exciting application area for embedded proces-
sors is digital consumer electronics. Digital control came to 400
hi-fi equipment years ago, replacing knobs and dials with
push buttons and displays. Video cassette recorders gave the
200
microprocessor more sophisticated control functions, but
poor user interfaces left most users unwilling to invest the
time to learn the new functions. Digital answering machines 0
and compact disc players put the microprocessor in the sig- 1994 1995 1996 1997 1998 1999
nal path, marking the beginning of the end of tape for audio Year
storage. Later this year, DVD technology will move video
into the digital domain as well. Figure 7. Embedded microprocessor and microcontroller
Video games—which are actually limited-function com- shipments by word size. (Source: The Information
puters—are the highest volume non-PC applications for 32- Architects, Mountain View, Calif., 1996)
bit processors today. Sega’s success with its Saturn and
Genesis video games, which use Hitachi’s SH series proces-
sors, has catapulted this relatively recent RISC processor to content with virtually no investment by the device makers.
the third highest volume 32-bit architecture, behind only the While a large-screen PDA might make a great Web access
venerable x86 and 68000. Sony’s PlayStation uses a 32-bit device, it won’t be cost-effective until there are major
Mips processor, and one video game—the Nintendo 64— price/performance advances in color flat-panel displays. In
uses a 64-bit Mips processor. the near term, many companies are building Web terminals
Electronic organizers and personal digital assistants (PDAs) that connect to televisions for display. WebTV is one com-
are promising application categories for 32-bit embedded pany leading the pack in this arena. Its device, built by
processors. Figure 8 (next page) shows one example of a licensees, uses a Mips R4000-derivative processor created by
processor designed for such applications. Today’s organiz- design-house-turned-fabless-chip-maker Quantum Effect
ers are truly embedded applications; little or no third-party Design (Santa Clara, Calif.). The Web is becoming a central
software is available for them. PDAs such as Apple’s Newton, information resource that could eliminate printed phone
on the other hand, are new computing platforms and do books and newspaper classified ads; provide customer ser-
depend on third-party software. So far, the success of orga- vice and order-processing links to businesses of all kinds;
nizers has been limited to low-cost, limited-function devices, and eventually become a primary delivery mechanism for
while more-capable PDAs have been successful only in ver- news and entertainment. As this happens, Web access
tical markets. As the technology develops, however, hand- devices could become a major new class of embedded
held computing devices could become an even bigger microprocessor applications.
industry (in units) than personal computers. Microsoft’s new Advocates of PCs have reacted to Web terminals, not sur-
Windows CE will give this application category a big boost. prisingly, with scorn and derision. After all, they represent a
potentially major threat to future PC market growth. If the
Internet opens new opportunities Web achieves its potential, however, the reality is that easy-
The Internet—in particular the World Wide Web—is cre- to-use, minimum-cost devices that focus on Web access will
ating new classes of consumer computing devices. In fact, it be successful.
could make PDAs far more compelling, once devices with This trend is significant for microprocessor makers, because
larger, more readable screens are available. The Web makes it breaks the application-software stranglehold the x86 archi-
vast amounts of information available, significantly increas- tecture has had on the PC market. A Web browser can run on
ing the value of a computing device to the average consumer. nearly any architecture. Even applications loaded over the
Early PDA makers hoped to build their own networks and Web can be processor independent if they are written in Java.
services to offer information such as city guides and restau- The Internet, which has already created major markets for
rant reviews; the Web will do a far better job of providing this 32-bit embedded processors in routers and other network

December 1996 41
 Current status

18.432 MHz
phase- D0-D31
3.6864 MHz
locked loop ARM 710a
State RUN
ARM7 control RESET,
32.786 kHz 32.768 KHz microprocessor WAKEUP
oscillator core
ROM/expansion
CS 0-7
control
EINt1-3, FIQ Interrupt ready
MEDCHG controller 8-Kbyte
cache DRAM
BATOK, EXTPWR Power controller RAS 0-3
PWRFL, BATCHG management CAS 0-3
Memory
Ports A, B, C, D (8 bit) management
GPIO Multiplexer
Port E (4 bit) unit Address/
data
Keyboard column PSU
drives (0-7) dc to dc control
Counters
(2) DRAM
LCD drive
CLK, SYNC Synchronous controller
IN, OUT, SMPCK serial I/O

RTC IrDA LED and

CLK, SYNC Codec photodiode
IN, OUT interface UART
RS-232 interface

Figure 8. Block diagram of Cirrus Logic’s CL-PS7110 integrated processor with ARM7 core.

infrastructure elements, could be a significant enabler of reduces the cost of power supplies and eliminates the need
broader competition in the microprocessor business. for a fan.
These changes in the embedded market have led to major
Embedded processors proliferate shifts in market share. As Figure 1 shows, Hitachi’s SH series
Table 4 summarizes the key features of a few of the more has come from nowhere to lead 32-bit RISC processor ship-
than one hundred 32- and 64-bit embedded processors now ments on the strength of Sega’s video games and other con-
available. As application demands and the competitive envi- sumer applications. Meanwhile, Intel’s more traditional 960
ronment have changed, architectures have evolved. Digital’s series, once the industry leader, has stagnated. AMD has
StrongARM is a stunningly fast derivative of the power-miser- entirely stopped future development of its 29000 family, once
ly but not especially fast ARM architecture. Hitachi’s new the 960’s top competitor.
SuperH series has a wide range of devices, of which the table
lists only one. Similarly, Motorola and IBM are each pro- Customization for embedded applications
ducing numerous PowerPC variations for embedded control As transistor counts in chips selling for under $100 (and
applications. eventually under $30) skyrocket to millions—and soon to
Motorola is the champion of embedded processor prolif- tens of millions—processors for PCs will continue to use
erations, with uncounted 68000 variations. Now it has even most of these transistors to increase performance. For most
modified the base instruction set architecture to produce the embedded applications, however, the demands for ever-
RISC-like ColdFire subset. NEC, along with IDT and LSI Logic, higher performance just aren’t there. Instead, embedded-
is pushing the Mips architecture into embedded applications; application designers would like to reduce system costs by
Table 4 shows only one of many options. Intel continues to integrating more functions on the same chip with the micro-
develop its 960 series, which is successful in some markets processor. The logical end point of this evolution is a com-
but shows little sign of progress in the expanding market for plete system on a chip. Technology is reaching a point where
low-cost 32-bit processors. (The PC market is a formidable chips can integrate even significant amounts of memory. For
distraction for Intel.) example, eliminating half the DRAM array from a 64-Mbit
As high-performance embedded processors move into DRAM still leaves 4 Mbytes of memory and room for mil-
consumer electronics, low power consumption becomes as lions of logic transistors.
important as low price. In portable applications, the value of As embedded microprocessors evolve toward systems on
low power is obvious: longer battery life or smaller, lighter a chip, they inevitably become more specialized. Different
batteries. Even in nonportable consumer applications, how- applications have different needs for memory, peripheral con-
ever, low power consumption is important, because it trollers, and interfaces to the external world. The desire for

42 IEEE Micro
 Table 4. Key features of selected embedded microprocessors. (Source: Vendors except where noted)

Digital VLSI NEC Hitachi IBM PPC Motorola Motorola Motorola Intel Intel
Feature SA-110 ARM710 R4300 SH7604 403GA 860DC 68EC040 CF5102 960JA 960HT

Architecture ARM StrongARM Mips SuperH PowerPC PowerPC 68000 ColdFire i960 i960
Clock rate (MHz) 200 40 133 20 33 40 40 25 33 60
Instr./data cache 16/16 8/8 16/8 4/4 2/1 4/4 4/4 2/1 2/1 16/8
size (Kbytes)
FPU No No Yes No No No Yes No No No
MMU Yes Yes Yes No No Yes Yes No No No
Bus frequency (MHz) 66 40 66 20 33 40 40 25 33 20
MIPS† 230 36 160* 20 41 52 44 27 28 100*
Voltage 2.0/3.3** 5 3.3 3.3 3.3 3.3 5 3.3 3.3 3.3
Power (typical, mW) 900 424 2,200 200 265 900 4,500 900 500 4,500
MIPS/watt 239 85 73 100 155 58 10 30 56 22
MIPS/price 4.30 1.04 5.00 0.24 1.05 0.51 0.59 N.A. 0.76 0.79
Transistors (millions) 2.1 0.6 1.7 0.45 0.58 1.8 1.2 N.A. 0.75 2.3
Process (µm/layers) 0.35/3 0.6/2 0.35/3 0.8/2 0.5/3 0.5/3 0.65/3 0.6/3 0.8/3 0.6/4
Die size (mm2) 50 34 45 82 39 25 163 N.A. 64 100
Estimated mfg. cost* $18 $9 $11 $7 $14 $20 $30 $9 $8 $34
Availability Now Now Now Now Now Now Now Now Now Now
List price (10,000s) $49 $28 $32 $27 $28 $102 $75 $25 $37 $126

* MicroDesign Resources estimate ** Core/bus voltage † MIPS rating as supplied by vendor, based on Dhrystone 2.1

highly integrated system chips is Table 5. Originators and licensees of RISC processors
increasing the demand for building- for embedded applications.
block microprocessors that can func-
tion as parts of application-specific Architecture Originator Licensees
integrated circuits (ASICs). Many of
the leading microprocessor vendors ARM ARM Ltd. Asahi Kasei Microsystems (AKM), Alcatel, Atmel,
are not major ASIC suppliers, how- Cirrus Logic, Digital, GEC Plessey, LG Semicon,
ever, nor are they set up to customize NEC, Oki, Samsung, Sharp, Symbios Logic,
chips for every customer. Indeed, Texas Instruments, VLSI Technology, Yamaha
eliminating the need to do so was a ColdFire Motorola Mitsubishi
key benefit of the microprocessor in Mips Mips Technologies Integrated Device Technology, LSI Logic, NEC,
the first place. NKK, Philips, QED, Sony, Toshiba
LSI Logic is one company that has PowerPC IBM Microelectronics Mitsubishi
pioneered the design of ASICs with SuperH Hitachi VLSI Technology
microprocessor cores. Many other Sparc Sun Microelectronics C-Cube, Fujitsu, Hyundai, Matra MHS, Scientific
companies, including Texas Instru- Atlanta, TGI
ments, IBM Microelectronics, VLSI
Technology, and NEC, are also
aggressively developing this technology. Not only must these Table 5 shows CPU architectures that companies have
companies have a range of microprocessor cores available, licensed to chip and equipment makers for embedded appli-
but they must provide a variety of other complex building cations. Motorola continues to keep most of its cores pro-
blocks, such as MPEG decoders and graphics engines, as prietary and is gradually allowing more and more customer
well as the software tools to design, debug, verify, and test involvement in the design process.
the chips. In the future embedded-processor market, these Packaging is another key area that needs improvement. As
factors may be more important than the processor cores designers put more functions on a chip, the chips need more
themselves. input/output pins. Today’s common plastic quad flat packs
In this world of core-based ASICs, some microprocessor offer a cost per pin around 2 cents, but can’t provide pin counts
cores are becoming near commodities. Advanced RISC much beyond 200. High-pin-count pin grid arrays typically
Machines (ARM) in the UK has licensed its core designs wide- have costs around 10 cents per pin—leading to a $50 package
ly, and many companies offer ARM cores as part of their ASIC for a 500-pin device. New packaging technologies, such as
libraries. Mips has also licensed its cores widely, though not plastic ball grid arrays and various chip-scale packages, promise
as widely as ARM, and Sparc cores have a few licensees. high-pin-count packages with costs approaching a penny per

December 1996 43
 Current status

Web resources on microprocessors

Independent sites Fujitsu: www.fujitsu.com

Hitex Software’s numerical chip directory: Hewlett-Packard (PA-RISC): www.hp.com/wsg/strategies/
www.hitex.com/chipdir strategy.html
IEEE Micro: www.computer.org/pubs/micro/micro.htm Hitachi: www.hitachi.com
John Bayko’s “Great Microprocessors of the Past and IBM Microelectronics: www.chips.ibm.com
Present”: www.cs.uregina.ca:80/~bayko/cpu.html Integrated Device Technology: www.idt.com
Ken Polsson’s Timeline of Microcomputers: www. Intel: www.intel.com
islandnet.com/~kpolsson/comphist.htm LSI Logic: www.lsilogic.com
MicroDesign Resources: www.chipanalyst.com Microchip: www.microchip.com
SPEC benchmark results: www.specbench.org Mips: www.mips.com
The Actual Size Processor Page: Motorola: www.mot.com/SPS/General
www.gulf.net/~stone/processor National Semiconductor: www.nsc.com
UC Berkeley CPU Info Center: NEC: www.nec.com
infopad.eecs.berkeley.edu/CIC Oki: www.oki.com
Philips: www.semiconductors.philips.com
Microprocessor manufacturers QED: www.qedinc.com
AMD: www.amd.com Ross Technology: www.ross.com
ARM: www.arm.com Siemens Semiconductor: www.sci.siemens.com
Cyrix: www.cyrix.com Texas Instruments: www.ti.com
Chromatic Research: www.chromatic.com VLSI Technology: www.vlsi.com
Digital: www.digital.com Zilog: www.zilog.com

pin in the next few years. If this comes to pass, it would be a the leader of the team; Jim Turley, who tracks embedded
significant enabling technology for highly integrated, low-cost microprocessors and their applications; and Yong Yao, Peter
chips. Sometimes the silicon seems like the easy part! Glaskowsky, and Steve Hammond, who track a range of PC
hardware technologies.

WHERE NEXT? After 25 years of development, advance-

ments in microprocessor technology show no signs of slow-
ing down. The pace of new architecture introductions has Michael Slater is the founder and edito-
slowed, especially in the desktop market, but new imple- rial director of MicroDesign Resources
mentations are coming out at record rates. Rapidly increas- and publisher of Microprocessor Report,
ing transistor counts and clock speeds are challenging an industry newsletter. He also organizes
designers to innovate continually to deliver the most value the Microprocessor Forum and PC Tech
from the technology. And as the Web has so vividly demon- Forum conferences and consults for lead-
strated, major new applications may be just around the cor- ing microprocessor and computer com-
ner—but are extraordinarily difficult to forecast. panies on new product strategies. A well-known speaker on
PCs are becoming potent communication and entertain- microprocessor technology and system trends, Slater is also
ment devices and are moving into homes in a big way. At the a columnist for Electronic Engineering Times, Nikkei
same time, many new consumer electronics devices—from Electronics Asia, and Computer Shopper.
Web terminals to DVD players—are becoming available. It
is hard to predict just which devices will succeed. But it is a
sure bet that ever-advancing microprocessor technology will Direct questions concerning this article to Michael Slater,
be crucial to the products enabling the much-discussed con- MicroDesign Resources, 874 Gravenstein Hwy. S., Suite 14,
vergence of computing, communication, and entertainment. Sebastopol, CA 95472; mslater@mdr.zd.com.
This ensures the microprocessor’s role at the heart of the
electronics industry for the next 25 years or longer.

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Acknowledgments Indicate your interest in this article by circling the appropriate
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combined efforts of the MicroDesign Resources analyst team.
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44 IEEE Micro