TPS61200
TPS61200
TPS61200
DESCRIPTION
The TPS6120x devices provide a power supply solution for products powered by either a single-cell, two-cell, or
three-cell alkaline, NiCd or NiMH, or one-cell Li-Ion or Li-polymer battery. It is also used in fuel cell or solar cell
powered devices where the capability of handling low input voltages is essential. Possible output currents are
depending on the input to output voltage ratio. The devices provides output currents up to 600 mA at a 5-V
output while using a single-cell Li-Ion or Li-Polymer battery, and discharge it down to 2.5 V. The boost converter
is based on a fixed frequency, pulse-width-modulation (PWM) controller using synchronous rectification to obtain
maximum efficiency. At low load currents, the converter enters the Power Save mode to maintain a high
efficiency over a wide load current range. The Power Save mode can be disabled, forcing the converter to
operate at a fixed switching frequency. The maximum average input current is limited to a value of 1500 mA.
The output voltage can be programmed by an external resistor divider, or is fixed internally on the chip. The
converter can be disabled to minimize battery drain. During shutdown, the load is completely disconnected from
the battery. The device is packaged in a 10-pin QFN PowerPAD™ package (DRC) measuring 3 mm x 3 mm.
L1
2.2 mH
VIN L
C1
VIN VOUT
0.3 V to 5.5 V 10 mF
EN C2
VAUX R1 VOUT
PS C3 1.8 V to 5.5 V
10 mF
UVLO 0.1 mF
FB
R2
GND PGND
TPS61200
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Copyright © 2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS61200
TPS61201
TPS61202 www.ti.com
SLVS577 – MARCH 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1) Contact the factory to check availability of other fixed output voltage versions.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(3) The DRC package is available taped and reeled. Add R suffix to device type (e.g., TPS61200DRCR) to order quantities of 3000 devices
per reel. It is also available in minireels. Add a T suffix to the device type (i.e. TPS61200DRCT) to order quantities of 250 devices per
reel.
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) ESD testing is performed according to the respective JESD22 JEDEC standard.
ELECTRICAL CHARACTERISTICS
over recommended free-air temperature range and over recommended input voltage range (typical at an ambient
temperature range of 25°C) (unless otherwise noted)
DC/DC STAGE
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VI Input voltage range 0.3 5.5 V
VI Minimum input voltage at startup 0.5 V
VO TPS61200 output voltage range 1.8 5.5 V
VFB TPS61200 feedback voltage 495 500 505 mV
VOUT TPS61201 output voltage VIN < VOUT, PS = 1 3.27 3.3 3.33 V
VOUT TPS61202 output voltage VIN < VOUT, PS = 1 4.95 5.0 5.05 V
f Oscillator frequency 1250 1650 kHz
ISW average switch current limit VOUT = 3.3 V 1200 1350 1500 mA
Rectifying switch on resistance VOUT = 3.3 V 180 mΩ
Main switch on resistance VOUT = 3.3 V 150 mΩ
Line regulation VIN < VOUT, PS = 1 0.1% 0.5%
Load regulation VIN < VOUT, PS = 1 0.1% 0.5%
VIN 1 2 µA
IO = 0 mA, VEN = VIN = 1.2 V,
Quiescent current VOUT VOUT = 3.3 V, VAUX = 3.3 V 50 70 µA
PS = 0
VAUX 4 6 µA
VIN 0.5 1.5 µA
Shutdown current VEN = 0 V, VIN = 1.2 V
VAUX 1 2 µA
Leakage current into L VEN = 0 V, VIN = 1.2 V, VL = 1.2 V 0.01 1 µA
CONTROL STAGE
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VAUX Auxiliary Output Voltage 2.4 5.5 V
VIL EN input low voltage VIN < 0.8 V 0.1 × VIN V
VIH EN input high voltage VIN < 0.8 V 0.9 × VIN V
VIL EN input low voltage 0.8 V ≤ VIN≤ 1.5 V 0.2 × VIN V
VIH EN input high voltage 0.8 V ≤ VIN≤ 1.5 V 0.8 × VIN V
VIL EN input low voltage VIN > 1.5 V 0.4 V
VIH EN input high voltage VIN > 1.5 V 1.2 V
VIL PS input low voltage 0.4 V
VIH PS input high voltage 1.2 V
EN, PS input current Clamped on GND or VIN (VIN < 1.5 V) 0.01 0.1 µA
VUVLO Undervoltage lockout threshold for VUVLO decreasing 235 250 265 mV
turn off
VUVLO Undervoltage lockout threshold for VUVLO increasing 330 350 370 mV
turn on
UVLO input current VUVLO = 0.5 V 0.3 µA
Overvoltage protection threshold 5.5 7 V
Overtemperature protection 140 °C
Overtemperature hysteresis 20 °C
PIN ASSIGNMENTS
DRC PACKAGE
(TOP VIEW)
VAUX FB
VOUT GND
L PS
PGND UVLO
VIN EN
Terminal Functions
TERMINAL
I/O DESCRIPTION
NAME NO.
EN 6 I Enable input (1: enabled, 0: disabled).
FB 10 I Voltage feedback of adjustable versions, must be connected to VOUT at fixed output voltage versions
GND 9 Control / logic ground
PS 8 I Enable/disable Power Save mode (1 : disabled, 0: enabled)
L 3 I Connection for Inductor
UVLO 7 I Undervoltage lockout comparator input, must be connected to VAUX if not used
PGND 4 Power ground
VIN 5 I Boost converter input voltage
VOUT 2 O Boost converter output
VAUX 1 O/I Supply voltage for control stage
PowerPAD™ Must be soldered to achieve appropriate power dissipation. Should be connected to PGND.
VOUT
VCC
VAUX Control VOUT
Current
Sensor
PGND
VIN Gate
VCC Control
Modulator FB
VREF
PS
Oscillator
EN Device
Control
UVLO
Temperature PGND
Control
GND PGND
VIN
VIN L
C1 VOUT
VOUT
EN
VAUX R1 C2
PS C3
UVLO
FB
R2
GND PGND
TPS61200
List of Components:
COMPONENT REFERENCE PART NUMBER MANUFACTURER VALUE
C1 any 10 µF, X7R Ceramic
C2 any 2 x 10 µF, X7R Ceramic
L1 LPS3015-222ML Coilcraft 2.2 µH
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Maximum output current vs Input voltage 1
vs Output current (TPS61200), Power Save Enabled 2
vs Output current (TPS61200), Power Save Disabled 3
vs Output current (TPS61201), Power Save Enabled 4
vs Output current (TPS61201), Power Save Disabled 5
vs Output current (TPS61202), Power Save Enabled 6
Efficiency
vs Output current (TPS61202), Power Save Disabled 7
vs Input voltage (TPS61201), Power Save Enabled 8
vs Input voltage (TPS61201), Power Save Disabled 9
vs Input voltage (TPS61202), Power Save Enabled 10
vs Input voltage (TPS61202), Power Save Disabled 11
vs Output current (TPS61201) 12
Output voltage
vs Output current (TPS61202) 13
Output Voltage TPS61201, Power Save Mode Disabled 14
Output Voltage TPS61202, Power Save Mode Disabled 15
Output Voltage TPS61201, Power Save Mode Enabled 16
Output Voltage TPS61202, Power Save Mode Enabled 17
TPS61201 Load Transient Response 18
Waveforms
TPS61202 Load Transient Response 19
TPS61201 Line Transient Response 20
TPS61202 Line Transient Response 21
TPS61201 Startup after Enable 22
TPS61202 Startup after Enable 23
VO = 1.8 V
1400 70 VI = 1.8 V
TPS61201,
Efficiency - %
1200 VO = 3.3 V 60
1000 50
TPS61202, VI = 0.9 V
800 VO = 5 V 40
600 30
400 20
200 10
0 0
0.2 0.6 1 1.4 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 0.10 1 10 100 1k 10 k
VI - Input Voltage - V IO - Output Current - mA
Figure 1. Figure 2.
EFFICIENCY EFFICIENCY
vs vs
OUTPUT CURRENT OUTPUT CURRENT
100 100
TPS61200 TPS61201 VI = 2.4 V
VO = 1.8 V, VI = 1.8 V 90 VO = 3.3 V,
90
Power Save Disabled Power Save Enabled
80 80
70 70
VI = 1.8 V
Efficiency - %
Efficiency - %
60 60
50 50
VI = 0.9 V
40 VI = 0.9 V 40
30 30
20 20
10 10
0 0
0.10 1 10 100 1k 10 k 0.10 1 10 100 1k 10 k
IO - Output Current - mA IO - Output Current - mA
Figure 3. Figure 4.
EFFICIENCY EFFICIENCY
vs vs
OUTPUT CURRENT OUTPUT CURRENT
100 100
TPS61201 VI = 2.4 V VI = 3.6 V
90 VO = 3.3 V, 90 VI = 2.4 V
Power Save Disabled
80 80
70 70
VI = 1.8 V
Efficiency - %
Efficiency - %
60 60
VI = 1.8 V
50 50
VI = 0.9 V
40 VI = 0.9 V 40
30 30
20 20
TPS61202
10 10 VO = 5 V,
Power Save Disabled
0 0
0.10 1 10 100 1k 10 k 0.10 1 10 100 1k 10 k
IO - Output Current - mA IO - Output Current - mA
Figure 5. Figure 6.
EFFICIENCY EFFICIENCY
vs vs
OUTPUT CURRENT INPUT VOLTAGE
100 100
VI = 2.4 V VI = 3.6 V IO = 500 mA IO = 1000 mA
90 90
IO = 100 mA
80 80
70 70
Efficiency - %
Efficiency - %
60 VI = 1.8 V 60
50 50
VI = 0.9 V IO = 10 mA
40 40
30 30
20 20
TPS61202 TPS61201
VO = 5 V, VO = 3.3 V,
10 10
Power Save Enabled Power Save Enabled
0 0
0.10 1 10 100 1k 10 k 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
IO - Output Current - mA VI - Input Voltage - V
Figure 7. Figure 8.
EFFICIENCY EFFICIENCY
vs vs
INPUT VOLTAGE INPUT VOLTAGE
100 100
IO = 500 mA IO = 1000 mA IO = 500 mA
90 90
IO = 100 mA
80 80
IO = 1000 mA
70 70
Efficiency - %
Efficiency - %
60 60
50 IO = 100 mA 50
IO = 10 mA
40 40
IO = 10 mA
30 30
20 20
TPS61201 TPS61202
VO = 3.3 V, 10 VO = 5 V,
10
Power Save Disabled Power Save Enabled
0 0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VI - Input Voltage - V VI - Input Voltage - V
80
IO = 1000 mA
70
VO - Output Voltage - V
Efficiency - %
IO = 100 mA
60
50 3.30
IO = 10 mA
40
30
20
TPS61202 TPS61201
VO = 5 V, VO = 3.3 V,
10
Power Save Disabled Power Save Disabled
0 3.27
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 1 10 100 1000
VI - Input Voltage - V IO - Output Current - mA
OUTPUT VOLTAGE
vs
OUTPUT CURRENT OUTPUT VOLTAGE, POWER SAVE MODE DISABLED
5.05
TPS61202 TPS61201 VI = 1.8 V, RL = 11W
VO = 5 V, VO = 3.3 V,
Power Save Disabled
Output Voltage
VI = 2.4 V
VO - Output Voltage - V
5
Inductor Current
100 mA/div, AC
4.95
1 10 100 100 t - Time - 0.5 ms/div
IO - Output Current - mA
OUTPUT VOLTAGE, POWER SAVE MODE DISABLED OUTPUT VOLTAGE IN POWER SAVE MODE
TPS61202 VI = 1.8 V, RL = 17W VI = 1.8 V, RL = 33 kW
VO = 5 V,
Output Voltage
Output Voltage
50 mV/div, AC
20 mV/div, AC
Inductor Current
Inductor Current
200 mA/div, AC
100 mA/div, AC
TPS61201
VO = 3.3 V,
Power Save Enabled
Output Current
50 mA/div
500 mV/div, AC
Input Voltage
Output Current
Output Voltage
50 mV/div, AC
100 mA/div
TPS61201
VO = 3.3 V
VI = 3 V to 3.6 V, RL = 17W
Enable 5 V/div, DC
500 mV/div, AC
Input Voltage
Voltage at L 2 V/div, DC
Enable 5 V/div, DC
Voltage at VAUX 2 V/div, DC
Voltage at L 2 V/div, DC
Figure 23.
DETAILED DESCRIPTION
CONTROLLER CIRCUIT
The controlling circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. The controller also
uses input and output voltage feedforward. Changes of input and output voltage are monitored and can
immediately change the duty cycle in the modulator to achieve a fast response to those errors. The voltage error
amplifier gets its feedback input from the FB pin. For adjustable output voltages, a resistive voltage divider must
be connected to that pin. For fixed output voltages, FB must be connected to the output voltage to directly sense
the voltage. Fixed output voltage versions use a trimmed internal resistive divider. The feedback voltage is
compared with the internal reference voltage to generate a stable and accurate output voltage.
The controller circuit also senses the average input current as well as the peak input current. Thus, the
maximum input power is controlled as well as the maximum peak current to achieve a safe and stable operation
under all possible conditions. To protect the device from overheating, an internal temperature sensor is
implemented.
Synchronous Operation
The device uses three internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power
range.
To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND and
PGND are used. The reference for all control functions is the GND pin. The power switches are connected to
PGND. Both grounds must be connected on the PCB at only one point ideally close to the GND pin. Due to the
3-switch topology, the load is always disconnected from the input during shutdown of the converter.
Down Regulation
A boost converter only regulates output voltages which are higher than the input voltage. This device operates
differently. For example, it is able to regulate 3 V at the output with two fresh alkaline cells at the input having a
total cell voltage of 3.2 V. Another example is powering white LEDs with a forward voltage of 3.6 V from a fully
charged Li-Ion cell with an output voltage of 4.2 V. To control these applications properly, a Down Conversion
mode is implemented.
If the input voltage reaches or exceeds the output voltage, the converter automatically changes to a Down
Conversion mode. In this mode, the control circuit changes the behavior of the two rectifying switches. While
continuing switching it sets the voltage drop across the rectifying switches as high as needed to regulate the
output voltage. This means the power losses in the converter increase. This must be taken into account for
thermal consideration.
Undervoltage Lockout
An undervoltage lockout function prevents the main output at VOUT from being supplied if the voltage at UVLO
drops below 0.25 V. When using a resistive divider at the voltage to be monitored, for example the supply
voltage, any threshold for the monitored voltage can be programmed. If in undervoltage lockout mode, the
device still maintains its supply voltage at VAUX, but it is not turned off until EN is programmed low. This
undervoltage lockout function is implemented in order to prevent the malfunctioning of the converter.
Overtemperature Protection
The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature
exceeds the programmed threshold (see electrical characteristics table), the device stops operating. As soon as
the IC temperature has decreased below the programmed threshold, it starts operating again. There is a built-in
hysteresis to avoid unstable operation at IC temperatures at the overtemperature threshold.
APPLICATION INFORMATION
DESIGN PROCEDURE
The TPS6120x DC/DC converters are intended for systems powered by a single up to triple cell Alkaline, NiCd,
NiMH battery with a typical terminal voltage between 0.7 V and 5.5 V. They can also be used in systems
powered by one-cell Li-Ion or Li-Polymer with a typical voltage between 2.5 V and 4.2 V. Additionally, any other
voltage source like solar cells or fuel cells with a typical output voltage between 0.3 V and 5.5 V can power
systems where the TPS6120x is used.
Within the TPS6120X family, there are fixed and adjustable output voltage versions available. To properly
configure the fixed output voltage devices, the FB pin is used to sense the output voltage. This means that it
must be connected directly to VOUT. At the adjustable output voltage versions, an external resistor divider is
used to adjust the output voltage. The resistor divider must be connected between VOUT, FB and GND. When
the output voltage is regulated properly, the typical value of the voltage at the FB pin is 500 mV. The maximum
recommended value for the output voltage is 5.5 V. The current through the resistive divider should be about
100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01 µA, and the voltage
across the resistor between FB and GND, R2, is typically 500 mV. Based on those two values, the
recommended value for R2 should be lower than 500 kΩ, in order to set the divider current at 1 µA or higher. It
is recommended to keep the value for this resistor in the range of 200 kΩ. The value of the resistor connected
between VOUT and FB, R1, depending on the needed output voltage (VOUT), can be calculated using
Equation 1:
æV ö
R1 = R2 x ç OUT - 1÷
è VFB ø (1)
If as an example, an output voltage of 3.3 V is needed, a 1-MΩ resistor should be chosen for R1 when for R2 a
180-kΩ has been selected.
L1
VIN
VIN L
C1 VOUT
VOUT
R3 EN
VAUX R1 C2
PS C3
UVLO
FB
R4
R2
GND PGND
TPS61200
Figure 24. Typical Application Circuit for Adjustable Output Voltage Option
æV ö
R3 = R4 x çç INMIN - 1÷÷
è VUVLO ø (2)
Inductor Selection
To make sure that the TPS6120X devices can operate, an inductor must be connected between pin VIN and pin
L. To estimate the minimum inductance value Equation 3 can be used.
ms
LMIN = VIN x 0.5
A (3)
In this equation, f is the minimum switching frequency. In Equation 3, the minimum inductance, LMIN, for boost
mode operation is calculated. VIN is the maximum input voltage. The recommended inductor value range is
between 1.5 µH and 4.7 µH. The minimum inductor value should not be below 1.5 µH, even if Equation 3 yields
in something lower. Using 2.2 µH is recommended anyway for getting best performance over the whole input
and output voltage range.
With the chosen inductance value, the peak current for the inductor in steady state operation can be calculated.
Equation 4 shows how to calculate the peak current I.
V x IOUT VIN x (VOUT - VIN )
ILMAX = OUT +
0.8 x VIN 2 x VOUT x f x L (4)
This would be the critical value for the current rating for selecting the inductor. It also needs to be taken into
account that load transients and error conditions may cause higher inductor currents. The following inductor
series from different suppliers have been used with TPS6120x converters:
Capacitor Selection
Input Capacitor
At least a 4.7 µF input capacitor is recommended to improve transient behavior of the regulator and EMI
behavior of the total power supply circuit. A ceramic capacitor placed as close as possible to the VIN and PGND
pins of the IC is recommended.
Output Capacitor
For the output capacitor, it is recommended to use small ceramic capacitors placed as close as possible to the
VOUT and PGND pins of the IC. If, for any reason, the application requires the use of large capacitors which
can not be placed close to the IC, using a smaller ceramic capacitor in parallel to the large one is recommended.
This small capacitor should be placed as close as possible to the VOUT and PGND pins of the IC.
To get an estimate of the recommended minimum output capacitance, Equation 5 can be used.
mF
COUT = 5 x L x
mH (5)
A capacitor with a value in the range of the calculated minimum should be used. This is required to maintain
control loop stability. There are no additional requirements regarding minimum ESR. There is also no upper limit
for the output capacitance value. Larger capacitors cause lower output voltage ripple as well as lower output
voltage drop during load transients.
Capacitor at VAUX
Between the VAUX pin and GND a capacitor must be connected. This capacitor is used to maintain and filter the
control supply voltage. It is charged during startup and before the main output VOUT is turned on. To ensure
stable operation, using at least 0.1µF is recommended. At output voltages below 2.5 V, the capacitance should
be in the range of 1 µF. Since this capacitor is also used as a snubber capacitor for the main switch, using a
ceramic capacitor with low ESR is important.
Layout Considerations
As for all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input and output capacitor, as well as the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the
control ground, it is recommended to use short traces as well, separated from the power ground traces. This
avoids ground shift problems, which can occur due to superimposition of power ground current and control
ground current.
THERMAL INFORMATION
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the
power-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below.
• Improving the power dissipation capability of the PCB design
• Improving the thermal coupling of the component to the PCB
• Introducing airflow in the system
The maximum recommended junction temperature (TJ) of the TPS6120x devices is 125°C. The thermal
resistance of the 10-pin QFN 3 × 3 package (DRC) is RθJA = 48.7 °C/W, if the PowerPAD is soldered. Specified
regulator operation is assured to a maximum ambient temperature TA of 85°C. Therefore, the maximum power
dissipation is about 820 mW. More power can be dissipated if the maximum ambient temperature of the
application is lower.
T *T
J(MAX) A
P + + 125°C * 85°C + 820 mW
D(MAX) R
qJA 48.7 °CńW
(6)
Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Interface interface.ti.com Digital Control www.ti.com/digitalcontrol
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
Low Power www.ti.com/lpw Telephony www.ti.com/telephony
Wireless
Video & Imaging www.ti.com/video
Wireless www.ti.com/wireless
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Copyright © 2007, Texas Instruments Incorporated
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Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Interface interface.ti.com Digital Control www.ti.com/digitalcontrol
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
Low Power www.ti.com/lpw Telephony www.ti.com/telephony
Wireless
Video & Imaging www.ti.com/video
Wireless www.ti.com/wireless
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PACKAGE OPTION ADDENDUM
www.ti.com 7-May-2007
PACKAGING INFORMATION
Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
TPS61200DRCR ACTIVE SON DRC 10 3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS61200DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS61200DRCT ACTIVE SON DRC 10 250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS61200DRCTG4 ACTIVE SON DRC 10 250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS61201DRCR ACTIVE SON DRC 10 3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS61201DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS61201DRCT ACTIVE SON DRC 10 250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS61201DRCTG4 ACTIVE SON DRC 10 250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS61202DRCR ACTIVE SON DRC 10 3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS61202DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS61202DRCT ACTIVE SON DRC 10 250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS61202DRCTG4 ACTIVE SON DRC 10 250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 7-May-2007
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 17-May-2007
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 17-May-2007
Device Package Pins Site Reel Reel A0 (mm) B0 (mm) K0 (mm) P1 W Pin1
Diameter Width (mm) (mm) Quadrant
(mm) (mm)
TPS61200DRCR DRC 10 MLA 330 12 3.3 3.3 1.1 8 12 PKGORN
T2TR-MS
P
TPS61200DRCR DRC 10 FRB 330 12 3.3 3.3 1.6 12 12 PKGORN
T2TR-MS
P
TPS61200DRCT DRC 10 MLA 180 12 3.3 3.3 1.1 8 12 PKGORN
T2TR-MS
P
TPS61200DRCT DRC 10 FRB 330 12 3.3 3.3 1.6 12 12 PKGORN
T2TR-MS
P
TPS61201DRCR DRC 10 MLA 330 12 3.3 3.3 1.1 8 12 PKGORN
T2TR-MS
P
TPS61201DRCR DRC 10 FRB 330 12 3.3 3.3 1.6 12 12 PKGORN
T2TR-MS
P
TPS61201DRCT DRC 10 MLA 180 12 3.3 3.3 1.1 8 12 PKGORN
T2TR-MS
P
TPS61201DRCT DRC 10 FRB 330 12 3.3 3.3 1.6 12 12 PKGORN
T2TR-MS
P
TPS61202DRCR DRC 10 MLA 330 12 3.3 3.3 1.1 8 12 PKGORN
T2TR-MS
P
TPS61202DRCR DRC 10 FRB 330 12 3.3 3.3 1.6 12 12 PKGORN
T2TR-MS
P
TPS61202DRCT DRC 10 MLA 180 12 3.3 3.3 1.1 8 12 PKGORN
T2TR-MS
P
TPS61202DRCT DRC 10 FRB 330 12 3.3 3.3 1.6 12 12 PKGORN
T2TR-MS
P
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 17-May-2007
Device Package Pins Site Length (mm) Width (mm) Height (mm)
TPS61200DRCR DRC 10 MLA 346.0 346.0 29.0
TPS61200DRCR DRC 10 FRB 342.9 336.6 20.6
TPS61200DRCT DRC 10 MLA 190.0 212.7 31.75
TPS61200DRCT DRC 10 FRB 342.9 336.6 20.6
TPS61201DRCR DRC 10 MLA 346.0 346.0 29.0
TPS61201DRCR DRC 10 FRB 342.9 336.6 20.6
TPS61201DRCT DRC 10 MLA 190.0 212.7 31.75
TPS61201DRCT DRC 10 FRB 342.9 336.6 20.6
TPS61202DRCR DRC 10 MLA 346.0 346.0 29.0
TPS61202DRCR DRC 10 FRB 342.9 336.6 20.6
TPS61202DRCT DRC 10 MLA 190.0 212.7 31.75
TPS61202DRCT DRC 10 FRB 342.9 336.6 20.6
Pack Materials-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com 17-May-2007
Pack Materials-Page 4
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