CHAPTER NO 11

1.Explain which way the data flow for an IN and an OUT instruction.
A. The IN instruction inputs data from an external device into the accumulator and
the OUT instruction sends data out to an external device from the accumulator.
2. Where is the I/O port number stored for a fixed I/O instruction?
A. The I/O address is stored in the second byte of the
instruction.
3. Where is the I/O port number stored for a variable I/O instruction?
A. DX
4. Where is the I/O port number stored for a string I/O instruction?
A. DX
5. To which register are data input by the 16-bit IN instruction?
A. AX
6. Describe the operation of the OUTSB instruction.
A. The OUTSB instruction transfers the data segment byte addressed by SI to the I/O port
addressed by DX,
then SI is incremented by one.
7. Describe the operation of the INSW instruction.
A. The INSW inputs data from the I/O port addressed by DX, as a word, into the
extra segment memory location addressed by DI; it then increments DI by 2.
8. Contrast a memory-mapped I/O system with an isolated I/O
system. A. Memory
mapped I/O uses any instruction that transfers data to or from the memory for I/O, while
isolated I/O
requires the use of the IN or OUT instruction.
9. What is the basic input interface?
A. The basic input interface is a three-state buffer that is enabled for the IN
instruction. When the buffer is enabled data is gated onto the data bus and into the
accumulator.
10. What is the basic output interface?
A. The basic output interface is a latch that captures output data and holds it for the output
device.
11. Explain the term handshaking as it applies to computer I/O
systems. A.
Handshaking is the act of synchronizing two systems that operate asynchronously.
12. An even-number I/O port address is found in the ____________ I/O
bank in the 8086
microprocessor.
A. Lower
13. In the Pentium 4, what bank contains I/O port number 000AH?
A. D8–D15
14. How many I/O banks are found in the Pentium 4 or Core2
microprocessor? A. 4
CHAPTER NO 11

15. Show the circuitry that generates the upper and lower I/O write
strobes.

16. What is the purpose of a contact bounce eliminator?

18. Develop a relay coil driver that can control a 5.0 V relay
that requires 60 mA of coil current.
A.
CHAPTER NO 11

19. Develop an I/O port decoder, using a 74ALS138, that

20. Develop an I/O port decoder, using a 74ALS138, that

21. Develop an I/O port decoder, using a PLD, that generates

22. Develop an I/O port decoder, using a PLD, that generates the
following low-bank I/O
strobes: 00A8H, 00B6H, and 00EEH.
CHAPTER NO 11

A.
23. Develop an I/O port decoder, using a PLD, that generates the
following high-bank I/O
strobes: 300DH, 300BH, 1005H, and 1007H.
A.
24. Why are both and (A0) ignored in a 16-bit port address decoder?
A. If the port is 16 bits wide, there is no need to enable either the low or high half.
25. An 8-bit I/O device, located at I/O port address 0010H, is
connected to which data bus
connections in a Pentium 4?
A.
26. An 8-bit I/O device, located at I/O port address 100DH, is
connected to which data bus
connections in a Core2 microprocessor?
BHE BLE
BASIC I/O INTERFACE 449
A. D47–D40
27. The 82C55 has how many programmable I/O pin connections?
A.
28. List the pins that belong to group A and to group B in the 82C55.
A. Group A is port A and PC4–PC7, while group B is port B and PC3–PC0.
29. Which two 82C55 pins accomplish internal I/O port address
CHAPTER NO 11

selection? A.
30. The connection on the 82C55 is attached to which 8086 system
control bus connection? A. RD
31. Using a PLD, interface an 82C55 to the 8086 microprocessor so
that it functions at I/O
locations 0380H, 0382H, 0384H, and 0386H.
A.
32. When the 82C55 is reset, its I/O ports are all initialized as
____________. A. Inputs
33. What three modes of operation are available to the 82C55?
A. Modes 0, 1, and 2
34. What is the purpose of the signal in strobed input operation of
the 82C55? A. The strobe
input latches the input data and sets the buffer full flag and interrupt request .
35. Develop a time delay procedure for the 2.0 GHz Pentium 4 that
waits for 80 μs. A. DELAY PROC
NEAR
MOV ECX, 479904
.REPEAT
.UNTIL ECX == 0
RET
DELAY ENDP
36. Develop a time delay procedure for the 3.0 GHz Pentium 4 that
waits for 12 ms. A.
37. Explain the operation of a simple four-coil stepper motor.
A. The 4-coil stepper is moved by activating (passing current through) a single coil
at a time in round-robin fashion to move the armature a step at a time
38. What sets the IBF pin in strobed input operation of the 82C55?
A. The strobe signal ( STB )
39. Write the software required to place a logic 1 on the PC7 pin of
the 82C55 during strobed
input operation.
A. IN AL,PORTC
OR AL,80H
OUT PORTA,AL

40. How is the interrupt request pin (INTR) enabled in the strobed
input mode of operation of
the 82C55?
A. The INTR pin is enabled by setting the INTE bit in PC 4 (port A) or PC2 (port B).
41. In strobed output operation of the 82C55, what is the purpose of
the signal? A. The ACK
signal is used by the I/O device to inform the 8255 that the output data has been
processed by the output device.
CHAPTER NO 11

42. What clears the signal in strobed output operation of the 82C55?
A. When data are output to the port OBF becomes a0 and when ACK is sent to the port OBF
becomes a 1.
43. Write the software required to decide whether PC4 is a logic 1
when the 82C55 is operated
in the strobed output mode.
A. IN AL,PORTC
BT AL,4
JZ IF_ZERO
44. Which group of pins is used during bidirectional operation of the
82C55? A. Group or port A
contains the bidirectional data.
45. Which pins are general-purpose I/O pins during mode 2
operation of the 82C55? A.
PC0, PC1, and PC2
46. Describe how the display is cleared in the LCD display.
A. The 01H command is sent to the LCD display.
47. How is a display position selected in the LCD display?
A. A display position is select by sending a command that contains the 7-bit
address with the 8th and most significant bit set.
48. Write a short procedure that places an ASCII null string in
display position 6 on the LCD
display.
A.
49. How is the busy flag tested in the LCD display?
A. A read command is issued and the leftmost bit of the data read from the LCD
display is the BUSY bit.
50. What changes must be made to Figure 11–25 so that it functions
with a keyboard matrix that
contains three rows and five columns?
A.
51. What time is usually used to debounce a keyboard?
A. 10–20 ms.
52. Develop the interface to a three- by four-key telephone-style
keypad. You will need to use a
lookup table to convert to the proper key code.
A.
53. The 8254 interval timer functions from DC to ____________ Hz.
A. 10 MHz

54. Each counter in the 8254 functions in how many different

55. Interface an 8254 to function at I/O port addresses XX10H,

A.
56. Write the software that programs counter 2 to generate an 80
KHz square wave if the CLK
input to counter 2 is 8 MHz.
A.
57. What number is programmed in an 8254 counter to count 300
events? A. 300
58. If a 16-bit count is programmed into the 8254, which byte of the
count is programmed first?
A . least significant
59. Explain how the read-back control word functions in the 8254.
A. The counter is latched then the counter read-back control reads the counter at
the time of the latching.
60. Program counter 1 of the 8254 so that it generates a continuous
series of pulses that have a
CHAPTER NO 11

high time of 100 μs and a low time of 1 μs. Make sure to indicate the
CLK frequency
required for this task.
A.
61. Why does a 50% duty cycle cause the motor to stand still in the
motor speed and direction
control circuit presented in this chapter?
A. The motor attempts to move forward and reverse for equal amounts of time.
This causes it to remain stationary.
62. What is asynchronous serial data?
A. Data that are sent a bit at a time without any clocking pulses
63. What is baud rate?
A. The number of transmitted bits per second including data, start, stop and any
other bits that are transferred.
64. Program the 16550 for operation using six data bits, even parity,
one stop bit, and a baud
rate of 19,200 using a 18.432 MHz clock. (Assume that the I/O ports
are numbered 20H
and 22H.)
OBF
ACK
STB
RD
A.
65. If the 16550 is to generate a serial signal at a baud rate of 2400
baud and the baud rate divisor is programmed for 16, what is the
frequency of the signal?
A. 614,400 Hz
66. Describe the following terms: simplex, half-duplex, and full-
duplex. A.
67. How is the 16550 reset?
A. The MR input pin resets the device.
68. Write a procedure for the 16550 that transmits 16 bytes from a
small buffer in the data
segment address (DS is loaded externally) by SI (SI is loaded
externally). A.
69. The DAC0830 converts an 8-bit digital input to an analog output
in approximately___________.
A. 1.0 µs
70. What is the step voltage at the output of the DAC0830 if the
reference voltage is -2.55 V?
A. 0.01 v
71. Interface a DAC0830 to the 8086 so that it operates at I/O port
CHAPTER NO 11

400H. A.
72. Develop a program for the interface of question 71 so the
DAC0830 generates a triangular
voltage wave-form. The frequency of this wave-form must be
approximately 100 Hz. A.
73. The ADC080X requires approximately ____________ to convert an
analog voltage into a
digital code.
A. 100 µs
74. What is the purpose of the INTR pin on the ADC080X?
A. INTR indicates that the converter has completed a conversion.
75. The pin on the ADC080X is used for what purpose?
A. Start conversion
76. Interface an ADC080X at I/O port 0260H for data and 0270H to
test the INTR pin. A. See Figure D–9.
77. Develop a program for the ADC080X in question 76 so that it
reads an input voltage once
per 100 ms and stores the results in a memory array that is 100H
bytes long. A.
78. Rewrite Example 11–29 using C++ with inline assembly code.
A.