sequential-circuits-1
sequential-circuits-1
sequential-circuits-1
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Lecturer
Department of Information Technology
https://reenamorersm.wordpress.com/
Email: reena.more@rsmpoly.org
Sequential Circuit
Sequential circuit contains a set of inputs and outputs s. The outputs s of sequential
circuit depends not only on the combination of present inputs but also on the
previous outputs s. Previous output is nothing but the present state. Therefore,
sequential circuits contain combinational circuits along with memory storage
elements. Some sequential circuits may not contain combinational circuits, but only
memory elements.
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Difference between combinational circuits and sequential circuits.
Outputs depend only on present inputs. Outputs depend on both present inputs and
present state.
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Types of Sequential Circuits
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Clock signal
Clock signal is a periodic signal and its ON time and OFF time need not be the same.
We can represent the clock signal as a square wave, when both its ON time and OFF
time are same.
Square wave is considered as clock signal. This signal stays at logic High 5V for
some time and stays at logic Low 0V for equal amount of time. This pattern repeats
with some time period. In this case, the time period will be equal to either twice of
ON time or twice of OFF time.
The reciprocal of the time period of clock signal is known as the frequency of the
clock signal. All sequential circuits are operated with clock signal.
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Types of Triggering
• Following are the two possible types of triggering that are used in
sequential circuits.
1. Level triggering
2. Edge triggering
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Level triggering
There are two levels, namely logic High and logic Low in clock signal. Following are
the two types of level triggering.
1. Positive level triggering
2. Negative level triggering
Positive level triggering
If the sequential circuit is operated with the clock signal when it is in Logic High, then that type of
triggering is known as Positive level triggering. It is highlighted in below figure.
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Level triggering
Negative level triggering
If the sequential circuit is operated with the clock signal when it is in Logic Low,
then that type of triggering is known as Negative level triggering. It is highlighted in
the following figure.
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Edge triggering
• Following are the two types of edge triggering based on the transitions of clock
signal.
1. Positive edge triggering
2. Negative edge triggering
1. Positive edge triggering
If the sequential circuit is operated with the clock signal that is transitioning from Logic Low to
Logic High, then that type of triggering is known as Positive edge triggering. It is also called as
rising edge triggering. It is shown in the following figure
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Edge triggering
2. Negative edge triggering
If the sequential circuit is operated with the clock signal that is transitioning from
Logic High to Logic Low, then that type of triggering is known as Negative edge
triggering. It is also called as falling edge triggering. It is shown in the following
figure.
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There are two types of memory elements based on the type of triggering that is
suitable to operate it.
1. Latches
2. Flip-flops
Latches operate with enable signal, which is level sensitive. Whereas, flip-flops
are edge sensitive.
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Latches
A latch is a simple circuit that responds by switching its output between two states on
the application of certain inputs.
A digital latch is the building block of sequential circuits. It is made using NOR or
NAND logic gates.
Latches have a feedback system. This means that the output of the latch is given back
to its input. This indicates that the outputs of a latch depend on current as well as
previous inputs. A latch has two inputs and two outputs. The outputs are
complementary to each other.
A latch has two stable state outputs. This means that there are two cases of inputs
where the output of a latch is stable. This is why it is also known as a bistable
multivibrator.
The latch keeps shifting between these two states whenever there is a change in the
input signal. The two stable states are known as SET and RESET states.
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Latches
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Construction Of Latch By Using 2 NOR Gates-
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SR Latch
SR Latch is also called as Set Reset Latch. This latch affects the outputs as long as
the enable, E is maintained at ‘1’. The circuit diagram of SR Latch is shown in the
following figure.
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D Latch
There is one drawback of SR Latch. That is the next state value can’t be predicted
when both the inputs S & R are one. So, we can overcome this difficulty by D Latch.
It is also called as Data Latch. The circuit diagram of D Latch is shown in the
following figure.
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Thank You
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