Module 2: 8051 Microcontroller

Architecture and Hardware

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Organization
 Microprocessors and Microcontrollers
 Introduction

 8051 Microcontroller
 Introduction
 Architecture
 Hardware
 Port Internal Structure
 RAM
 Special Function Register

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Today we will learn

 What is a microprocessor?

 What is a microcontroller?

 What are the differences between both?

 Which one is better?

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What is a Microprocessor
 A Microprocessor is the Central Processing Unit (CPU) of
a computer constructed within a single chip

 To make a complete Microcomputer, it needs to be

connected to
 Memory to store data and programs
 RAM
 ROM
 Input / Output devices to communicate with surroundings
 Control Circuits

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Microprocessor - History
Processor Model Year Clk. Speed Transistors Bits Generation
 Transistor - 1948 - - -
 IC - 1958 - - -
 Intel 4004 1971 500 kHz 3500 4-bit 1st generation
 Intel 8080 1974 2 MHz 6000 8-bit 2nd generation
 Intel 8085 1976 3 MHz 6500 8-bit 2nd generation
 Intel 8086 1978 4.77 MHz 29000 16-bit 3rd generation
 Intel 80286 1982 8 MHz 13400 16-bit 3rd generation
 Intel 80386 1986 16-100 MHz 1.2 m 32-bit 4th generation
 Intel Pentium 1993 66 MHz - 32-bit 4th generation
 Intel Core 2 2006 1.2-3 GHz 291 m 64-bit 5th generation
 Intel i3, i5, i7 07, 09, 10 2.2-3.6 GHz 291 m 64-bit 5th generation

Microprocessor Manufacturers other than Intel

 Motorola
 Advanced Micro Devices (AMD)
 IBM
 Qualcomm
 Apple

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Inside CPU
 Registers
 Temporarily store information
 Could be 8/ 16 / 32 bit
 Bigger the register size, better the CPU. But cost increases with
increase in number of bits
 ALU
 Performs arithmetic and logical functions e.g. Sum, AND, NOT etc
 Program Counter (PC) – Special-Purpose Register
 Keeps track of the memory address of the next instruction to be
executed in the program.
 Contents of PC are placed on address bus to fetch the desired
instruction.
 Instruction Decoder
 To interpret the instruction fetched into CPU

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Inside CPU

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Execution of an Instruction
Fetch / Execute Cycle – The operations to execute an instruction are:

 Contents of the program counter (PC) are placed on the Address Bus
 A Read Control Signal is activated
 The data (or Op code) are read from memory and placed on data bus
 The op code is latched into CPU internal instruction register
 PC is incremented to prepare for next fetch from memory

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Execution of an Instruction
 After performing 1 fetch / execute cycle, computer
repeats this procedure forever – this is all computer does

 Important Note: Sequencing is all done automatically by

processor’s Control Unit
 All the programmer has to do is to put the list of instructions in
memory and set the program counter to point to the first
instruction

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What is a Microcontroller?
 A Microcontroller is a microcomputer in a single chip

Microcontroller is a
microprocessor plus memory plus
IO devices plus control circuits, all
integrated in a single chip

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Microcontroller

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Microcontroller
 A microcontroller can be as powerful as far larger
machines of few years ago

 There are many more embedded microcontroller-based

systems in the world than PCs

 A ready-made processor + IO + Memory + Control Circuits

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Common Microcontroller Manufacturers
 AMCC  Energy Micro AS
 Altera  EPSON
 Analog Devices Semiconductor
 Atmel  Freescale
Semiconductor
 Charmed Labs
 Fujitsu
 Cypress
Semiconductor  Holtek
 Dallas  Infineon
Semiconductor  Intel
 ELAN  Lattice
Microelectronics Semiconductor
Corp.  Microchip
 Energy Micro AS Technology

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http://en.wikipedia.org/wiki/List_of_common_microcontrollers
Common Microcontroller Manufacturers
 National  Sony
Semiconductor  STMicroelectronics
 NEC  Texas Instruments
 Parallax  Toshiba
 NXP  Ubicom
Semiconductors  Xemics
 Rabbit  Xilinx
Semiconductor
 ZiLOG
 Renesas
 Silicon Motion
Electronics
 SiLabs
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http://en.wikipedia.org/wiki/List_of_common_microcontrollers
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Choosing a Microcontroller
1. Meeting computing needs of the task efficiently
 Speed
 Power consumption
 RAM and ROM
 Number of I/Os
 Cost

2. How easy is it to develop product around it

 Availability of assembler, a code efficient C language
 Debugger, simulator or emulator

3. Readily available in market or not?

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Microprocessor Vs Microcontroller

Microprocessor Microcontroller

 Chip does not have RAM,  Chip has RAM, ROM,

ROM, timer etc. Requires timer etc. Requires no
additional circuitry additional circuitry
 High power requirement  Low power requirement
 Operates on small
 Operates on large volume volumes of data bit and
of nibble, byte and word byte
 No bit addressing  Can address bits
 Faster  Slower
 More number of pins  Less number of pins
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 8051 Microcontroller

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Microcontroller
 Intel – 1976
 8748 (MCS 48 Family)
 1700 transistors
 1 kB EPROM
 64 bytes RAM
 27 I/O lines
 8-bit timer

 Used as a video game console and in IBM PC keyboard

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Microcontroller
 Intel – 1979
 MCS 41 Family
 2 kB of program memory
 128 bytes of data RAM
 40 pin package
 8-bit timer

 Used in keyboard and for simple applications

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Microcontroller
 Intel – 1980
 8051 (MCS 51 Family)
 60,000 transistors
 4 kB ROM
 128 bytes of RAM
 32 I/O lines
 Two 16-bit timers
 Serial Port
 64 K External Code Memory Space
 64 K External Data Memory Space

Harvard architecture, complex instruction set computer (CISC) instruction set

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Various 8051 Manufacturers
Over 1000 versions of 8051
 Intel  Infineon
 Atmel  SiLabs

 Dallas  Philips

 AMD  Seimens

And many more

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8051 by Atmel
 AT89C51
 Flash memory
 Electrical ROM burner required to
 Erase and
 Program
 Fast erasing as compared to UV erase which took around 20
minutes
 AT89C51-12PC by Atmel
 AT stands for Atmel
 C for CMOS – low power consumption
 12 indicates frequency of 12 Mhz
 P for Plastic DIP package
 C for commercial (for military M is used instead of C)
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Block Diagram 8051

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Detailed Block Diagram - 8051

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 Detailed Block Diagram - 8051

External interrupts
On-chip Timer/Counter

Interrupt ROM for

On-chip Timer 1 Counter
Control program
code RAM Timer 0 Inputs

CPU

Bus Serial
4 I/O Ports
OSC Control Port

P0 P1 P2 P3 TxD RxD
Address/Data

27 Block Diagram
Pin Description 8051

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Pin Configuration
Pin Description 8051
 4 IO Ports
 Port 0 (P0.0 to P0.7)
 Port 1
 Port 2
 Port 3

 Vcc – 5 volts
 Vss – Gnd

 Oscillator
 XTAL1
 XTAL2

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Pin Description 8051
 4 IO Ports
 Port 0 (P0.0 to P0.7)
 Port 1
 Port 2
 Port 3

 Vcc – 5 volts
 Vss – Gnd

 Oscillator
 XTAL1
 XTAL2

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8051 Hardware
Alternate Functions - Port 3

 Serial Port
 P3.0 : Serial Input (RXD)
 P3.1 : Serial Output (TXD)

 External Interrupt
 P3.2 : External Interrupt 0 (INT0)
 P3.3 : External Interrupt 1(INT1)

 Timers / Counters
 P3.4 : Timer 0 External Input
 P3.5 : Timer 1 External Input

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8051 Hardware
Alternate Functions - Port 3

 Serial Port
 P3.0 : Serial Input (RXD)
 P3.1 : Serial Output (TXD)

 External Interrupt
 P3.2 : External Interrupt 0 (INT0)
 P3.3 : External Interrupt 1(INT1)

 Timers / Counters
 P3.4 : Timer 0 External Input
 P3.5 : Timer 1 External Input

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8051 Hardware
Special Pins

 ALE /
 Address Latch Enable
 Used to access external memory
 ALE = 1 for latching address on P0
 ALE = 0 for using P0 as data

 .
 Program Store Enable
 Output pin connected to
external memory (if used)
It is used while accessing the data from external PROM/EPROM.
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8051 Hardware
Special Pins

 .
 External Access Enable
 Should be strapped to Vcc for
internal memory usage
 EA = 1 for internal code
 EA = 0 for external code

It is used to enable/disable the

external memory interfacing.

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8051 Hardware
Special Pins
 Oscillator (XTAL1 & XTAL2)
 Crystal 11.059 Mhz available
 Use following circuit

C1 = C2 = 30 pF ± 10 pF for crystals
33 pF easily available
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8051 Hardware
Special Pins

 Reset Pin
 Normally 0
 1 to reset the controller
 Reset High must have a
minimum duration of two
machine cycles
 Following circuit may be
used

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8051 Hardware
 Reset Pin

Reset Circuit
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8051 Hardware

Hardware Considerations

 Buffers
 To provide current on IO pins
 To avoid loading on microcontroller
 Bidirectional Buffer on ports
 Ports are bidirectional
 Used for Input as well as Output

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8051 Hardware
Hardware Considerations
 Port 0 Requires external Pull Up

Vcc
10
K
P0.0

Port
8051
0
P0.7
SIP Resistor Bank is locally
available
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Why Pull-up Resistor on Pin 0

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Pin ABS Ratings

SELF ASSIGNMENT: study the data sheet to see if the 3.3V logic high and low
output levels meet the 5V logic high and low input levels.
8051 Hardware

Good Hardware Practice – Make Generic Board

 Connectors
 Voltage Regulator
 LEDs on all IO Ports (SIP LED Banks locally available)
 Buffers
 40 Pin Base / Ziff

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Port Internal Structure

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Output (Low)

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Output (High)

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Port as Input

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Input (High)

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Input (Low)

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Port as Input without setting it High - Damage

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Avoid Damaging the Port

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Memory

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Memory
 Internal On-Chip Memory
 Internal RAM (Data)
 Register Banks
 Bit Addressable Memory
 General Purpose Storage
 Accumulators
 Special Function Registers
 Internal ROM (Code)
 Look-up tables can also be saved

 External Memory
 ROM (External Code Memory)
 RAM (External Data Memory)

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Internal
Memory

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 Internal
Memory
General Purpose
RAM

Bit-Addressable
Locations

Register Banks

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Register Banks

 4 Register Banks
 At a time only 1 Register Bank is active

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Bit Addressable RAM

 Bits can directly be accessed

 Read bits
 Write
 0
 1

What if bits are not directly

accessible?

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Special Function Registers

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 Special Function Registers
P0 – Port 0
 Address: 80h
 Bit-Addressable
 Each bit corresponds to
pin of the port
 Writing 1 to a bit will
set the corresponding
pin HIGH and vice
versa

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 Special Function Registers
SP – Stack Pointer
 Address: 81h
 Points to current stack
location
 Modified (automatically)
by instructions
 PUSH
 POP etc

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 Special Function Registers
PCON – Power Control
 Address: 87h
 To control power modes
 Certain modes allow 8051
to go in ‘Sleep’ mode
which requires less power

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PCON

o SMOD – Doubles the baud rate of Serial Port

o GF1 – General Purpose Flag Bit 1
o GF0 – General Purpose Flag Bit 0
o PD – Power Down; sets the power down mode, only
exit is Reset
o IDL – Idle Mode; activates Idle Mode, only exit is
Interrupt or Reset

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PCON
Power Down Mode
 Instruction that sets PD will be the last instruction that
will be executed before entering Power Down Mode

 Clock to CPU, Interrupt, Timer and Serial Port is cut off

 On-chip RAM contents are retained

 Port Pins retain their logic level

 Only exit is system reset
 Vcc can be as low as 2 volts

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PCON
Idle (or Sleep) Mode
 Instruction that sets IDL will be the last instruction that
will be executed before entering Idle Mode
 Clock to CPU is cut off but not to Interrupt, Timer and
Serial Port is cut off
 On-chip RAM contents, CPU status and registers are
retained
 Port Pins retain their logic level
 Exit when either
 Interrupt or
 Reset

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 Special Function Registers
TCON – Timer Control
 Address: 88h
 Bit addressable
 Controls timers
 Run
 Stop
 Flags to indicate overflow

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 Special Function Registers
TMOD – Timer Mode
 Address: 89h
 Configures modes of
timers (0 to 3)
 16 bit
 13 bit
 8 bit
 Split timer mode

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 Special Function Registers
TL0 / TH0 – Timer 0 Bytes
 Address: 8Ah / 8Ch
TL1 / TH1 – Timer 1 Bytes
 Address: 8Bh / 8Dh

 Both bytes make a 16 bit

number
 Value of Timer

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 Special Function Registers
P1 – Port 1
 Address: 80h
 Bit-Addressable
 Each bit corresponds to
pin of the port
 Writing 1 to a bit will
set the corresponding
pin HIGH and vice
versa

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 Special Function Registers
SCON – Serial Control
 Address: 98h
 Bit-Addressable
 Controls the on-chip
Serial Port

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 Special Function Registers
SBUF – Serial Buffer
 Address: 99h
 Used to receive or
transmit the data through
serial port
 Value stored in SBUF is
transmitted
 Value received by serial
port is stored in SBUF

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 Special Function Registers
P2 – Port 2
 Address: A0h
 Bit-Addressable
 Each bit corresponds to
pin of the port
 Writing 1 to a bit will
set the corresponding
pin HIGH and vice
versa

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 Special Function Registers
IE – Interrupt Enable
 Address: A8h
 Used to enable (or
disable) specific
interrupts
 A bit for every interrupt
 0 means interrupt
is disabled
 1 means interrupt enable
 Global Enable
 1 = interrupts enabled
according to the corresponding bits
 0 = means all interrupts disabled

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 Special Function Registers
P3 – Port 3
 Address: B0h
 Bit-Addressable
 Each bit corresponds to
pin of the port
 Writing 1 to a bit will
set the corresponding
pin HIGH and vice
versa

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Port 3 – Alternate Functions
 Multiplexing on Port 3 i.e. more than 1 functions on each
pin

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 Special Function Registers
IP – Interrupt Priority
 Address: B8h
 Bit-Addressable
 Defines priorities of
interrupts
 2 interrupt priority levels
 Interrupt priority may be
 Low – 0 in corresponding
IP bit
 High – 1 in corresponding
IP bit

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 Special Function Registers
PSW – Program Status Word
 Address: D0h
 Bit-Addressable

 Contains important
bits and flags
(detail on next slides)

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Program Status Word (PSW)

Self do Assignment: Read about

Overflow flag set conditions
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 Special Function Registers
ACC – Accumulator
 Address: E0h
 Bit-Addressable

 One of the most used

registers. Used by many
instructions

For example, if you want to add

the number 10 and 20, the
resulting 30 will be stored in
the Accumulator. Once you
have a value in the
Accumulator you may
continue processing the value
or you may store it in another
register or in memory.

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 Special Function Registers
B – B Registar
 Address: F0h
 Bit-Addressable

 Used for
 Multiplication
 Division

 Also used as an auxiliary

register to temporarily store values

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