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Module2-Introduction to the ARM Programming

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12 views

Module2-Introduction to the ARM Programming

Uploaded by

jainambheda18
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Introduction to ARM

Programming
Book: ARM Assembly Language Programming & Architecture
Muhammad Ali Mazidi Sarmad Naimi Sepehr Naimi Janice Mazidi
Addressing Modes
Unaltered value :
• The register or a value is delivered unchanged, that is, without any
shift or rotation, in this addressing style.
• MOV R0, # 1234 H
The instantaneous constant value 1234 will be moved into register R0
by this instruction.
Modified value :The provided value or register is shifted or rotated in
this addressing mode. As shown below with examples, there are
several shift and rotate operations that may be performed.
Modified value
• :The provided value or register is shifted or rotated in this addressing
mode. As shown below with examples, there are several shift and
rotate operations that may be performed.

• MOV R0, R1, LSL #2


Register indirect addressing mode

• A register is utilized in this addressing mechanism to provide the


address of the memory region to be accessed.
• LDR R0, [R1]

This instruction loads the 32-bit word at the memory location


contained in register R0 into register R0. This is known as Register
indirect addressing mode.
Indirect addressing mode for relative registers

• An instantaneous value applied to a register generates the memory address in this addressing
style. This method of Addressing modes in ARM allows for both pre- and post-indexing.
•
LDR R0, [R1, #4]
This instruction loads the register R0 with the word at the memory regions computed by adding
the constant address included in the R1 register value 4 to the memory address stored in the R1
register, e.g.
• LDR R0, [R1, #4]
This is a type of addressing that comes before the index. This instruction is the same as (a) in that it
sets the new address in R1,
i.e. R1 (R1 + 4).
LDR R0, [R1], #4
This is referred to as post-index addressing. This instruction loads the word at the memory location
supplied in register R1 into register R0. It will then compute the new address by multiplying R1 by 4
and storing it in R1.
Indirect addressing method with a base index
• In this Addressing modes in ARM , The memory address is produced by
adding the values of two registers in this addressing scheme.. For example,
• LDR R0, [R1, R2]
Pre indexing and post indexing is also supported.
This instruction will load the word at the memory address determined by
adding register R1 and register R2 into register R0.
For example,
LDR R0, [R1, R2]
This is pre-index addressing.
This instruction loads the word at the memory location supplied in register
R1 into register R0. The new address will then be calculated by adding the
value in register R2 to register R1 and placed in R1.
Scaled register addressing mode as a base

• In this Addressing modes in ARM, the memory address is produced by


adding a register value to another register that is moved left in this
addressing scheme. This addressing technique allows for pre-indexing
and post-indexing.
LDR R0, [R1, R2, LSL #2]

• The word at the memory location computed by adding register leith


register R2 shifted left by 2 bits will be loaded into register R0 using
this command.
LDR RO,[R1, R2, LSL #2]
The ARM Instruction Set
Instruction Format
IMPORTANT NOTE
Home Work
Home Work-2- DOS-5th September,2024
Home Work-3, DOS-10th Sept,2024

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