4 Addressing Modes of 8086
4 Addressing Modes of 8086
4 Addressing Modes of 8086
The content of the segment register is shifted left bit-wise four times
(Multiply the 16-bit hex value by 10H).
To this result, the content of an offset register is added, to produce
20-bit physical address.
Offset registers for the different segments are indicated below:
BX/ SI/ DI – Data Segment/ Extra Segment
IP – Code Segment
BP – Starting address of Stack
SP – Top of stack
EXAMPLE
The value of Code Segment (CS) Register is 4042H and the value of
different offsets is as follows: BX: 2025H , IP: 0580H , DI: 4247H.
Calculate the effective address of the memory location pointed by the
CS register.
The offset of the CS Register is the IP register.
Shift base address 4-bits and Add offset address
TRY THIS!
Physical address
DISPLACEMENT
BASE INDEX
8 bit or 16bit immediate value
All the contents of All the contents of
Base register-BX or BP Index register-SI or DI
ADDRESSING MODES
An instruction is a basic command given to a microprocessor to perform a
specified operation with given data.
Each instruction has two groups of bits.
One group of bits is known as operation code (opcode), which defines what
operation will be performed by the instruction.
The other field is called operand, which specifies data that will be used in
arithmetic and logical operations.
The operand can specify a register or a memory location in any one of the
memory segments or I/O ports.
The addressing mode is used to locate the operand or data.
There are different types of addressing modes depending upon the location of
data in the 8086 processor.
Most 8086 instructions can operate on the 8086’s general purpose
register set.
By specifying the name of the register as an operand to the instruction,
you may access the contents of that register.
Consider the 8086 mov (move) instruction:
mov destination, source
This instruction copies the data from the source operand to the
destination operand.
The eight and 16 bit registers are certainly valid operands for this
instruction.
The only restriction is that both operands must be the same size.
In addition to the general purpose registers, many 8086 instructions (including the mov
instruction) allow you to specify one of the segment registers as an operand.
There are two restrictions on the use of the segment registers with the mov instruction.
First of all, you may not specify cs as the destination operand,
second, only one of the operands can be a segment register.
You cannot move data from one segment register to another with a single mov
instruction.
To copy the value of cs to ds, you’d have to use some sequence like:
mov ax, cs
mov ds, ax
You should never use the segment registers as data registers to hold arbitrary values.
They should only contain segment addresses
ADDRESSING MODES
Immediate addressing mode
Register addressing mode
Direct addressing mode
Register Indirect addressing mode
Based addressing mode
Indexed addressing mode
Based-index addressing mode
Based-index with displacement addressing mode
IMMEDIATE ADDRESSSING MODE
In which the source operand is a part of the instruction
is known as immediate addressing mode.
Source operand is 8 bit or 16 bit data
destination
Immediate
REGISTER ADDRESSING
MODE
In the Register addressing mode, the data is stored in a register and it is referred using a particular register.
All registers except IP may be used in this mode.
8-bit register names with register addressing: AH, AL, BH, BL, CH, CL, DH, DL.
16-bit register names: AX, BX, CX, DX, SP, BP, SI ,DI, CS, SS, DS and ES.
Never mix an 8-bit register with 16-bit, it is not allowed in microprocessor.
Code segment register (CS) is never used as destination.
Segment to segment MOV instruction is not allowed.
Example: MOV AL, BL ; Copies 8-bit content of BL into AL
MOV AX, CX ; Copies 16-bit content of CX into AX
MOV ES, DS ; Not allowed (segment to segment)
MOV BL, DX ; Not allowed (mixed size)
MOV CS, AX ; Not allowed (Code segment register may not be destination register)
It means that the register is the source of an operand for an instruction.
Offset address