Module 1-8051 Microcontroller

Index
• Introduction
• Microprocessor Vs Microcontroller
• 8051 Architecture
• Registers
• Pin Diagram
• Internal Memory Organization
• I/o Ports function
• External Memory (ROM & RAM ) interfacing
 Important
Terminologies
Introduction
• Flip-flops:
Flip Flops is the memory element which is capable to store a single bit binary number
either 0 or 1.
Flip Flops are frequently used to store the data.
• The unit of data size:
 Bit : a binary digit that can have the value 0 or 1 ex: 0 or 1
Byte : 8 bits ex: 10H or 00010000b
Nibble : half of a bye, or 4 bits ex: 8H or 1000b
Word : two bytes, or 16 bits ex: 2104H or 0010000100000100b
 Introduction (contd…)
INSIDE THE COMPUTER :Internal Organization of Computers

• CPU (Central Processing Unit):

Execute information stored in memory

• I/O (Input/output) devices:

 Provide a means of communicating with CPU.

• Memory:
RAM (Random Access Memory) –
The data is lost when computer is off.

 ROM (Read Only Memory) – contains

programs and information essential to operation of the computer
 The information cannot be changed by use, and is not lost when power is off
 It is called nonvolatile memory
 Introduction (contd…)
INSIDE THE COMPUTER :Internal Organization of Computers

The CPU is connected to memory and I/O through strips of

wire called a bus.
 Bus Carries information from place to place
 Address bus
Data bus
Control bus
 Introduction (contd…)
INSIDE THE COMPUTER :Internal Organization of Computers

Address bus:

For a device (memory or I/O) to be recognized by the CPU, it

must be
assigned an address.
The address assigned to a given device must be unique.
The CPU puts the address on the address bus, and the
decoding circuitry finds the device.
Data bus :
• The CPU either gets data from the device or sends data to it.
 Control bus:
• Provides read or write signals to the device to indicate if the
CPU is asking for information or sending information.
MORE
ABOUT
DATA BUS

The more data buses available, the better the CPU

 Think of data buses as highway lanes
 More data buses mean a more expensive CPU and computer
 The average size of data buses in CPUs varies between 8 and 64
 Data buses are bidirectional
To receive or send data .
The processing power of a computer is related to the size of its buses
 MORE ABOUT
ADDRESS BUS

The more address buses available, the larger the number of devices that can be
addressed
 The number of locations with which a CPU can communicate is always equal to
2x, where x is the address lines, regardless of the size of the data bus
 ex. a CPU with 24 address lines and 16 data lines can provide a total of 2^24 or
16Mbytes of addressable memory. Each location can have a maximum of 1byte
of data, since all general-purpose CPUs are byte addressable.
 The address bus is unidirectional

• The smallest piece of data is the bit. The data will be transformed to its binary form.
• byte = 8 bits
• 1 kilobyte (KB) = 1024 bytes (210 =1 KB)
• 1 megabyte (MB) = 1024 kilobytes
• 1 gigabyte (GB) = 1024 megabytes
• 1 terabyte (TB) = 1024 gigabytes
• 1 petabyte (PB) = 1024 terabytes
• INSIDE THE CPU
• Registers
The CPU uses registers to store information temporarily
Values to be processed.
 Address of value to be fetched from memory.
 In general, the more and bigger the registers, the better the CPU.
 Registers can be 8-, 16-, 32-, or 64-bit.
• ALU (arithmetic/logic unit)
Performs arithmetic functions such as add, subtract, multiply, and divide, and logic
functions such as AND, OR, and NOT
• Program counter
Points to the address of the next instruction to be executed.
 As each instruction is executed, the program counter is incremented to point to the
address of the next instruction to be executed
• Instruction decoder
 Interprets the instruction fetched into the CPU.
Block Diagram of a Microprocessor

Arithmetic
And
Logic Unit

Accumulator
Working
Register(s)

Program
Counter Stack Pointer

Clock Circuit Interrupt Circuits

> The prime use of a microprocessor is to read data,
perform extensive calculations on that data, and stores
those calculations in a mass storage device, or display
the results for human use.
• INTEL Motorola Zilog
1. 4004-4bit 6800-8bit Z80-8bit
2. 8085-8bit 68000-16bit Z800
3. 8086-16bit
4. 80186-16bit
5. 80286-32bit
6. 80386-32bit
7. 80486-P1 64 bit
8. 80586-P11 64 bit
 Microcontrollers
• Block Diagram of a Typical Microcontroller is as shown in
the figure below
Arithmetic
and Timer/Counter I/O Port
Logic Unit
Accumulator
Register(s) I/O Port

RAM ROM

Interrupt
Stack Pointer Circuits

Program Counter Clock Circuit

• The design incorporates all the components of a microprocessor CPU-
ALU,PC,SP and registers. In addition, it has the other components needed to
make a complete computer-ROM,RAM, parallel I/O, Serial I/O, Counters,
and a clock circuit.
• The primary application of a microcontroller is to control the operation of a
machine using a fixed program that is stored in its ROM and does not
change over the lifetime of the system.
• The microcontroller design uses a much more limited set of instructions that
are used to move code and data from internal memory to the ALU.
• The pins are programmable i.e capable of having several different functions
depending on the programmer’s wishes.
The 8051 Family of Microcontrollers

8051
8751

AT89C51RD2 AT89C2051
 Differences Between Microprocessors and Microcontrollers cntd…

Sl. Microprocessors Microcontrollers

No
1 Microprocessor must have many Microcontroller can function as a
additional parts to be function as computer with the addition of no
computer external digital parts
2

3 Microprocessor contains ALU, Microcontroller contains the circuitry of

general purpose registers, SP, PC , microprocessor and in addition it has
clock timing circuit and interrupt built in ROM,RAM, I/O devices, timers
circuit and counters.
Differences Between Microprocessors and Microcontrollers

Sl. Microprocessors Microcontrollers

No
4 Microprocessor have many Microcontrollers may have one or two
operational codes(opcodes) for
moving data from external memory
to the CPU
5 Microprocessor may have one or Microcontroller have many bit
two types of bit handling handling instructions.
instructions
6 Microprocessor is concerned with Microcontroller is concerned with
rapid movement of code and data rapid movement of bits within the
from external address to the chip. chip.
 Differences Between Microprocessors and Microcontrollers cntd…

Sl. Microprocessors Microcontrollers

No
7 Access times for memory and I/O Less access times for built in memory
devices are more for microprocessor and I/O devices in case of
microcontroller
8 Less number of pins are multi- More number of pins are multi-
functioned in microprocessor functioned.
9 It has single memory map for data It has separate memory map for data
and code and code.

10 Ex: 8085,8086,80186,80286 etc Ex: 8081,PIC 16F877A, ARM Cortex-

M3,M7 etc
 MICROCONTROLLER ARCHITECTURAL FEATURES
• There are mainly two categories of processors, namely,
Von-Neumann(or Princeton) architecture and Harvard Architecture.
• These two architecture differ in the way data and programs are stored and accessed.
 VON_NEUMANN ARCHITECTURE (CONTD…)
• It consists of a processor with built-in registers, instruction decoders, memory and
memory interface unit.
• The memory interfacing unit is responsible for arbitrating access to the memory space
between reading the code, reading and writing the data with the processor and its
internal registers.
• Microcontrollers based on the Von-Neumann architecture have a single data bus that is
used to fetch both instructions and data.
• Program instructions and data are stored in a common main memory.
• When such a controller addresses main memory, it first fetches an instruction, and then it
fetches the data to support the instruction.
• The two separate fetches slows up the controller’s operation.
• The Von-Neumann architecture’s main advantage is that it simplifies the
microcontroller design because only one memory is accessed.
• For example, the Motorola 68HC11 microcontroller Von Neumann architecture.
HARVARD ARCHITECTURE
 HARVARD ARCHITECTURE(Contd…)

• Microcontrollers based on the Harvard Architecture have separate data bus and an
instruction bus. This allows execution to occur in parallel.
• As an instruction is being “pre-fetched”, the current instruction is executing on the data
bus.
• Once the current instruction is complete, the next instruction is ready to go.
• This pre-fetch theoretically allows for much faster execution than Von-Neumann
architecture, on the expense of complexity.
• The Harvard Architecture executes instructions in fewer instruction cycles than the Von-
Neumann architecture.
• For example, the intel MCS-51 family of microcontrollers and PIC microcontrollers
uses Harvard Architecture.
 CISC vs RISC
• CISC stands for Complex Instruction Set Computer
• Each instruction does multiple low level operations like
load from memory, perform arithmetic operations and
store the result in memory.
• Smaller program size
• A large number of instructions.
• Some instructions are dedicated for special tasks.
• Large variety for addressing modes.
• Variable length instruction formats
Ex: Intel, IBM processors
• RISC-Reduced Instruction Set Computer
• Relatively few instructions (128 or less)
• Few addressing Modes
• Memory access limited to load and store
• All operations done within CPU registers.
• Fixed length instructions(typically 4 bytes),hence easy to
decode.
• Single cycle instruction execution done by overlapping fetch,
decode and execute phases of two or three instructions.
• Large number of registers in the processor.
8051-Architecture
 The salient features of 8051 are the following:
1. 8-bit CPU with two registers: A (Accumulator) and register B. The accumulator register is used
in most arithmetic and logical operations. Register B is used for integer multiplication and
division.
2. A 16-bit register called Program Counter(PC): it holds the address of the next instruction to be
executed.
3. A 16-bit data pointer register(DTPR): it is used to access external memory.
4. An 8-bit Program Status Word (PSW) register: It indicates certain conditions like status of carry,
Parity, sign, AC etc, after execution of some instructions.
5. It has Internal ROM of 4K bytes used to store Program Code.
6. Internal RAM of 128 bytes divided as:
 Four register Bank of 8 registers each. (8*4=32 bytes)
 16 bytes-which are bit addressable. The individual bits of these bytes can be altered.
 80 Bytes of general RAM memory. So in total (32+16+80=128 bytes)
7. Four 8-bit Ports(P0-P3)- A port pin is a pin , where data can be transmitted to (output) or read
(input) from an external devices.
8. Two 16-bit timers (Timer 0 and Timer 1)- the timers can be used in Timer mode when counting
internal
clock pulses and in counter mode when counting external pulses.
9. Full Duplex Serial data transmitter/Receiver Register(SBUF)-This holds the byte to be transmitted
or the
received byte, when serial communication is used.
10. Two external interrupts and three internal interrupts. Interrupts are events which interrupt the
normal
sequence of execution of instructions.
11.Control Registers: 8051 has the following control registers like viz. TCON(Timer/Counter Control),
TMOD(Timer/Counter Mode Control),SCON(Serial Port Control), PCON( Power Control), IP
(Interrupt
Priority) ,IE( Interrupt Enable Control) which control the operation of the timers, serial port and
interrupts.
12. Oscillator and Clock circuits.
8051 programming Model
 Registers of 8051
1. Program Counter (PC) :
• It is a 16bit register. The PC holds the address of the next instruction to be executed.
• The instructions are fetched from the memory location addressed by the PC. After the
CPU fetches the instruction, the PC is automatically incremented to point to the address
of the next instruction.
• The content of the PC may be altered by certain instruction's like CALL,RET.
• The PC is the only register which does not have an internal address.
• By default the PC is set to 0000H on reset.
2. Data pointer Register (DPTR):
• The DPTR is a 16-bit register, made of two 8-bit register called DPH and DPL.
• It is an index register that provides access to external memory.
• DPH and DPL holds the higher order byte and lower order byte of the address.
• DPH and DPL are assigned internal addresses separately by
DPH address as 83H and DPL address as 82H.
3) A and B register:
• These two are 8 bit registers.
• The A reg is used in many operations including the addition, subtraction, integer
multiplication and division and Boolean bit manipulation.
• A reg is bit-addressable register, meaning that each bit of the accumulator can be
accessed for reading or for altering.
• A register is also used for all data transfers between 8051 and any external memory.
• The B reg is used as normal register to store 8bit data. It is also used with the register
A for multiplication and division operation.
4) Special function registers: IP,IE,SCON,PCON,TMOD,TCON etc to be explained.
PSW (Program Status Word) Register:
• The PSW register is an 8bit register. It is also referred to as the flag register.
Although the PSW is an 8bit register, only 6 bits of it are used by the 8051.
• The two unused bits are user definable flags.
• Four of the flags are called conditional flags, meaning that they indicate some
conditions that result after an instruction is executed. These are CY,AC,P and OV.
• The following is a brief explanation of the individual flag bits of PSW reg:
• CY, the carry flag(PSW.7): This flag is set whenever there is a carry out from the D7
bit. The flag bit is affected after an addition and subtraction instruction is executed.
It can be set to 1 by an instruction SETB C . Similarly it can be reset by an
instruction CLR C.
• AC, the auxillary carry flag(PSW.6): if there is a carry from D3 to D4 bit during an
ADD or SUB operation, this bit is set(1), otherwise it is reset(0). This flag is used by
an instruction that perform BCD arithmetic.
• P, the Parity flag(PSW.0): The parity flag register reflects the number of 1s in the A
register only. If the A reg contains an odd numbers of 1s then P=1 (set). If A has an
even number of 1s then P=0(reset).
• OV, the overflow flag (PSW.2): This flag is set whenever the result of a signed
number operation is too large, causing the higher order bit to overflow into the sign
bit. In general, the CY flag is used to detect errors in unsigned arithmetic
operations. The OV flag is only used to detect errors in signed arithmetic
operations.
• RS1 and RS0 (PSW.4 and PSW.3) register bank selection bits.(see the previous
slide)
• F0(PSW.5) and PSW.1 flag bits are general purpose status flag bits and can be used
by the programmer for any purpose.
Example: If the signed arithmetic is used, find the bits of
PSW are altered when 28H is added to 60H.

28H 00101000
60H 01100000
Res 10001000

CY=0, AC=0, OV=1 , P=0

 Stack
• Stack refers to internal RAM area which is used to store and
retrieve data quickly.
• The 8-bit stack pointer holds the address of the Top of the
stack(TOS).
• It gives the address of the RAM location where the last data
was stored.
• On reset SP hold the value 07h,the last address of register
bank 0.
Stack Operations:
• When data has to be stored on stack, the SP is incremented
by 1,then data is stored.
• When data has to be retrieved, the data is fetched first and
then SP is decremented by 1.
 The 8051 Internal memory organization
Internal RAM:
The 8051 has 128 bytes of internal RAM.
The RAM is divided into 3 segments:
1.Register Banks: There are 4 register banks,
each with 8 registers, which make up
32 working registers, with address from
00H to 1FH.
• The register banks are numbered 0 to 3.
• The selection of the register bank is done by
RS1 and RS0 bits of PSW.
• The eight registers are named R0 to R7.
• Register bank 0 is selected by default on the
reset.
2.Bit/Byte addressable RAM:
• The 16 bytes of RAM from address 20H to 2FH are also bit addressable.
• This means that each of their bits can be addressed individually. This forms
a total of 128 (16 * 8=128) addressable bits.
• Addressable bits are very useful in control of binary events like switching
on or off events.
• They save on precious RAM memory since using a byte instead of a bit,
would be inefficient .
3. General Purpose RAM:
• The RAM area with address from 30H to 7FH is used as general purpose
RAM.
• They are byte addressable.
• Some locations in the address range 80H to FFH are used as special
function registers.
Internal ROM:
AT89C51 having 4K bytes of ROM on chip. AT89C52 has 8K bytes,DS5000-32 is
having 32K bytes of on chip ROM. The address range of 4K byte ROM is
0000H – 0FFFH.
8051-Pin Diagram
1.VCC: Pin 40 provides supply voltage to the chip. The voltage source is +5V.
2.GND: pin 20 is the ground.
3.XTAL1 and XTAL2: The 8051 has an on-chip oscillator but requires an external clock to run
it.
• Most often a quartz Crystal oscillator is connected to inputs XTAL1 (pin 19) and XTAL2(pin
18).
• The quartz crystal oscillator connected to XTAL1 and XTAL2 also needs two capacitors of 30pF
value.

• The clock frequency determines the smallest interval of time within the microcontroller,
called the pulse time P.
• It is essentially the time period of the clock pulse and is equal to 1/f.
• In 8051 two pulses constitutes a state.
• The machine cycle is defined as the smallest interval of time needed to
accomplish any simple instruction.
• In 8051, the machine cycle is made up of 6 states .
• We can calculate the time needed in sec, for an instruction to be executes as
T= (C * 12)/f
Where C= the no of machine cycles, f= crystal frequency.
12 = because in 8051 microcontroller 12 clock pulses constitute one
machine cycle.
Example: In an 8051 system, driven by 11.0592MHz clock, find the time taken for
an instruction which takes 4 Machine cycles.
T= (C * 12)/ f= (4 * 12) / 11.0592M = 4.34Microseconds
4. RST : pin 9 is the RESET pin. Upon applying a high pulse to this pin, the microcontroller
will reset and terminate all activities.
• This is often referred to as a power on reset. Activating a power on reset will cause all
values in the register to be lost.
• It will set PC to all 0s.
• In order for the RESET input to be effective, it must have a minimum duration of two
machine cycles.
• In other words, the high pulse must be high for a minimum of two machine cycles before
it is allowed to go low.
5. EA :It stands for External Access is pin 31.
• It is an input pin and must be connected either to Vcc or GND .
• This pin is connected to Vcc to indicate that the program code is stored in the
microcontroller’s onchip ROM.
• To indicate that the program code has to be accessed from external memory, this pin
must be connected to GND.
• In 8031, where internal ROM is not there, it must be grounded.
6 PSEN : It is the Program Store Enable pin 29. It is an active low output pin signal . When
it has to access program code from an external ROM, it is connected to the Enable pin (OE)
of the ROM chip.
7 ALE: Address latch Enable(pin 30): It is an output pin and is active high.
• The ALE pin is used for demultiplexing the address and data by connecting to the G
pin of the 74LS373 chip.
• The ALE signal determines if the lines AD0-AD7 are used for address or data.
• If the ALE is high then the lines are used to transfer the lower order byte of
address. If the ALE is low, then the lines are used for data transfer.
8. Ports 0,1, 2 and 3: There are four ports P0, P1, P2 and P3 each use 8 pins, making them
8bit ports.
• All the ports upon reset are configured as input port, since P0-P3 have value FFH on them.
• P0: Port 0 is also designated as AD0-AD7, allowing to be used for both address and data.
• P1: dedicated for I/O
• P2: I/O and higher order address lines
• P3 as I/O along with the following functions
 Ports
• Port 0

• Port -0 has 8 pins (P0.0-P0.7).

• The structure of a Port-0 pin is shown in fig above.
• Port-0 can be configured as a normal bidirectional I/O port or it can be used for address/data
interfacing for accessing external memory.
• When control is '1', the port is used for address/data interfacing.
• When the control is '0', the port can be used as a normal bidirectional I/O port.
• Let us assume that control is '0'.
For Port O to act as input port:
• '1' is written to the latch.
• In this situation both the output MOSFETs are 'off'. Hence the output pin floats.
• This high impedance pin can be pulled up or low by an external source.(keyboard)
For Port O to act as output port:
• ‘0' written to the latch again turns on lower FET and Port O ready as output.
• To output a ‘0’ ,write a ‘0’ on to latch which makes Q=0 and Qbar =1,which makes lower FET to be
on hence PO pulled to ground.
• To output a ‘1’ ,write a ‘1’ on to latch which makes Q=1and Qbar =0,both the output MOSFETs are
off and causes the output pin to float.
• An external pull-up resistor is required to output a '1'.
• When the control is '1', address/data bus controls the output driver MOSFETs.
• If the address/data bus (internal) is '0', the upper MOSFET is 'off' and the lower MOSFET is 'on'.
• The output becomes '0'.
• If the address/data bus is '1', the upper transistor is 'on' and the lower transistor is 'off'.
• Hence the output is '1'.
• Hence for normal address/data interfacing (for external memory access) no pull-up resistors are
required.
• Port-0 latch is written to with 1's when used for external memory access.
Port 1
For Port 1 to act as input port:
• '1' is written to the latch causes
Q=1,Qbar =0.
• FET off, Pin 1.X= high pull up.
• External device can write a ‘1’ or ‘0’

For Port 1 to act as output port:

‘0' is written to the latch causes Q=0 and Qbar=1,FET on pulls P1.x =0,hence output is zero.
‘1’ is written to the latch causes Q=1 and Qbar=0,FET off pulls P1.x =1,hence output is one.
Port 2
• Same as Port 0
Port 3

P3.0—–RXD
P3.1—– TXD
P3.2—– INT0 BAR
P3.3—– INT1 BAR
P3.4—– T0
P3.5—– T1
P3.6—– WR BAR
P3.7—– RD BAR
External Memory Interface