8086

ARCHITECTURE
 INTRODUCTION

• 8086 Microprocessor is an enhanced version of 8085Microprocessor

that was designed by Intel in 1976.
• It is a 16-bit Microprocessor having 20 address lines and16 data
lines that provides up to 1MB storage.
• It consists of powerful instruction set, which provides operations like
multiplication and division easily.
• It supports two modes of operation, i.e. Maximum mode and
Minimum mode.
• Maximum mode is suitable for system having multiple processors
and Minimum mode is suitable for system having a single processor.
 FEATURES OF 8086

The most prominent features of a 8086 microprocessor are as

follows:
• It has an instruction queue, which is capable of storing six
instruction bytes from the memory resulting in faster
processing.
• It was the first 16-bit processor having 16-bit ALU, 16-bit
registers, internal data bus, and 16-bit external data bus
resulting in faster processing.
 FEATURES OF 8086

• It uses two stages of pipelining, i.e. Fetch Stage and Execute

Stage, which improves performance.
• Fetch stage can prefetch up to 6 bytes of instructions and
stores them in the queue.
• Execute stage executes these instructions.
• It consists of 29,000 transistors.
Bus Interface Unit:
• BIU takes care of all data and addresses transfers on the buses for the EU
like sending addresses, fetching instructions from the memory, reading
data from the ports and the memory as well as writing data to the ports
and the memory. EU has no direction connection with System Buses so this
is possible with the BIU. EU and BIU are connected with the Internal Bus.
• It has the following functional parts:
• Instruction queue − BIU contains the instruction queue. BIU gets upto 6
bytes of next instructions and stores them in the instruction queue. When
EU executes instructions and is ready for its next instruction, then it simply
reads the instruction from this instruction queue resulting in increased
execution speed.
• Fetching the next instruction while the current instruction executes is
called pipelining.
• The main purpose of a register is to keep a number (variable).
• The size of the above registers is 16 bit, it's something like:
0011000000111001b (in binary form), or 12345 in decimal (human)
form.
• Four general purpose registers (AX, BX, CX, DX) are made of two
separate 8 bit registers, for example if AX= 0011000000111001b, then
AH=00110000b and AL=00111001b. therefore, when you modify any of
the 8 bit registers 16 bit register is also updated, and vice-versa. the
same is for other 3 registers, "H" is for high and "L" is for low part.
• Because registers are located inside the CPU, they are much faster than
memory. Accessing a memory location requires the use of a system
bus, so it takes much longer. Accessing data in a register usually takes
no time. therefore, you should try to keep variables in the registers.
register sets are very small and most registers have special purposes
which limit their use as variables, but they are still an excellent place to
store temporary data of calculations.
General Purpose Registers:

AX : AX stands for Accumulator Register.

• Used to perform arithmetical, logical and data movement operations.
• Accumulator register consists of two 8-bit registers AL and AH, which
can be combined together and used as a 16- bit register AX.
• AL in this case contains the low-order byte of the word, and AH
contains the high-order byte. Accumulator can be used for I/O
operations and string manipulation.
• It is generally used for arithmetical and logical instructions
in 8086 microprocessor.
General Purpose Registers:

BX: BX stands for Base Register.

• Used to perform arithmetical, logical and data movement operations.
• Contains the address of programs that are in other memory locations
like in main memory
• Base register consists of two 8-bit registers BL and BH, which can be
combined together and used as a 16-bit register BX.
• BL in this case contains the low-order byte of the word, and BH contains
the high-order byte. BX register usually contains a data pointer used for
based, based indexed or register indirect addressing.
It is used to store the starting base address of the memory area
within the data segment.
General Purpose Registers:

CX: CX stands for Counter Register.

• Used to perform arithmetical, logical and data movement operations.
• Special Feature: Used for loop or counter purpose.
• Count register consists of two 8-bit registers CL and CH, which can be
combined together and used as a 16-bit register CX.
• When combined, CL register contains the low- order byte of the word,
and CH contains the high order byte.
• Count register can be used in Loop, shift/rotate instructions and as a
counter in string manipulation,.
It is referred to as counter. It is used in loop instruction to store
the loop counter.
General Purpose Registers:
DX: DX stands for Data Register.
• Used to perform arithmetical, logical and data movement operations.
• Special Feature: Used for multiplication and division operations
• Data register consists of two 8-bit registers DL and DH, which can be
combined together and used as a 16-bit register DX.
• When combined, DL register contains the low- order byte of the word, and DH
contains the high order byte.
• Data register can be used as a port number in I/O operations. In integer 32-bit
multiply and divide instruction the DX register contains high-order word of the
initial or resulting number.
• In Division Quotient stores in AX and Remainder stores in DX.
This register is used to hold I/O port address for I/O instruction.
Segment Registers:
• Segmentation is the process in which the main memory of the
computer is logically divided into different segments and each
segment has its own base address.
• It is basically used to enhance the speed of execution of the
computer system, so that the processor is able to fetch and
execute the data from the memory easily and fast.
Segment Registers:
• Code segment (CS) is a 16-bit register containing address of 64
KB segment with processor instructions.
The processor uses CS segment for all accesses to instructions
referenced by instruction pointer (IP) register.
CS register cannot be changed directly.
• Stack segment (SS) is a 16-bit register containing address of
64KB segment with program stack.
By default, the processor assumes that all data referenced by the
stack pointer (SP) and base pointer (BP) registers is located in the
stack segment.
Segment Registers:
• Data segment (DS) is a 16-bit register containing address of
64KB segment with program data.
• By default, the processor assumes that all data referenced by
general registers (AX,BX, CX, DX) and index register (SI, DI) is
located in the data segment.
• Extra segment (ES) is a 16-bit register containing address of
64KB segment, usually with program data.
• By default, the processor assumes that the DI register references the ES
segment in string manipulation instructions.
• Although it is possible to store any data in the segment registers, this is
never a good idea. the segment registers have a very special purpose -
pointing at accessible blocks of memory. segment registers work together
with general purpose register to access any memory value.
• For example if we would like to access memory at the physical address
12345h (hexadecimal), we should set the DS = 1230h and SI = 0045h. This
is good, since this way we can access much more memory than with a single
register that is limited to 16 bit values. CPU makes a calculation of physical
address by multiplying the segment register by 10h and adding general
purpose register to it (1230h * 10h + 45h = 12345h): the address formed
with 2 registers is called an effective address.
• By default BX, SI and DI registers work with DS segment register; BP and SP
work with SS segment register. other general purpose registers cannot form
an effective address.
Pointer and Index Registers:
• Stack Pointer (SP) is a 16-bit register pointing to program stack.
–Always points to top item on the stack
• Base Pointer (BP) is a 16-bit register pointing to data in stack segment.
BP register is usually used for based, based indexed or register indirect
addressing.
• Source Index (SI) is a 16-bit register. SI is used for indexed, based
indexed and register indirect addressing, as well as a source data address
in string manipulation instructions.
• Destination Index (DI) is a 16-bit register. DI is used for indexed, based
indexed and register indirect addressing, as well as a destination data
address in string manipulation instructions.
Special purpose registers
• Instruction Pointer.
• flags register - determines the current state of the
microprocessor.

• IP register always works together with CS segment register and it

points to currently executing instruction.
• flags register is modified automatically by CPU after mathematical
operations, this allows to determine the type of the result, and to
determine conditions to transfer control to other parts of the
program. generally you cannot access these registers directly, the
way you can access AX and other general registers.
Status flags:
• Sign Flag (SF) - set if the most significant bit of the result is set. If
the result after performing any arithmetic or logic operation in the
given instruction is negative, then the sign flag is set to 1.
• Zero Flag (ZF) - set if the result is zero.
• Auxiliary carry Flag (AF) - set if there was a carry from or borrow
to bits in the AL register.
• Parity Flag (PF) - set if parity (the number of "1" bits) in the low-
order byte of the result is even. This flag is set to 1 when there is
even number of one bits in result, and to 0 when there is odd
number of one bits.
• Carry Flag (CF) - set if there was a carry from or borrow to the
most significant bit during last result calculation.
• Overflow Flag (OF): It will be set if the result of a signed operation
is too large to fit in the number of bits available to represent it.
Control flags:
• Control flags controls the operations of the execution unit.
• Trap flag − It is used for single step control and allows the user to
execute one instruction at a time for debugging. If it is set, then the
program can be run in a single step mode.
• Interrupt flag − It is an interrupt enable/disable flag, i.e. used to
allow/prohibit the interruption of a program. It is set to 1 for interrupt
enabled condition and set to 0 for interrupt disabled condition.
• Direction flag − It is used in string operation. As the name suggests
when it is set then string bytes are accessed from the higher
memory address to the lower memory address and vice-a-versa.
MICROPROCESSOR - 8086 PIN
CONFIGURATION
Power supply and frequency signals
• VCC At this pin, the external power supply of + 5V is provided to the processor.
• VSS These two pins acts as the ground. This pin directs the extra current of the
microprocessor to ground.

Clock signal
• CLK is provided through Pin-19. It provides timing to the processor for operations. Its
frequency is different for different versions, i.e. 5MHz, 8MHz and 10MHz.

Address/data bus
• AD0-AD15 These are 16 address/data bus. AD0-AD7 carries low order byte data and
AD8-AD15 carries higher order byte data.
Address/status bus
• A16-A19/S3-S6 These are the 4 address/status buses. During the first clock cycle, it
carries 4-bit address and later it carries status signals.

Read
• It is available at pin 32 and is used to read signal for Read operation.
Ready
• It is available at pin 22. It is an acknowledgement signal from I/O devices that data is
transferred. It is an active high signal. When it is high, it indicates that the device is ready
to transfer data. When it is low, it indicates wait state.
RESET
• It is available at pin 21 and is used to restart the execution. It causes the processor to
immediately terminate its present activity.
S7/BHE
• BHE Bus High Enable is a control signal that indicates whether the upper byte (D8-
D15) of the data bus is active in a 16-bit data transfer.
INTR
• It is available at pin 18. It is an interrupt request signal. Response can be controlled via
interrupt enable flag

NMI
• It stands for non-maskable interrupt and is available at pin 17. NMIs cannot be disabled
or "masked" by the processor. Emergency situations, critical hardware failures

TEST
• This signal is like wait state and is available at pin 23. When this signal is high, then the
processor has to wait for IDLE state, else the execution continues.
MN/MX
• It stands for Minimum/Maximum and is available at pin 33. It indicates what mode the
processor is to operate in; when it is high, it works in the minimum mode and vice-a
versa. [ MN-Compare and moves the smaller number to destination register while MX-
Compare and moves the largest number to the destination register]
INTA
• It is an interrupt acknowledgement signal and id available at pin 24. When the microprocessor
receives this signal, it acknowledges the interrupt.
ALE
• It stands for address enable latch and is available at pin 25. When ALE is high, it indicates that
the information on the multiplexed lines is an address.
DEN
• It stands for Data Enable and is available at pin 26. It is used to enable Transreceiver 8286. The
transreceiver is a device used to separate data from the address/data bus.
DT/R
• It stands for Data Transmit/Receive signal and is available at pin 27. It decides the direction of
data flow through the transreceiver. When it is high, data is transmitted out and vice-a-versa.
M/IO
• This signal is used to distinguish between memory and I/O operations. When it is high, it
indicates I/O operation and when it is low indicates the memory operation. It is available at pin
28.
WR
• It stands for write signal and is available at pin 29. It is used to write the data into the
memory or the output device.

HLDA
• It stands for Hold Acknowledgement signal and is available at pin 30. This signal
acknowledges the HOLD signal.

HOLD
• This signal indicates to the processor that external devices are requesting to access the
address/data buses. It is available at pin 31.
QS1 and QS0
• These are queue status signals and are available at pin 24 and 25. These signals
provide the status of instruction queue. Their conditions are shown in the following
table:
S0, S1, S2
• These are the status signals that provide the status of operation. These are available at
pin 26, 27, and 28. Following is the table showing their status:
S2 S1 S0 Status

0 0 0 Interrupt
acknowledgement

0 0 1 I/O Read

0 1 0 I/O Write

0 1 1 Halt

1 0 0 Opcode fetch

1 0 1 Memory read

1 1 0 Memory write

1 1 1 Passive
LOCK
• When this signal is active, it indicates to the other processors not to ask the CPU. It is
activated using the LOCK prefix on any instruction and is available at pin 29.

RQ/GT1 and RQ/GT0

• These are the Request/Grant signals used by the other processors requesting the CPU
to release the system bus. When the signal is received by CPU, then it sends
acknowledgment. RQ/GT0 has a higher priority than RQ/GT1.
Minimum Mode (MN/MX# = 1):

• Uses pins like M/IO, INTA, ALE, DT/R, DEN, WR, and RD for control and bus management.
• Primarily intended for single-processor systems where the 8086 directly controls the
buses.

Maximum Mode (MN/MX# = 0):

• Uses S0, S1, S2 (status signals), RQ/GT0, RQ/GT1 (bus request/grant), LOCK, and QS0, QS1
for interfacing with external bus controllers and coprocessors.
• Designed for multiprocessor systems with external control of the bus via a bus controller
like the 8288.
 MIC RO P R O C E SS O R - 8 0 8 6 IN S T RU C T ION
SETS

• The 8086 microprocessor supports 8 types of instructions −

• Data Transfer Instructions
• Arithmetic Instructions
• Bit Manipulation Instructions
• String Instructions
• Program Execution Transfer Instructions (Branch & Loop Instructions)
• Processor Control Instructions
• Iteration Control Instructions
• Interrupt Instructions
Data Transfer Instructions
• These instructions are used to transfer the data from the source operand to the
destination operand. Following are the list of instructions under this group:
• Instruction to transfer a word
• MOV − Used to copy the byte or word from the provided source to the provided
destination.
• PUSH − Used to put a word at the top of the stack.
• POP − Used to get a word from the top of the stack to the provided location.
• PUSHA − Used to put all the data present in registers into the stack.
• POPA − Used to get words from the stack to all registers.
• XCHG − Used to exchange the data from two locations.
• Instructions for input and output port transfer
• IN − Used to read a byte or word from the provided port to the accumulator.
• OUT − Used to send out a byte or word from the accumulator to the provided port.
• Instructions to transfer the address
• LEA − Used to load the address of operand into the provided register.
• LDS − Used to load DS register and other provided register from the memory
• LES − Used to load ES register and other provided register from the memory.
• Instructions to transfer flag registers
• LAHF − Used to load AH with the low byte of the flag register.
• SAHF − Used to store AH register to low byte of the flag
register.
• PUSHF − Used to copy the flag register at the top of the stack.
• POPF − Used to copy a word at the top of the stack to the flag
register.
Arithmetic Instructions
• These instructions are used to perform arithmetic operations like addition, subtraction,
multiplication, division, etc.
• Following is the list of instructions under this group −
• Instructions to perform addition
• ADD − Used to add the provided byte to byte/word to word.
• ADC − Used to add with carry.
• INC − Used to increment the provided byte/word by 1.
• AAA − Used to adjust ASCII after addition.
• DAA − Used to adjust the decimal after the addition/subtraction operation.
• Instructions to perform subtraction
• SUB − Used to subtract the byte from byte/word from word.
• SBB − Used to perform subtraction with borrow.
• DEC − Used to decrement the provided byte/word by 1.
• NPG − Used to negate each bit of the provided byte/word and add 1/2’s complement.
• CMP − Used to compare provided byte/word.
• AAS − Used to adjust ASCII codes after subtraction.
• DAS − Used to adjust decimal after subtraction.
• Instruction to perform multiplication
• MUL − Used to multiply unsigned byte by byte/word by word.
• IMUL − Used to multiply signed byte by byte/word by word.
• AAM − Used to adjust ASCII codes after multiplication.
• Instructions to perform division
• DIV − Used to divide the unsigned word by byte or unsigned double
word by word.
• IDIV − Used to divide the signed word by byte or signed double
word by word.
• AAD − Used to adjust ASCII codes after division.
• CBW − Used to fill the upper byte of the word with the copies of sign
bit of the lower byte.
• CWD − Used to fill the upper word of the double word with the sign
bit of the lower word.
• Bit Manipulation Instructions
• These instructions are used to perform operations where data bits are involved, i.e.
operations like logical, shift, etc.
• Following is the list of instructions under this group −
• Instructions to perform logical operation
• NOT − Used to invert each bit of a byte or word.
• AND − Used for adding each bit in a byte/word with the corresponding bit in another
byte/word.
• OR − Used to multiply each bit in a byte/word with the corresponding bit in another
byte/word.
• XOR − Used to perform Exclusive-OR operation over each bit in a byte/word with the
corresponding bit in another byte/word.
• TEST − Used to add operands to update flags, without affecting operands.
• Instructions to perform shift operations
• SHL/SAL − Used to shift bits of a byte/word towards left.
• SHR − Used to shift bits of a byte/word towards the right.
• SAR − Used to shift bits of a byte/word towards the right and
copy the old MSB into the new MSB.
• Instructions to perform rotate operations
• ROL − Used to rotate bits of byte/word from MSB to LSB and to Carry Flag [CF].
• ROR − Used to rotate bits of byte/word from LSB to MSB and to Carry Flag [CF].
• RCR − Used to rotate bits of byte/word from LSB to CF and CF to MSB.
• RCL − Used to rotate bits of byte/word from MSB to CF and CF to LSB.
String Instructions
• String is a group of bytes/words and their memory is always allocated in a sequential
order.
• Following is the list of instructions under this group −
• REP − Used to repeat the given instruction till CX ≠ 0.
• REPE/REPZ − Used to repeat the given instruction until CX = 0 or zero flag ZF = 1.
• REPNE/REPNZ − Used to repeat the given instruction until CX = 0 or zero flag ZF = 1.
• MOVS/MOVSB/MOVSW − Used to move the byte/word from one string to another.
• COMS/COMPSB/COMPSW − Used to compare two string bytes/words.
• INS/INSB/INSW − Used as an input string/byte/word from the I/O port to the provided
memory location.
• OUTS/OUTSB/OUTSW − Used as an output string/byte/word from the provided
memory location to the I/O port.
• SCAS/SCASB/SCASW − Used to scan a string and compare its byte with a byte in AL
or string word with a word in AX.
• LODS/LODSB/LODSW − Used to store the string byte into AL or string word into AX.
Program Execution Transfer Instructions (Branch and Loop Instructions)

• These instructions are used to transfer/branch the

instructions during an execution. It includes the
following instructions −
• Instructions to transfer the instruction during an
execution without any condition −
• CALL − Used to call a procedure and save their return
address to the stack.
• RET − Used to return from the procedure to the main
program.
• JMP − Used to jump to the provided address to proceed
to the next instruction
• Instructions to transfer the instruction during an execution with some conditions −
• JA/JNBE − Used to jump if above/not below/equal instruction satisfies.
• JAE/JNB − Used to jump if above/not below instruction satisfies.
• JBE/JNA − Used to jump if below/equal/ not above instruction satisfies.
• JC − Used to jump if carry flag CF = 1
• JE/JZ − Used to jump if equal/zero flag ZF = 1
• JG/JNLE − Used to jump if greater/not less than/equal instruction satisfies.
• JGE/JNL − Used to jump if greater than/equal/not less than instruction satisfies.
• JL/JNGE − Used to jump if less than/not greater than/equal instruction satisfies.
• JLE/JNG − Used to jump if less than/equal/if not greater than instruction satisfies.
• JNC − Used to jump if no carry flag (CF = 0)
• JNE/JNZ − Used to jump if not equal/zero flag ZF = 0
• JNO − Used to jump if no overflow flag OF = 0
• JNP/JPO − Used to jump if not parity/parity odd PF = 0
• JNS − Used to jump if not sign SF = 0
• JO − Used to jump if overflow flag OF = 1
• JP/JPE − Used to jump if parity/parity even PF = 1
• JS − Used to jump if sign flag SF = 1
Processor Control Instructions
• These instructions are used to control the processor action by setting/resetting the flag
values.
• Following are the instructions under this group −
• STC − Used to set carry flag CF to 1
• CLC − Used to clear/reset carry flag CF to 0
• CMC − Used to put complement at the state of carry flag CF.
• STD − Used to set the direction flag DF to 1
• CLD − Used to clear/reset the direction flag DF to 0
• STI − Used to set the interrupt enable flag to 1, i.e., enable INTR input.
• CLI − Used to clear the interrupt enable flag to 0, i.e., disable INTR input.
Iteration Control Instructions
• These instructions are used to execute the given instructions for number of times.
Following is the list of instructions under this group −
• LOOP − Used to loop a group of instructions until the condition satisfies, i.e., CX = 0
• LOOPE/LOOPZ − Used to loop a group of instructions till it satisfies ZF = 1 & CX = 0
• LOOPNE/LOOPNZ − Used to loop a group of instructions till it satisfies ZF = 0 & CX =
0
• JCXZ − Used to jump to the provided address if CX = 0
• Interrupt Instructions
• These instructions are used to call the interrupt during program
execution.
• INT − Used to interrupt the program during execution and
calling service specified.
• INTO − Used to interrupt the program during execution if OF =
1
• IRET − Used to return from interrupt service to the main
program
 A D D RE SS IN G MO D E S IN 8 0 8 6
MIC RO P R O C E SS O R

• The way of specifying data to be operated by an instruction is known

as addressing modes.
Types of addressing modes
1.Register mode – In this type of addressing mode both the operands
are registers.
Example:
MOV AX, BX
XOR AX, DX
ADD AL, BL
2. Immediate mode – In this type of addressing mode the source operand is a 8
bit or 16 bit data. Destination operand can never be immediate data.
Example:
MOV AX, 2000
MOV CL, 0A
ADD AL, 45
AND AX, 0000
Note that to initialize the value of segment register a register is required.
To initialize the value of a segment register, a general-purpose register is typically
required to first load the desired segment value. The value is then transferred
from the general-purpose register to the segment register.
MOV AX, 2000
MOV CS, AX
3) Displacement or direct mode – In this type of addressing mode the effective
address is directly given in the instruction as displacement.
Example:
• MOV AX, [DISP]
• MOV AX, [0500]

4) Register indirect mode – In this addressing mode the effective address is in SI, DI or
BX.

• MOV AX, [DI]

• ADD AL, [BX]
• MOV AX, [SI]
5) Based indexed mode – In this the effective address is sum of base register and
index register.
Base register: BX, BP
Index register: SI, DI

The physical memory address is calculated according to the base register.

Example:
MOV AL, [BP+SI]
MOV AX, [BX+DI]
6) Indexed mode – In this type of addressing mode the effective address is sum of
index register and displacement.
Example:
MOV AX, [SI+2000]
MOV AL, [DI+3000]

7) Based mode – In this the effective address is the sum of base register and
displacement.
Example:
MOV AL, [BP+ 0100]
8) Based indexed displacement mode – In this type of addressing
mode the effective address is the sum of index register, base register and
displacement.
Example:
MOV AL, [SI+BP+2000]
• 9) String mode – This addressing mode is related to string instructions. In
this the value of SI and DI are auto incremented and decremented depending
upon the value of directional flag.
Example:
• CLD ; Clear the Direction Flag to increment SI and DI
• MOV SI, source ; Initialize SI to point to the source string
• MOV DI, destination ; Initialize DI to point to the destination string
• MOV CX, length ; Initialize CX to the length of the string
• REP MOVSB ; Move CX bytes from [SI] to [DI]
• CLD clears the Direction Flag, setting it to zero, which causes SI and DI to be incremented after each
MOVSB operation.

• MOV SI, source sets the source index register SI to point to the beginning of the source string.

• MOV DI, destination sets the destination index register DI to point to the beginning of the destination string.

• MOV CX, length loads the count register CX with the number of bytes to move.

• REP MOVSB repeats the MOVSB instruction CX times, moving the string byte by byte from the address in
SI to the address in DI, while automatically incrementing SI and DI.
10) Input/Output mode – This addressing mode is related with input output operations.
Example:

IN AL, 45
This instruction reads a byte from port 45 and places it into the AL register.

OUT 50, AL
This instruction sends a byte from the AL register to port 50.
11) Relative mode –
the relative addressing mode is used to determine the effective address by adding a
constant value (the offset) to the current value of the instruction pointer (IP).

In the relative addressing mode, the effective address is calculated as follows:

Effective Address = IP + Offset

The instruction pointer (IP) is currently at address 0x0100.

We have the instruction JNZ 0x08, which means we want to jump to an address that is 8
bytes ahead
• Current IP: Assume IP is 0x0100.
• Offset: The 8-bit offset is 0x08.

Calculate New IP:

• New IP=Current IP+Offset

• New IP=0𝑥0100+0𝑥08=0𝑥0108
 8086 INSTRUCTION FORMATS

These formats dictate how the CPU interprets the data to perform specific operations
Components of 8086 Instruction Formats
1.Opcode: Operation code specifying the operation to be performed.
2.D bit: Direction bit, indicates the direction of data transfer.
3.W bit: Width bit, indicates whether the operation is on a byte or a word.
4.Mod: Mode field, specifies the addressing mode.
5.Reg: Register field, specifies the register.
6.R/M: Register/Memory field, specifies the register or memory location.
7.Displacement: Optional field, used for certain addressing modes.
8.Data: Immediate data to be used by the instruction.
Breakdown of Components
1) Opcode: Operation code specifying the operation to be performed.
For MOV, the opcode is 100010.

2) D bit: Direction bit, indicates the direction of data transfer.

1 means the destination is a register (AX).
0 means the source is a register.

3) Displacement: Optional field, used for certain addressing modes.

1234H (16-bit displacement)

4) Data: Immediate data to be used by the instruction.

Not applicable in this instruction.
5) W Bit (Width Bit)
The W bit determines whether the operation is on a byte (8 bits) or a word (16 bits).
0: Byte operation (8 bits)
1: Word operation (16 bits)

Example:
MOV AL, [BX+SI+1234H]: Since AL is an 8-bit register, the W bit would be 0.
MOV AX, [BX+SI+1234H]: Since AX is a 16-bit register, the W bit would be 1.
In our instruction MOV AX, [BX+SI+1234H], the W bit is 1 because AX is a 16-bit register, and
the operation involves moving a word (16 bits).
6) Mod Field (Mode Field)
The Mod field specifies the addressing mode and determines the presence and size of any
displacement.

The Mod field is 2 bits long and has the following values:

• 00: No displacement, or a 16-bit direct address if the R/M field is 110.

• 01: 8-bit displacement.
• 10: 16-bit displacement.
• 11: Register addressing mode (no displacement).
Examples:
• If Mod is 00 and R/M is not 110, the effective address is computed using only the base and index
registers without any displacement.
• If Mod is 01, an 8-bit displacement follows the ModR/M byte.
• If Mod is 10, a 16-bit displacement follows the ModR/M byte.
• If Mod is 11, the R/M field specifies a register, and no memory access occurs.
• In our instruction MOV AX, [BX+SI+1234H], the Mod field is 10 because we have a 16-bit
displacement.
7) Reg Field (Register Field)
The Reg field specifies the register involved in the operation. The field is 3 bits long and has
the following values for 16-bit registers:
• 000: AX
• 001: CX
• 010: DX
• 011: BX
• 100: SP
• 101: BP
• 110: SI
• 111: DI
In our instruction MOV AX, [BX+SI+1234H], the Reg field is 000, specifying the AX register.
8) R/M Field :
•The field is 3 bits long .
The R/M bits specify Operand (when Operand (when
either a register or a R/M Bits
MOD ≠ 11) MOD = 11)
memory location
(depending on the MOD 000 [BX + SI] AX
bits). If MOD is set to 001 [BX + DI] CX
memory mode (00, 01,
or 10), the R/M bits 002 [BP + SI] DX
specify the memory 003 [BP + DI] BX
addressing mode. If
MOD is set to register 004 [SI] SP
mode (11), the R/M bits 005 [DI] BP
specify the register.
006 Direct Address SI
007 [BX] DI
Instruction: MOV AX, [BX+SI+1234H]
• Opcode: For MOV, the opcode is 100010.
• D bit: 1, meaning the destination is a register (AX).
• W bit: 1, meaning it is a word operation (16 bits).
• Mod field: 10, meaning there is a 16-bit displacement.
• Reg field: 000, specifying AX.
• R/M field: 000, specifying [BX+SI].
• Displacement: 1234H (16-bit displacement).
Binary Representation
• Opcode + D + W: 10001011
• Mod + Reg + R/M: 10000000
• Displacement: 00010010 00110100 (which is 1234H in binary)
• Combining these: 10001011 10000000 00010010 00110100
 INSTRUCTION TYPES BASED ON NUMBER OF OPERANDS
An instruction must include an opcode and Zero or more Operands in one of the
addressing mode.
Three Address Instruction Format
Two Address Instruction Format
One Address Instruction Format
Zero Address Instruction Format
• Three Address Instruction Format
Ex: ADD R1,R2,R3
R1R2+R3
Ex: ADD A,B,C
M[A]M[B]+M[C]
• Two Address Instruction Format
Ex: ADD R1,R2;
R1R1+R2
Ex: ADD A, B;
M[A]M[A]+M[B]
• One Address Instruction Format
Ex: ADD R1
ACAC+R1
• Zero Address Instruction Format
Ex: PUSH
PUSH
ADD
POP
 A = (B + C) * D

WRITE THE ABOVE EXPRESSION IN 3,2,1,0-ADDRESS

I N S T R U C T I O N F O R M AT S

3-address:
• ADD T1, B, C ; T1 = B + C
• MUL A, T1, D ; A = T1 * D
2-address:
• MOV T1, B ; T1 = B
• ADD T1, C ; T1 = T1 + C
• MUL T1, D ; T1 = T1 * D
• MOV A, T1 ; A = T1
1-address:
• LOAD B ; Acc = B
• ADD C ; Acc = Acc + C
• MUL D ; Acc = Acc * D
• STORE A ; A = Acc

0-address:
• PUSH B ; Push B onto the stack
• PUSH C ; Push C onto the stack
• ADD ; Pop two values, add, and push the result
• PUSH D ; Push D onto the stack
• MUL ; Pop two values, multiply, and push the result
• POP A ; Pop the result from the stack into A