Memory map comparison

The 412 RTC changes don't appear to be taking effect, after building and inspecting the module. Any ideas?

I guess the problem is with the _include: stm32l4x2.yaml at the end; I suspect that will overwrite things you don't want to overwrite, such as _svd, in the parent YAML. I don't think it's intended that you'd import a top-level YAML into another top-level YAML, so that's my guess as to the problem. Try just including the relevant bits of that file directly?

By the way, instead of changing the SVD zip file (which should ideally be exactly as-downloaded from ST), you can modify extract.sh to add a new copy line to create a new identical SVD for L412, like https://github.com/stm32-rs/stm32-rs/blob/master/svd/extract.sh#L9

Done! That sorted it. Marking as draft for now; running into empty built-libs on L4x3, L412, and WB55, for reasons I haven't yet determined.

Fixed the not-building problems; various syntax errors, eg access read instead of read-only. Currently, some of the L412 RTC reg changes are taking place, but not others, upon generated-module inspection. I wonder if this is an order-error, eg if a reg is added to a place that's not yet freed from a later-modified reg. (?)

For example, CR is showing up at its original location of 0x08 in the generated lib, despite this line:

  CR:
    _modify:
      addressOffset: 0x18
    _add:
    ...

Fixed most L412 RTC problems; syntax error re ordering of _modify and the reg name. Currently looks good, except 3 out of 4 of the added regs (at the end of the block) are not adding. Maybe need to increase size of reg block somehow?

Broke git again

#576