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Should be 0x4000_6800. The current one is the USB SRAM address.
L4x2 PAC is correct. L4x1 PAC doesn't have USB. L4x6 PAC uses OTG. L4x5 PAC also has this error, but if I understand correctly, shouldn't even have this periph since it uses the OTG periph.
To fix, could copy + paste L4x2 USB module. Should be the same.
The text was updated successfully, but these errors were encountered:
580: L4 and WB fixes r=adamgreig a=David-OConnor
Fixes#555, #563, #565, #567, #570, #572, and #575.
See #578; "unrecoverable" git errors.
Not currently working:
- Last 3 (by address) added L412 RTC regs are not adding
- WB HSEM and IPCC renamed regs are not changing
- BCDR field added to USB
Removed the L4x2 `USB_FS` rename to `USB`: the RM calls it `USB_FS`. Previous justification, from a code comment:
> we call the resulting peripheral `USB` instead of `USB-FS` to be aligned with `mvirkkunen/stm32f103-usb`
The *peripheral* is called `USB`; the interrupt is called `USB_FS`.
Co-authored-by: David O'Connor <david.alan.oconnor@gmail.com>
Co-authored-by: Adam Greig <adam@adamgreig.com>
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https://github.com/stm32-rs/stm32-rs-nightlies/blob/master/stm32l4/src/stm32l4x3/mod.rs#L1347
Should be 0x4000_6800. The current one is the USB SRAM address.
L4x2 PAC is correct. L4x1 PAC doesn't have USB. L4x6 PAC uses OTG. L4x5 PAC also has this error, but if I understand correctly, shouldn't even have this periph since it uses the OTG periph.
To fix, could copy + paste L4x2 USB module. Should be the same.
The text was updated successfully, but these errors were encountered: