Parallel Computing

3
rd International Conference on Data Mining & Machine Learning (DMML 2022) will act as
a major forum for the presentation of innovative ideas, approaches, developments, and research
projects in the areas of Data Mining and Machine Learning. It will also serve to facilitate the
exchange of information between researchers and industry professionals to discuss the latest issues
and advancement in the area of Big Data and Machine Learning.
Authors are solicited to contribute to the conference by submitting articles that illustrate research
results, projects, surveying works and industrial experiences that describe significant advances in
Data Mining and Machine Learning.

OpenMP parallelization of multiple precision Taylor series method is proposed. A very good parallel performance scalability and parallel efficiency inside one computation node of a CPU-cluster is observed. We explain the details of the parallelization on the classical example of the Lorentz equations. The same approach can be applied straightforwardly to a large class of chaotic dynamical systems.

Page 1. A Parallel Genetic Algorithm for Rule Discovery in Large Databases Dieferson Luis Alves de Araujo' , Heitor S. Lopes', Alex A. Freitas2 CEFET-PR - Centro Federal de EducaGBo Tecnol6gica do Paranh CPGEI - Curso ...

Task intensive electronic control units (ECUs) in automotive domain, equipped with multicore processors , real time operating systems (RTOSs) and various application software, should perform efficiently and time deterministically. The parallel computational capability offered by this multicore hardware can only be exploited and utilized if the ECU application software is parallelized. Having provided with such parallelized software, the real time operating system scheduler component should schedule the time critical tasks so that, all the computational cores are utilized to a greater extent and the safety critical deadlines are met. As original equipment manufacturers (OEMs) are always motivated towards adding more sophisticated features to the existing ECUs, a large number of task sets can be effectively scheduled for execution within the bounded time limits. In this paper, a hybrid scheduling algorithm has been proposed, that meticulously calculates the running slack of every task and estimates the probability of meeting deadline either being in the same partitioned queue or by migrating to another. This algorithm was run and tested using a scheduling simulator with different real time task models of periodic tasks. This algorithm was also compared with the existing static priority scheduler, which is suggested by Automotive Open Systems Architecture (AUTOSAR). The performance parameters considered here are, the % of core utilization, average response time and task deadline missing rate. It has been verified that, this proposed algorithm has considerable improvements over the existing partitioned static priority scheduler based on each performance parameter mentioned above.

The frenetic development of the current architectures places a strain on the current state-of-the-art programming environments. Harnessing the full potential of such architectures has been a tremendous task for the whole scientific computing community.

When solving the problems based on more than two variables most of the time relative changes on the variables need to be calculated. The degree of dependency among variables and number of variable quantities make solution finding more complex. It is very obvious to get the help of differential equations. When we deal with the functions frequently changing by nature, so it is highly likely to find local maxima, local minima, slope of tangent and value of the function at given point. Finding solution is not a single process but a set of processes where some binary operations, repetitions of the operations, checking the consistency of function within the interval etc take place. Here it becomes very important that the time taken to execute the problem of differential equation must be least. Thus the needs of pipelining, parallel processing, speculative computation etc become crucial factor. So requirement of solution of differential equations become very necessary. The degree of equation, complexity of equation, no of variables etc are the parameters those play very important roles during the solution process. When this task is assigned to serial processors the time taken to solve a problem is greater than the time taken by the parallel processors to do the same task. Here in this research we are calculating the time taken by serial processors and by parallel processors too. Although entry of vector processors and array processors improved the performance very much but since performance is the subject to frequently improvement. So putting that context in mind our study has tried to minimize the time taken for solving the differential equation by dividing a big problem in small ones in such a way so that dependency for data among processors i.e. communication will be very less. Means research has tried to improve the ratio of computation over communication ratio.

Cluster grid computing is considered a promising alternative to grid computing, since it uses networked computing resources widely available within the so-called "departmental" organizations as high performance/cost ratio computing platforms. ePVM is an extension of the well-known PVM programming system, and has been purposely developed to run large-scale PVM applications on cluster grids spanning across multidomain, non-routable networks. To this end, ePVM has been also provided with a parallel file system that enables the enormous volumes of data usually generated by large-scale parallel applications to be managed and distributed among the multiple disks available within cluster grids. In particular, the parallel file system, called ePIOUS, is an optimized implementation of the PIOUS parallel file system under ePVM. The implementation has been developed taking into account the two-level physical network topology characterizing the cluster grids built by ePVM. Furthermore, in order not to penalize the application performance, ePIOUS has been also provided with a file caching service that is able to speed up file accesses across clusters.

Adaptive hp ®nite element methods (FEM), in which both grid size h and local polynomial order p are dynamically altered, generate computations that require dynamic and irregular patterns of data storage, access and computation, making their parallelization very dicult. We show here that such applications can be parallelized easily if we use a good spatially local ordering of all data for organizing storage, distribution and access, and schedule computation using a``owner-computes'' rule. This ordering results in a global index space which can be partitioned to distribute the data, locally used in hashing schemes and B-trees for the necessary dynamic memory management, and used in designing ecient solution schemes. Ó

Thermal imagery is a substitute of visible imagery for face detection due to its property of illumination invariance with the variation of facial appearances. This paper presents an effective method for human face detection in thermal imaging. The concept of histogram plot has been used in the feature extraction process and later in face detection. Techniques like thresholding, object boundary analysis, morphological operation etc. have been performed on the images to ease the process of detection. In order to enhance the performance of the algorithm and to reduce the computation time, parallelism has been achieved using Message Passing Interface (MPI) model. Overall, the proposed algorithm showed a higher level of accuracy and less complexity time of 0.11 seconds in the parallel environment as compared to 0.20 seconds in a serial environment.

I) By expressing the contents of a knowledge base as fomnal models, you can synthesize systems in real-time payallel-compu ting environments. The authors apply their technique t o a signalprocessing system. challenging problems in software engineering is to build high-performance reactive systemssystems characterized by continuous interaction with their environment. T h e behavior of such systems, which are found in process monitoring and control and real-time signal-processing, is typically complex, concurrent, and nondeterministic, tnaking them difficult to build.

The advent of parallel machines brought about a controverse in the domain of parallel algorithms: is it worth to conceive parallel algorithmg for NP-complete problems? In this work we present a parallel implementation of a sequential algorithm from Horowitz and Sahni for the knapsack problem on a FPS T20. Our aim is to establish some experimental results in order to allow comparisons for forthcoming works. The results show that the development of theory and technology yields the computation tractability of very large knapsack problems.

As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been used to improve instruction and data cache performance for virtually indexed caches by mapping code and data with temporal locality to different cache blocks. In this

File and block storage are well-defined concepts in computing and have been used as common components of computer systems for decades. Big data has led to new types of storage. The predominant data model in cloud storage is the object-based storage and it is highly successful. Object stores follow a simpler API with get() and put() operations to interact with the data. A wide variety of data analysis software have been developed around objects using their APIs. However, object storage and traditional file storage are designed for different purpose and for different applications. Organizations maintain file-based storage clusters and a high volume of existing data are stored in files. Moreover, many new applications need to access data from both types of storage. In this paper, we first explore the key differences between object-based and the more traditional file-based storage systems. We have designed and implemented several file-to-object mapping algorithms to bridge the semantic ...

Processor failures in post-petascale parallel computing platforms are common occurrences. The traditional fault-tolerance solution, checkpoint-rollback-recovery, severely limits parallel efficiency. One solution is to replicate application processes so that a processor failure does not necessarily imply an application failure. Process replication, combined with checkpoint-rollbackrecovery, has been recently advocated. We first derive novel theoretical results for Exponential failure distributions, namely exact values for the Mean Number of Failures To Interruption and the Mean Time To Interruption. We then extend these results to arbitrary failure distributions, obtaining closed-form solutions for Weibull distributions. Finally, we evaluate process replication in simulation using both synthetic and real-world failure traces so as to quantify average application makespan. One interesting result from these experiments is that, when process replication is used, application performance is not sensitive to the checkpointing period, provided that that period is within a large neighborhood of the optimal period. More generally, our empirical results make it possible to identify regimes in which process replication is beneficial.

In this work we present a programmable and reconfigurable
single instruction multiple data (SIMD) visual processor
based on the S-CNN architecture, namely, the Simplicial CNN Digital Visual Processor (SCDVP), oriented to high-performance low level image processing. The cells in the array have a selectable
neighborhood configuration and several registers, which provide
the chip with extended spatial and temporal processing capabilities, in particular optical flow. A prototype 64 64 cell chip with two program memories and a column adder was fabricated in a 90 nm technology, which running at 133 MHz delivers 105.5 GOPS.
The calculation at the cell level is performed with time coded signals and the program memory is located outside the array. This
produces a very efficient realization in terms of area: 53.8 GOPS
per mm , which outperforms all results reported so far. We show
that even after normalization, to account for technology scaling,
the proposed architecture is the most efficient among all reported
digital processors. Computation performance to power ratio also
exceeds all previous results with 817.8 GOPS/W. Experimental results of the working chip are reported.

As Reconfigurable Computing (RC) systems become more common place among application scientists and developers, a mechanism for porting existing work to other platforms is increasingly desirable. The constantly changing technologies and architectures in today's RC platforms present a challenge to any developer wishing to move from an early development system to a newer system. Many new RC systems do not offer a complete development environment, and often requires the end user to choose design tools, languages, and hardware library packages that are compatible with their system. Rewriting basic cores for each platform can be a daunting task. Unlike the High Performance Parallel Computing community, which provides highly optimized and portable open source libraries to its community, to the best of our knowledge such an effort does not exist for the RC community. In this work we propose a methodology for developing RC libraries and present the challenges involved in each step. This paper also presents work done in developing an extensive portable library using the SRC6, Cray XD1, and SGI RC100 platforms as a case study.

The implementation and performance of the multidimensional Fast Fourier Transform (FFT) on a distributed memory Beowulf cluster is examined. We focus on the three-dimensional (3D) real transform, an essential computational component of Galerkin and pseudospectral codes. The approach studied is a 1D domain decomposition algorithm that relies on communication-intensive transpose operation involving P processors. Communication is based upon the standard portable message passing interface (MPI). We show that 1=P scaling for execution time at ®xed problem size N 3 (i.e., linear speedup) can be obtained provided that (1) the transpose algorithm is optimized for simultaneous block communication by all processors; and (2) communication is arranged for non-overlapping pairwise communication between processors, thus eliminating blocking when standard fast ethernet interconnects are employed. This method provides the basis for implementation of scalable and ecient spectral method computations of hydrodynamic and magneto-hydrodynamic turbulence on Beowulf clusters assembled from standard commodity components. An example is presented using a 3D passive scalar code.

Commodity graphics hardware has seen incredible growth in terms of performance, programmability, and arithmetic precision. Even though these trends have been primarily driven by the entertainment industry, the price-to-performance ratio of graphics processors (GPUs) has attracted the attention of many within the high-performance computing community. While the performance of the GPU is well suited for computational science, the programming interface, and several hardware limitations, have prevented their wide adoption. In this paper we present Scout, a data-parallel programming language for graphics processors that hides the nuances of both the underlying hardware and supporting graphics software layers. In addition to general-purpose programming constructs, the language provides extensions for scientific visualization operations that support the exploration of existing or computed data sets.

In this paper a two-phase filter for removing "salt and pepper" noise is proposed. In the first phase, an adaptive median filter is used to identify the set of the noisy pixels; in the second phase, these pixels are restored according to a regularization method, which contains a data-fidelity term reflecting the impulse noise characteristics. The algorithm, which exhibits good performance both in denoising and in restoration, can be easily and effectively parallelized to exploit the full power of multi-core CPUs and GPGPUs; the proposed implementation based on the FastFlow library achieves both close-to-ideal speedup and very good wall-clock execution figures.

since 1978 was dealing with problems of concurrency for cluster, parallel, distributed computers. every mobile hangs, every computer, including super-super delays and wait, making billions of circles of waiting the event to synchronise. I recently in my archives have found a lecture that was requested by BCS colleagues, as well as one big US Computer conference  orgcommitee. Part of it was included in our second edition of the Software Design for Resilient Computer Systems. But Book is expensive and students can't buy. Thus this lecture notes worth to publish on Academia.

Over the internet today, communication and computing environments are significant aspect for everyone. Then in order to secure our communication from the unauthorized access the network and different enemies we should apply biometric identification system. Facial recognition is one of the best biometric physiological techniques to detect and recognize human faces. Then, by assessing/reading different articles, journals, tutorials and online guides; this paper provides a brief academically introduction/survey about biometric identification techniques and we proposed a high performance autonomous Parallel Face Detection and Recognition using artificial neural network with Eigen face producer algorithm and in order to adapt and learn autonomously its environment we design and apply reinforcement learning algorithm based on the low of effect. In addition to that, in this project we implement a deep learning concepts integrated with parallel computing using C programming language of P-thread and compares with a sequential algorithm.

The state-of-the-art in high-performance deep learning today is primarily driven by manually developed libraries optimized and highly tuned by expert programmers using lowlevel abstractions with significant effort. This effort is often repeated for similar hardware and future ones. In this work, we pursue and evaluate the more modular and reusable approach of using compiler IR infrastructure to generate libraries by encoding all the required optimizations as a sequence of transformations and customized passes on an IR. We believe that until the recent introduction of MLIR (Multi-level intermediate representation), it had been hard to represent and transform computation at various levels of abstraction within a single IR. Using the MLIR infrastructure, we build a transformation and lowering pipeline to automatically generate near-peak performance code for matrix-matrix multiplication (matmul) as well as matmul fused with simple pointwise operators targeting tensor cores on NVIDIA GPUs. On a set of problem sizes ranging from 256 to 16384, our performance evaluation shows that we can obtain performance that is 0.95× to 1.19× and 0.80× to 1.60× of cuBLAS for FP32 and FP16 accumulate respectively on NVIDIA's Ampere based Geforce 3090 RTX. Furthermore, by allowing the fusion of common pointwise operations with matrix-matrix multiplication, we obtain performance ranging from 0.95× to 1.67× of a cuBLAS-based implementation. Additionally, we present matmul-like examples such as 3-d contraction and batched matmul, which the pipeline can efficiently handle while providing competitive performance. We believe that these results motivate further

Leveraging the power of nowadays graphics processing units for robust power grid simulation remains a challenging task. Existing preconditioned iterative methods that require incomplete matrix factorizations can not be effectively accelerated on GPU due to its limited hardware resource as well as data parallel computing. This work presents an efficient GPU-based multigrid preconditioning algorithm for robust power grid analysis. An ELL-like sparse matrix data structure is adopted and implemented specifically for power grid analysis to assure coalesced GPU device memory access and high arithmetic intensity. By combining the fast geometrical multigrid solver with the robust Krylov-subspace iterative solver, power grid DC and transient analysis can be performed efficiently on GPU without loss of accuracy (largest errors < 0.5 mV). Unlike previous GPU-based algorithms that rely on good power grid regularities, the proposed algorithm can be applied for more general power grid structures. Experimental results show that the DC and transient analysis on GPU achieves more than 25X speedups over the best available CPU-based solvers. An industrial power grid with 10.5 million nodes can be accurately solved in 12 seconds.

This work introduces a duplication-based deadlock resolution (DBDR) scheme in clustered directed acyclic graphs using three methods for duplicating a task. The scheme can be embedded within any clustering technique for handling synchronous communication with an added cost of OðjEj þ ðjV jÞ 2 Þ. The main objective of task duplication, besides to resolving deadlocks, has been the reduction of communication cost and the improvement in the program computation to communication ratio. The embedding of the DBDR scheme within a clustering technique is shown along with the analysis of its complexity. A comparison between deadlock resolution strategy using the DBDR and deadlock avoidance strategy using the same clustering technique is given.

The amount of spark energy deposited into the combustion chamber is key to an optimum ignition as one can end up with mis®res when this energy is low or with other undesired eects on engine performance and byproducts when it is high. Experimentally, up to now, no one has been able to correlate the combustion outcome accurately to the spark parameters in a controllable way. Theoretical investigation and computer modeling is leading to a better understanding of how spark¯ames propagate. A new computational approach to ignition dynamics is presented here for spark-ignited (SI) engine combustion simulations. Our computational model, using the MPI communication library, attempts to solve temporal and spatial equations of the electromagnetic (EM) equations in conjunction with the well-known Navier-Stokes equations of the standard KIVA-3 engine code. The interaction between the gas and the¯ame (plasma) kernel in the spark region is computed through the momentum and energy exchange between these two ®elds. Preliminary results show a distinct spatial distribution of physical quantities at the¯ame front and within the in¯ammation zone. A slight change in the spark discharge current has signi®cant impact on the combustion and emissions. Enhanced accuracy of spark ignition modeling might help us better compute the early¯ame propagation and its in¯uence on the cyclic variability of engines, potentially leading to design of new spark plugs.

Parallelising ray tracing with a data parallel approach allows rendering of arbitrarily large models, but the inherent load imbalances may lead to severe inefficiencies. To compensate for the uneven load distribution, demand-driven tasks may be split off and scheduled to processors that are less busy. We propose a hybrid scheduling algorithm which brings tasks and data together according to coherence between rays. The amount of demand-driven versus dataparallel tasks is a function of the coherence between rays and the amount of imbalance in the basic data-parallel load. Processing power, communication and memory are three resources which should be evenly used. Our current implementation is assessed against these requirements, showing good scalability and very little communication at the cost of a slightly larger memory overhead.

At Queen Mary, University of London, we have over twenty years of experience in Parallel Computing Applications, mostly on &quot;massively parallel systems&quot;, such as the Distributed Array Processors (DAPs). The applications in which we were involved included design of numerical subroutine libraries, Finite Element software, graphics tools, the physics of organic materials, medical imaging, computer vision and more recently, Financial modelling. Two of the projects related to the latter are described in this paper, namely Portfolio Optimisation and Financial Risk Assessment.

Registration of partial scan data sets is still a challenge for today's CAD systems and CAD system users. Many of the known methods rely on user interaction or feature recognition. For non-regular users this is too time consuming and errorprone. The paper describes a method to register partial scan data by fitting a large fat tetrahedron (LFT) in the target point cloud. The method is computational intensive and in its CPU implementation not fit for interactive use. The independency of the points in the data-sets makes massive parallel computing applicable. The paper describes the implementation of the method on a GTX260 GPU using the CUDA programming environment. A performance gain of 10 times compared to a conventional CPU implementation was achieved, which can be further improved by implementing a pre selection method of the result, bringing interactive use in range after further optimization.

Image compression technique is used in many applications for example, satellite imaging, medical imaging, video where the size of the iamge requires more space to store, in such application image compression effectively can be used. There are two types in image compression techniques Lossy and Lossless comression. Both these techniques are used for compression of images, but these techniques are not fast. The image compression techniques both lossy and lossless image compression techniques are not fast, they take more time for compression and decompression. For fast and efficient image compression a parallel computing technique is used in matlab. Matlab is used in this project for parallel computing of images. In this paper we will discuss Regular image compression technique, three alternatives of parallel computing using matlab, comparison of image compression with and without parallel computing.

Multidimensional scaling (MDS) is a very popular and reliable method used in feature extraction and visualization of multidimensional data. The role of MDS is to reconstruct the topology of an original N-dimensional feature space consisting of M feature vectors in target 2-D (3-D) Euclidean space. It can be achieved by minimization of the error-"stress" function-F(||D-d||), where D and d are the MxM dissimilarity matrices in the original and in the target spaces, respectively. However, the stress function is in general a multimodal and multidimensional function for which the complexity of finding global minimum increases exponentially with the number of data. We employ here a robust heuristics based on discrete particle method enabling interactive visualization of data for various types of stress functions. Nevertheless, due to at least O(M 2) memory and time complexity, the method becomes computationally demanding when applied for interactive visualization of data sets involving M~10 4. We present here efficient parallel algorithms developed for various small and pre-medium computer architectures from single and multi-core processors to GPU and multiprocessor MPI clusters. The timings obtained show that the computational efficiency of CUDA implementation of MDS on a PC equipped with a strong GPU board (Tesla M2050 or GeForce 480) is two times greater than its MPI equivalent run on 10 nodes (10x 2xIntel Xeon X5670 = 120 threads) of a professional multiprocessor cluster (HP SL390). We show also that the hybridized two-level MPI/CUDA implementation run on a small cluster of GPU nodes can additionally provide a linear speed-up.

Scientists, engineers, and statisticians must execute domain-specific application programs many times on large collections of file-based data. This activity requires complex orchestration and data management as data is passed to, from, and among application invocations. Distributed and parallel computing resources can accelerate such processing, but their use further increases programming complexity. The Swift parallel scripting language reduces these complexities by making file system structures accessible via language constructs and by allowing ordinary application programs to be composed into powerful parallel scripts that can efficiently utilize parallel and distributed resources. We present Swift's implicitly parallel and deterministic programming model, which applies external applications to file collections using a functional style that abstracts and simplifies distributed parallel execution.

The aim of this work is to measure the barrier synchronization influence on the overall pevormance of several application programs. In order to do that, we use the MPICH implementation [ I ] version 1.1 of the MPI library. Moreover, we choose two barrier synchronization solutions: the MPICH software solution, i.e. the MPI-Barrier routine, and the TTL-PAPERS hardware solution [ 2 ]. The last one was implemented as a collective operation in MPICH we called MPI-Papers. Finally, we compare the execution time of MPI programs using the MPI-Barrier and MPI-Papers routines. Our testing environment consists of a cluster of 8 Dual Pentium Pro processors interconnected via both IOMb/s ethemet network and a TTL-PAPERS prototype. We use two kinds of MPI programs: test programs that p e~o r m few messages into the network and local calculations, and scientific calculation programs that carry out date exchange and local calculations.

Most methods for calculating the SVD (singular value decomposition) require to ®rst bidiagonalize the matrix. The blocked reduction of a general, dense matrix to bidiagonal form, as implemented in ScaLAPACK, does about one half of the operations with BLAS3. By subdividing the reduction into two stages dense 3 banded and banded 3 bidiagonal with cubic and quadratic arithmetic costs, respectively, we are able to carry out a much higher portion of the calculations in matrix±matrix multiplications. Thus, higher performance can be expected. This paper presents and compares three parallel techniques for reducing a full matrix to banded form. (The second reduction stage is described in another paper [B. Lang, Parallel Comput. 22 (1996) 1±18]). Numerical experiments on the Intel Paragon and IBM SP/1 distributed memory parallel computers demonstrate that the two-stage reduction approach can be signi®cantly superior if only the singular values are required. Ó . This work was partially funded by Deutsche Forschungsgemeinschaft, Gesch aftszeichen Fr 755/6-1 and Fr 755/6-2. 0167-8191/99/$ ± see front matter Ó 1999 Elsevier Science B.V. All rights reserved. PII: S 0 1 6 7 -8 1 9 1 ( 9 9 ) 0 0 0 4 1 -1 parallel computers [1,2,4] and to novel accuracy issues, do most of the work on a full or triangular matrix.

This paper presents a new environment to simulate close-proximity dynamics around rubble-pile asteroids. The code provides methods for modeling the aster-oid's gravity field and surface through granular dynamics. It implements state-of-the-art techniques to model both gravity and contact interaction between particles: 1) mutual gravity as either direct N2 or Barnes-Hut GPU-parallel octree and 2) contact dynamics with a soft-body (force-based, smooth dynamics), hard-body (constraint-based, non-smooth dynamics), or hybrid (constraint-based with compliance and damping) approach. A very relevant feature of the code is its ability to handle complex-shaped rigid bodies and their full 6D motion. Examples of spacecraft close-proximity scenarios and their numerical simulations are shown.

A P-adic Exact Scientific Computational Library (ESCL) for rational matrix operations has been developed over the past few years. The effort has been focusing on converting all rational number operations to integer calculation, and fully taking advantage of the fast integer multiplication of modern computer architectures. In this paper, we report our progress on parallel implementation of P-adic arithmetic by means of a multiple modulus rational system related to the Chinese remainder theorem. Experimental results are given to illustrate computational efficiency.

Structured parallel programming is recognised as a viable and effective means of tackling parallel programming problems. Recently, a set of simple and powerful parallel building blocks (RISC-pb 2 l) has been proposed to support modelling and implementation of parallel frameworks. In this work we demonstrate how that same parallel building block set may be used to implement both general purpose parallel programming abstractions, not usually listed in classical skeleton sets, and more specialized domain specific parallel patterns. We discuss the associated implementation techniques and present experimental evidence of the feasibility and e ciency of the approach. Keywords Algorithmic skeleton, parallel design patterns, programming frameworks, RISC-pb 2 l, parallel building blocks.

L’Homme a utilisé l’algorithmique depuis l’époque des Babyloniens et l’écriture cunéiforme sur les pierres. Avec le français Blaise Pascal en 1642, il a commencé à inventer des machines pour exécuter les algorithmes. Alain Turing en 1937 a présenté une machine
virtuelle intitulée la machine de Turing qui a servi pour la conception d’une architecture de base pour les ordinateurs. La machine RAM a été utilisée par la suite comme modèle de base pour la conception des architectures des ordinateurs. L’évolution technologique lors de la construction des ordinateurs a permis la construction des ordinateurs avec un processeur multi-cœurs ou même des ordinateurs multi-processeurs.
Cet ouvrage cherche à étudier la notion de parallélisme dans la modélisation des architectures des ordinateurs multi-cœurs ou multi-processeurs. Quel est le modèle de l’architecture multi-processeurs ou multi-cœurs optimale ?
En effet, l’objectif de ce document est de fournir au lecteur les outils pour
{ Comprendre l’architecture des machines parallèles ;
{ L’inviter et l’encourager à modéliser une nouvelle architecture pour les machines parallèles ou à faire évoluer une architecture existante ;
{ Etre capable à programmer de manière optimale sur les machines parallèles.
Ainsi, le premier Chapitre sera dédié à introduire la notion de parallélisme et calcul de haute performance afin de familiariser le lecteur aux notions de parallélisme et de le sensibiliser à l’utilité de comprendre les architectures parallèles existantes et de l’inviter à les optimiser et les mieux utiliser en adoptant une programmation adaptée au parallèlisme.
Dans un deuxième Chapitre, nous allons étudier les architectures des machines parallèles.
Le lecteur est invité à une réflexion sur les axes de modéliser de nouvelles architectures plus optimales. Dans le troisième Chapitre, afin de pouvoir exploiter l’évolution technologique des machines parallèles, et de la possibilité de communiquer, par internet, un nombre très grand d’ordinateurs et de téléphones pour résoudre le même problème P, le lecteur sera invité à programmer de manière optimale sur les machines parallèles disponibles.

The need for maximizing the performance of processors opened doors for a new approach which emphasizes parallelism. This paper discusses how various architectures, like Superscalars and VLIWs, implement this parallelism and presents a case study on Intel’s Itanium processor that uses EPIC (Explicitly Parallel Instruction Computing)