Analog Power AM10P10-530D

P-Channel 100-V (D-S) MOSFET

Key Features: PRODUCT SUMMARY

• Low rDS(on) trench technology VDS (V) rDS(on) (mΩ) ID(A)
• Low thermal impedance 530 @ VGS = -10V -6.9
-100
• Fast switching speed 720 @ VGS = -4.5V -6.0

Typical Applications:
• White LED boost converters
• Automotive Systems
• Industrial DC/DC Conversion Circuits

ABSOLUTE MAXIMUM RATINGS (TA = 25°C UNLESS OTHERWISE NOTED)

Parameter Symbol Limit Units
Drain-Source Voltage VDS -100
V
Gate-Source Voltage VGS ±20
a TA=25°C ID
Continuous Drain Current -6.9
A
Pulsed Drain Current b IDM -50
a
Continuous Source Current (Diode Conduction) IS -6.9 A
a T =25°C P
Power Dissipation A D 50 W
Operating Junction and Storage Temperature Range TJ, Tstg -55 to 150 °C

THERMAL RESISTANCE RATINGS

Parameter Symbol Maximum Units
a
Maximum Junction-to-Ambient RθJA 40
°C/W
Maximum Junction-to-Case RθJC 3

Notes
a. Surface Mounted on 1” x 1” FR4 Board.
b. Pulse width limited by maximum junction temperature

© Preliminary 1 Publication Order Number:

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Analog Power AM10P10-530D

Electrical Characteristics

Parameter Symbol Test Conditions Min Typ Max Unit

Static
Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = -250 uA -1 V
Gate-Body Leakage IGSS VDS = 0 V, VGS = ±20 V ±100 nA
VDS = -80 V, VGS = 0 V -1
Zero Gate Voltage Drain Current IDSS uA
VDS = -80 V, VGS = 0 V, TJ = 55°C -25
On-State Drain Current ID(on) VDS = -5 V, VGS = -10 V -15 A
VGS = -10 V, ID = -3.5 A 530
Drain-Source On-Resistance rDS(on) mΩ
VGS = -4.5 V, ID = -3.0 A 720
Forward Transconductance gfs VDS = -15 V, ID = -3.5 A 20 S
Diode Forward Voltage VSD IS = -3.5 A, VGS = 0 V -0.9 V
Dynamic
Total Gate Charge Qg 5
VDS = -50 V, VGS = -4.5 V,
Gate-Source Charge Qgs 2.1 nC
ID = -3.5 A
Gate-Drain Charge Qgd 3.0
Turn-On Delay Time td(on) 7
VDS = -50 V, RL = 6.4 Ω,
Rise Time tr 13
ID = -3.5 A, ns
Turn-Off Delay Time td(off) 19
VGEN = -10 V, RGEN = 6 Ω
Fall Time tf 11
Input Capacitance Ciss 367
Output Capacitance Coss VDS = -15 V, VGS = 0 V, f = 1 MHz 49 pF
Reverse Transfer Capacitance Crss 35

Notes
a. Pulse test: PW <= 300us duty cycle <= 2%.
b. Guaranteed by design, not subject to production testing.

Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty,
representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out
of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special,
consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary
in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL
products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation
where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application,
Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs,
damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated
with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part.
APL is an Equal Opportunity/Affirmative Action Employer.

© Preliminary 2 Publication Order Number:

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Analog Power AM10P10-530D

Typical Electrical Characteristics

1.2 5
TJ = 25°C
1
RDS(on) - On-Resistance(Ω)

ID - Drain Current (A)

4V
0.8 4.5V
6V 3
0.6 8V,10V
2
0.4

1
0.2

0 0
0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6

ID-Drain Current (A) VGS - Gate-to-Source Voltage (V)

1. On-Resistance vs. Drain Current 2. Transfer Characteristics

2 10
TJ = 25°C
1.8 TJ = 25°C
ID = -3.5A
RDS(on) - On-Resistance(Ω)

1.6
IS - Source Current (A)

1.4
1
1.2
1
0.8
0.1
0.6
0.4
0.2
0 0.01
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1 1.2 1.4

VGS - Gate-to-Source Voltage (V) VSD - Source-to-Drain Voltage (V)

3. On-Resistance vs. Gate-to-Source Voltage 4. Drain-to-Source Forward Voltage

8 500
F = 1MHz
7 450
10V,8V Ciss
400
6
ID - Drain Current (A)

6V
4.5V 350
Capacitance (pf)

5 4V 300
4 250

3 200
150
2
100 Coss
1 Crss
50
0 0
0 1 2 3 4 5 6 7 8 0 5 10 15 20

VDS - Drain-to-Source Voltage (V) VDS-Drain-to-Source Voltage (V)

5. Output Characteristics 6. Capacitance

© Preliminary 3 Publication Order Number:

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Analog Power AM10P10-530D

Typical Electrical Characteristics

10 2.5
VDS = -50V
9
VGS-Gate-to-Source Voltage (V)

ID = -3.5A

RDS(on) - On-Resistance(Ω)
8
2
7

(Normalized)
6
5 1.5
4
3
1
2
1
0 0.5
0 2 4 6 8 10 -50 -25 0 25 50 75 100 125 150
Qg - Total Gate Charge (nC) TJ -JunctionTemperature(°C)
7. Gate Charge 8. Normalized On-Resistance Vs
Junction Temperature
100 60

10 uS
PEAK TRANSIENT POWER (W) 50
10 100 uS

1 mS
40
ID Current (A)

10 mS

100 mS
1 30
1 SEC

10 SEC

100 SEC 20
0.1 DC
1 Idm limit 10
Limited by
RDS
0.01 0
0.1 1 10 100 1000 0.001 0.01 0.1 1 10 100 1000

VDS Drain to Source Voltage (V) t1 TIME (SEC)

9. Safe Operating Area 10. Single Pulse Maximum Power Dissipation

1
D = 0.5

0.2 RθJA(t) = r(t) + RθJA

0.1
0.1 RθJA = 40 °C /W
0.05
0.02
Single Pulse P(pk)
t1
0.01 t2

TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.001
0.0001 0.001 0.01 0.1 1 10 100 1000

t1 TIME (sec)
11. Normalized Thermal Transient Junction to Ambient

© Preliminary 4 Publication Order Number:

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Analog Power AM10P10-530D

Package Information

Note:
1. All Dimension Are In mm.
2. Package Body Sizes Exclude Mold Flash, Protrusion Or Gate Burrs. Mold Flash, Protrusion Or Gate Burrs Shall
Not Exceed 0.10 mm Per Side.
3. Package Body Sizes Determined At The Outermost Extremes Of The Plastic Body Exclusive Of Mold Flash, Gate
Burrs And Interlead Flash, But Including Any Mismatch Between The Top And Bottom Of The Plastic Body.

© Preliminary 5 Publication Order Number:

DS_AM10P10-530D_1A