Traction Inverter: ST New Solutions
Traction Inverter: ST New Solutions
Traction Inverter: ST New Solutions
ST New Solutions
System Block diagram 2
• SPC58NN
• GTM V3 for fully programmable and flexible
VPREREG
Digital input Air bag
VBST
VCC5
ASC
VCC
timer system designed to unload the CPU
VDD-HS Voltage Supply
• SAR ADC & Σ-Δ ADC support Software VDD-LS regulator VDD30 monitor Can interface VCU
Resolver in evaluation L9396 VCORE
SPI
connector
INT
WDI VCC VDD30
• SBC L9396 RST
Exc+
• Multiple Power Supply IC
LVBAT Power supply
protection
Boost ERROR
FSN SPC58 Exc-
connector
ASC Buffer
S1
S2 circuit
• SIC/ IGBT S3
S4
Motor temp
• 750V SiC MOSFETs VCC
Driver temp*3 Analog input
Gen 2 High Voltage Product Family Phase current UVW Voc Over current VCC5
Resolver
Vref protection
• 1200V SiC MOSFETs & Temp
ADC_OUT
Low voltage ASC
VDD-HS Gate sensor
SPI
Gen 2 High Voltage High Performance VDD-LS signal
Isolate
Phase current UVW
ADC_
Product
High voltage Flyback
OUT
DIS L9502*6
Capacitive Isolation Current
M
• L9502 sensor
Backup Power
Ain Tsen Isen Brake
• Single isolated Gate Driver (6kV)for TRACTION
Gate H-bridge
With protection, diagnostics and communication signal VNHD7008 Parking locker
HV connector
Power /
• Designed for ISO26262 compliance HVBAT supply VNHD7012
U VW
protection
HV connector
• Kit Solution approach Inverter
Temp
IGBT: STGYA120M65DF2AG/ Sensor
STG200M65F2D8AG
Three-phase bridge
SiC module: ADP86012W2/ ADP50075W2 SIC Mosfet & IGBT
SPC58 xN - Bernina 3
Superset Block Diagram
ASILD
Core I/O Qualified SEooC
• 3x 200 MHz Power Architecture™ ISA • Generic Timer Module (High-End Version)
e200z4d Core (VLE)
• Dual Issue Core with Floating Point Unit &
• Dual Channel FlexRay (10MB/s), 128 buffers
• 7 x (FD)M-CAN, 1 x (FD)M-TTCAN
Debug HSM
Power Architecture™
INTC
INTC Power Architecture™
x2
LSP(DSP) JTAG 1 LS
• 7 x LINFlex, 8 x DSPI including 2 x μSB e200z4d e200z4d
• 3x (16k-Instruction Cache, 8k-Data Nexus 128k-d 128k-d
Cache) • 1 x Ethernet, 1 x I2C 16k-i 8k-d 16k-i 8k-d TCM
TCM
• 15 x SENT, 2 x PSI5, 1 x PSI5-S
1*FlexRay
• 3x (32k Local i-RAM, 128k Local d-RAM) Cache Cache Cache Cache
32 eDMA
64 eDMA
• 61/84 channel ADC (QFP176/BGA292) 32k-i
Ethernet
• 2x Lock Step configuration 32k-i
Zipwire
VLE FPU LSP VLE FPU LSP
SIPI
• 4 SAR ADC, 12-bit, TUE ±4LSB TCM TCM
1*
• 1 Supervisor ADC, 12-bit, TUE ±4LSB CMPU SWT CMPU SWT
• 3 SAR ADC, 10-bit, TUE ±1.5LSB STM
STM
• 6 Σ-Δ ADC with OSR x32-64
Crossbar Switch Crossbar Switch
Memory Protection Unit Memory Protection Unit
49* LINFlex
GTM ADC
4* CAN-FD
3* LINFlex
4* MCAN
• 1x LFAST (Interprocessor bus) 2xSAR12 2xSAR12
45*DSPI
48x IC
4*DSPI
96x OC 1xSAR10 1xSAR10
• Nexus Class 3+
1*I2C
5x MCS 3xΣΔ 3xΣΔ
• EBI only for Calibration (High speed debug interface)
• Designed for eLQFP176, LFBGA292 and KGD supervisor
spectrum Buck
IGN
• LDO VCC5 (5V +/-2%, 250mA), LDO VCC (3.3V / 5V +/-2%, Wake-up
Monitor 6.5V / 7.2V
1000mA
BCKSW
• HS pre-drivers for fail safe relay and for motor pump FAULT
PRN
Control & Logic
Blocks
LDO VCC
3.3V / 5.0V
VCCSEL
VCC
100mA
•
CSN
Configurable Watchdog (Time-out / Window / Periods) & CLK
SDI
SPI WD
System
SDO I_CORE_SH
configurable Fail-Safe Functionality Oper
Ctrl/ Voltages VCORE
0.8V / 3.3V
Status I_CORE_SL
Modes
• Fail-Safe Output (FSN), Wake-up input
WDTDIS Reg. HV Mux + 1000mA
ADC Converter Buck w/ext FET GCORE
500mA SCORE
Timing information RSU0H/L WSS / TrackReg Pump Motor FET Fail Safe
VDBATT
RSU1H/L Voltage HS+LS pre driver FET VDG
RSU2H/L Decoding
regulation (PWM control) HS predr VDS
• Commercial samples : available RSU3H/L
WSO0
WSO1
WSO2
WSO3
• In production
GNDA
GND1
PRG
PDBATT
PRS
PDG
PDS
PRI
PDI
• Designed for ISO26262 compliance Key Value Application Note
I s o l a t i o n
Flyback controller on L9502
Driver Controller
Gate
(Flyback Contr.) driver
In development
VNHD7008AY / VNHD7012AY 6
Vbatt Vcc
Charge
CP Pump VREG VREG
Vcc clamp
Undervoltage
HS_A HS_B
Improved Performance
Logic, Diagnostic and Protections
Gate
Driver
Gate
Driver
• Optimized Standby current
Power Limitation
HS Over Temperature • PWM operations up to 20kHz
HS Current Limit
OUT A Short circuit protection OUT_B • Tailored and compact full bridges in combination with latest
Gate
Vcc OFF state Gate
dual-channel F7 technology PowerMOS
GATE LSA Driver GATE_LSB
Monitor Outputs Monitoring Driver
• STL64DN4F7AG 8mΩmax
Discrete & Drivers & SIP SLLIMM™ IPM ACEPACK™ Power Modules
Press FIT connections for high reliable Internal layout optimized for minimized stray
and long lasting connection inductace
SiC-MOSFET based, 750V and 1200V ACEPACKTM DRIVE High reliability and robustness: Dice sintered
to substrate
Pin-fin for direct cooling Different bus bar available to fit welding or
screwing connection methods.
Dedicated NTC for each single AMB substrates for better thermal
substrate managment
Short tab option Long tab option Long tab w/o AC bar holes
ACEPACK™ DRIVE
160kW
(320kWpeak)
120kW
(240kW peak)
Power 85kW
(170kW peak)
including coming Gen 3
1200V SiC MOSFET
Gen 2 SiC 1200V ▪ Topology: Three phase inverter
AMB Si3N4 ▪ DC-link : 750Vdc
▪ PWM Strategy: Bipolar
1200V Si based ▪ Switching frequency: 12kHz
HybridPACKTM2 (*) ▪ TJ < 80% of Tjmax at any condition
▪ Peak Power for 10 sec
▪ MI = 1, Cos(phi) = 0.8
(*) HybridPACK 2 is 30% bigger than ACEPACK DRIVE ▪ Tfluid = 70°C
600mm2 IGBT+Diode each switch