STGIB20M60TS-L

Datasheet

SLLIMM - 2nd series IPM, 3-phase inverter, 25 A, 600 V short-circuit rugged IGBT

Features
• IPM 25 A, 600 V, 3-phase IGBT inverter bridge including 2 control ICs for gate
driving and freewheeling diodes
• 3.3 V, 5 V TTL/CMOS inputs with hysteresis
• Internal bootstrap diode
• Under-voltage lockout of gate drivers
• Smart shutdown function
• Short-circuit protection
Marking area • Shutdown input/fault output
• Separate open emitter outputs
• Built-in temperature sensor
• Comparator for fault protection
• Short-circuit rugged TFS IGBTs
• Very fast, soft recovery diodes
• 85 kΩ NTC, UL 1434, CA 4 recognized
• Fully isolated package
• Isolation rating of 1600 Vrms/min
• UL recognition: UL 1557, file E81734
SDIP2B-26L type L1

Applications
• 3-phase inverters for motor drives
• Washing machines
• Dryer
• Industrial fans
• Pumps

Product status link Description

STGIB20M60TS-L This second series of SLLIMM (small low-loss intelligent molded module) provides a
compact, high-performance AC motor drive in a simple, rugged design. It combines
Product summary new ST proprietary control ICs (one LS and one HS driver) with an improved short-
circuit rugged trench gate field-stop (TFS) IGBT, making it ideal for motor drives
Order code STGIB20M60TS-L operating up to 20 kHz in hard-switching circuitries.
Marking GIB20M60TS-L
Package SDIP2B-26L type L1
Packing Tube

DS11295 - Rev 8 - September 2021 www.st.com

For further information contact your local STMicroelectronics sales office.
 STGIB20M60TS-L
Internal schematic and pin description

1 Internal schematic and pin description

Figure 1. Internal schematic diagram and pin configuration

NC(1 ) (26)T1

VbootU(2) (25)T2

VbootV(3)

VbootW(4)
(24)P

HinU(5) (23)U

HinV(6)

HinW(7) (22)V

VccH(8)
(21)W
GND(9)
H-side

LinU(10)

LinV(11)

LinW(12)

(20)NU
VccL(13)

SD/OD(14) (19)NV

Cin(15)

GND(16) (18)NW

TSO(17)
L-side

GIPG120520140842FSR

DS11295 - Rev 8 page 2/24

 STGIB20M60TS-L
Internal schematic and pin description

Table 1. Pin description

Pin Symbol Description

1 NC -
2 VBOOTu Bootstrap voltage for U phase
3 VBOOTv Bootstrap voltage for V phase
4 VBOOTw Bootstrap voltage for W phase
5 HINu High-side logic input for U phase
6 HINv High-side logic input for V phase
7 HINw High-side logic input for W phase
8 VCCH High-side low voltage power supply
9 GND Ground
10 LINu Low-side logic input for U phase
11 LINv Low-side logic input for V phase
12 LINw Low-side logic input for W phase
13 VCCL Low-side low voltage power supply
14 SD /OD Shutdown logic input (active low) / open-drain (comparator output)
15 CIN Comparator input
16 GND Ground
17 TSO Temperature sensor output
18 NW Negative DC input for W phase
19 NV Negative DC input for V phase
20 NU Negative DC input for U phase
21 W W phase output
22 V V phase output
23 U U phase output
24 P Positive DC input
25 T2 NTC thermistor terminal 2
26 T1 NTC thermistor terminal 1

DS11295 - Rev 8 page 3/24

 STGIB20M60TS-L
Absolute maximum ratings

2 Absolute maximum ratings

TJ = 25°C unless otherwise noted.

Table 2. Inverter parts

Symbol Parameter Value Unit

VPN Supply voltage among P -NU, -NV, -NW 450 V

VPN(surge) Supply voltage surge among P -NU, -NV, -NW 500 V

VCES Collector-emitter voltage each IGBT 600 V

Continuous collector current each IGBT (TC = 25 °C) 25

±IC A
Continuous collector current each IGBT (TC = 80 °C) 20

±ICP Peak collector current each IGBT (less than 1 ms) 50 A

PTOT Total power dissipation at TC = 25 °C each IGBT 107 W

Short circuit withstand time, VCE = 300 V, TJ = 125 °C,

tscw 8 µs
VCC = Vboot = 15 V, VIN = 0 to 5 V

Table 3. Control parts

Symbol Parameter Min. Max. Unit

VCC Supply voltage between VCCH-GND, VCCL-GND -0.3 20 V

VBOOT Bootstrap voltage -0.3 619 V

VOUT Output voltage among U, V, W and GND VBOOT - 21 VBOOT + 0.3 V

VCIN Comparator input voltage -0.3 20 V

VIN Logic input voltage applied between HINx, LINx and GND -0.3 15 V

VSD/OD Open drain voltage -0.3 7 V

ISD/OD Open drain sink current 10 mA

VTSO Temperature sensor output voltage -0.3 5.5 V

ITSO Temperature sensor output current 7 mA

Table 4. Total system

Symbol Parameter Value Unit

Isolation withstand voltage applied between each pin and heat sink plate
VISO 1600 Vrms
(AC voltage, t = 60 s)
TJ Power chips operating junction temperature range -40 to 175 °C

TC Module case operation temperature range -40 to 125 °C

DS11295 - Rev 8 page 4/24

 STGIB20M60TS-L
Thermal data

2.1 Thermal data

Table 5. Thermal data

Symbol Parameter Value Unit

Thermal resistance, junction-to-case single IGBT 1.4

RthJC °C/W
Thermal resistance, junction-to-case single diode 3

DS11295 - Rev 8 page 5/24

 STGIB20M60TS-L
Electrical characteristics

3 Electrical characteristics

TJ = 25 °C unless otherwise specified.

3.1 Inverter part

Table 6. Static

Symbol Parameter Test condition Min. Typ. Max. Unit

ICES Collector cut-off current VCE = 600 V, VCC = Vboot = 15 V - 100 µA

VCC = VBoot = 15 V, VIN(1)= 0 to 5 V

- 1.55 2.0
IC = 20 A
Collector-emitter saturation
VCE(sat) V
voltage VCC = VBoot = 15 V, VIN(1) = 0 to 5 V,
- 1.75
IC = 25 A

VIN(1) = 0 V, IC = 20 A - 1.8 2.5 V

VF Diode forward voltage
VIN (1) = 0 V, IC = 25 A - 1.95 V

1. Applied among HINx, LINx and GND for x = U, V, W

Table 7. Inductive load switching time and energy

Symbol Parameter Test condition Min. Typ. Max. Unit

ton(1) Turn-on time - 422 -

tc(on) (1)
Cross-over time on - 205 -

toff(1) Turn-off time - 422 - ns

tc(off) (1)
Cross-over time off VDD = 300 V, VCC = Vboot = 15 V, - 182 -
VIN (2) = 0 to 5 V, IC = 20 A
trr Reverse recovery time - 310 -

Eon Turn-on switching energy - 655 -

Eoff Turn-off switching energy - 460 - µJ

Err Reverse recovery energy - 120 -

ton(1) Turn-on time - 469 -

tc(on) (1)
Cross-over time on - 240 -

toff(1) Turn-off time - 400 - ns

tc(off) (1)
Cross-over time off VDD = 300 V, VCC = Vboot = 15 V, - 170 -
VIN (2) = 0 to 5 V, IC = 25 A
trr Reverse recovery time - 320 -

Eon Turn-on switching energy - 974 -

Eoff Turn-off switching energy - 550 - µJ

Err Reverse recovery energy - 126 -

1. ton and toff include the propagation delay time of the internal drive. tC(on) and tC(off) are the switching times of the IGBT itself
under the internally given gate driving condition.
2. Applied among HINx, LINx and GND for x = U, V, W

DS11295 - Rev 8 page 6/24

 STGIB20M60TS-L
Inverter part

Figure 2. Switching time test circuit

Ic

Vcc VCC BOOT

HIN HVG
L
GND OUT
5V
+
C Vdd
-
0V
Input VCC

LIN +
Rsd
Vce
+5V SD LVG
-
CIN

GND

Figure 3. Switching time definition

100% IC 100% IC

t rr

VCE IC IC VCE

VIN VIN

t ON t OFF
t C(ON) t C(OFF)
VIN(ON) 10% IC 90% IC 10% VCE VIN(OFF) 10% VCE 10% IC

(a) turn-on (b) turn-off

AM09223V1

DS11295 - Rev 8 page 7/24

 STGIB20M60TS-L
Control/protection parts

3.2 Control/protection parts

Table 8. High- and low-side drivers

Symbol Parameter Test condition Min. Typ. Max. Unit

Vil Low logic level voltage 0.8 V

Vih High logic level voltage 2 V

IINh IN logic “1” input bias current INx = 15 V 80 150 200 µA

IINl IN logic “0” input bias current INx = 0 V 1 µA

High-side
VCC_hys VCC UV hysteresis 1.2 1.4 1.7 V

VCCH_th(on) VCCH UV turn-on threshold 11 11.5 12 V

VCCH_th(off) VCCH UV turn-off threshold 9.6 10.1 10.6 V

VBS_hys VBS UV hysteresis 0.5 1 1.6 V

VBS_th(on) VBS UV turn-on threshold 10.1 11 11.9 V

VBS_th(off) VBS UV turn-off threshold 9.1 10 10.9 V

Under voltage VBS quiescent

IQBSU VBS = 9 V, HINx(1) = 5 V 55 75 µA
current

IQBS VBS quiescent current VCC = 15 V, HINx(1) = 5 V 125 170 µA

Under voltage quiescent supply

Iqccu VCC = 9 V, HINx(1) = 0 V 190 250 µA
current

Iqcc Quiescent current VCC = 15 V, HINx(1) = 0 V 560 730 µA

RDS(on) BS driver ON resistance 150 Ω

Low-side
VCC_hys VCC UV hysteresis 1.1 1.4 1.6 V

VCCL_th(on) VCCL UV turn-on threshold 10.4 11.6 12.4 V

VCCL_th(off) VCCL UV turn-off threshold 9.0 10.3 11 V

VCC = 10 V,
Under voltage quiescent supply
Iqccu SD pulled to 5 V through RSD = 10 kΩ, 600 800 µA
current
CIN = LINx(1) = 0 V
VCC = 15 V, SD= 5 V,
Iqcc Quiescent current 700 900 µA
CIN = LINx(1) = 0 V
VSSD Smart SD unlatch threshold 0.5 0.6 0.75 V

ISDh SD logic “1” input bias current SD = 5 V 25 50 70 µA

ISDl SD logic “0” input bias current SD = 0 V 1 µA

1. Applied between HINx, LINx and GND for x = U, V, W.

DS11295 - Rev 8 page 8/24

 STGIB20M60TS-L
Control/protection parts

Table 9. Temperature sensor output

Symbol Parameter Test condition Min. Typ. Max. Unit

Temperature sensor output

VTSO TJ = 25 °C 0.974 1.16 1.345 V
voltage
Temperature sensor sink current
ITSO_SNK 0.1 mA
capability
Temperature sensor source
ITSO_SRC 4 mA
current capability

Table 10. Sense comparator (VCC = 15 V, unless otherwise is specified)

Symbol Parameter Test condition Min. Typ. Max. Unit

ICIN CIN input bias current VCIN = 1 V -0.2 0.2 µA

Vref Internal reference voltage 460 510 560 mV

Open-drain low level output

VOD Iod = 5 mA 500 mV
voltage
SD pulled to 5 V through RSD = 10 kΩ;

tCIN_SD CIN comparator delay to SD measured applying a voltage step 0-1 V

240 320 410 ns
to pin CIN;
50% CIN to 90% SD
SD pulled to 5 V through RSD= 10 kΩ;
SRSD SD fall slew rate CL= 1 nF through SD and ground; 25 V/µs
90% SD to 10% SD

The comparator stays enabled even if VCC is in the UVLO condition but higher than 4 V.

DS11295 - Rev 8 page 9/24

 STGIB20M60TS-L
Fault management

4 Fault management

The device integrates an open-drain output connected to the SD pin. As soon as a fault occurs, the open-drain is
activated and the LVGx outputs are forced low. Two types of fault can be identified:
• Overcurrent (OC) sensed by the internal comparator (see more detail in Section 4.1 Smart shutdown
function);
• Undervoltage on supply voltage (VCC)

Each fault enables the SD open drain for a different time, as described in the following table.

Table 11. Fault timing

Symbol Parameter Event time (1) SD open-drain enable time result (1)(2)

≤ 24 μs 24 μs
OC Over-current event
> 24 µs OC time
≤ 70 μs 70 µs
> 70 µs
UVLO Under-voltage lockout event
until the VCC_LS exceeds the UVLO time
VCC_LS UV turn ON threshold

1. Typical value (-40 °C ≤ TJ ≤ +125 °C).

2. Without contribution of the RC network on SD.

Actually, the device remains in a fault condition (SD at low logic level and LVGx outputs disabled) for a time also
depending on the RC network connected to the SD pin. The network generates a time contribution that is added
to the internal value.

Figure 4. Overcurrent timing (without contribution of the RC network on SD)

GIPG120520141638FSR

DS11295 - Rev 8 page 10/24

 STGIB20M60TS-L
Fault management

Figure 5. UVLO timing (without contribution of the RC network on SD)

GIPG120520141644FSR

DS11295 - Rev 8 page 11/24

 STGIB20M60TS-L
Smart shutdown function

4.1 Smart shutdown function

The device integrates a comparator committed to the fault sensing function. The comparator input can be
connected to an external shunt resistor in order to implement a simple overcurrent detection function.
The output signal of the comparator is fed to an integrated MOSFET with the open drain output available on the
SD input. When the comparator triggers, the device is set in shutdown state and its outputs are all set to low level.

Figure 6. Smart shutdown timing waveforms in case of overcurrent event

comp
Vref

PROTECTION
CIN

t CIN_SD

LIN

LVG

SD

open-drain gate
(internal)
t1 t2
t OC

real disable time

Fast shutdown:
the driver outputs are set in SD state
t1
immediately after comparator triggering
even if the SD signal has not yet reached
the lower input threshold
t2
SHUTDOWN CIRCUIT
where:
VBIAS

RSD
FROM / TO SD
CONTROLLER
SMART
R PD_SD
CSD R ON_OD
SD
LOGIC

RON_OD = VOD/5 mA, see Table 10. Sense comparator (VCC = 15 V, unless otherwise is specified);
RPD_SD (typ.) = 5 V/ISDh

DS11295 - Rev 8 page 12/24

 STGIB20M60TS-L
Smart shutdown function

In common overcurrent protection designs, the comparator output is usually connected to the SD input and an RC
network is connected to this SD line in order to provide a mono-stable circuit which implements a protection time
that follows the fault condition.
As opposed to common fault detection systems, the device smart shutdown architecture allows the immediate
turn-off of output gates driver in case of fault, by minimizing the propagation delay between the fault detection
event and the actual switching off of the outputs. In fact, the time delay between the fault and the turning off of the
outputs is no longer dependent on the RC value of the external network connected to the pin.
In the smart shutdown circuitry, the fault signal has a preferential path which directly switches off the outputs after
the comparator triggering.
At the same time, the internal logic turns on the open-drain output and holds it on until the SD voltage goes below
the VSSD threshold and the toc time is elapsed.
The driver outputs restart following the input pins as soon as the voltage at the SD pin reaches the higher
threshold of the SD logic input.
The smart shutdown system provides the possibility to increase the time constant of the external RC network (i.e.,
the disable time after the fault event) up to very high values without increasing the delay time of the protection.

DS11295 - Rev 8 page 13/24

 STGIB20M60TS-L
Temperature monitoring solutions

5 Temperature monitoring solutions

5.1 TSO output

The device integrates a temperature sensor. A voltage proportional to the die temperature is available on the TSO
pin. When this function is not used, the pin can be left floating.

Figure 7. VTSO output characteristics vs LVIC temperature

VTSO IGBT110820161234TSO
(V)

2.8

Min
2.2

1.6
Typ

Max
1.0

0.4
0 25 50 75 100 T (°C)

5.2 NTC thermistor

Table 12. NTC thermistor

Symbol Parameter Test condition Min. Typ. Max. Unit

R25 Resistance T = 25 °C 85 kΩ

R125 Resistance T = 125 °C 2.6 kΩ

B B-constant T = 25 to 100 °C 4092 K

T Operating temperature range -40 125 °C

DS11295 - Rev 8 page 14/24

 STGIB20M60TS-L
NTC thermistor

Figure 8. NTC resistance vs temperature

GIPG120520142249FSR
R(kΩ)

3000

2500

2000

1500
Typ
1000

500 Max

0 Min
-50 -25 0 25 50 75 100 125 T(°C)

Figure 9. NTC resistance vs temperature - zoom

GIPG120520141304FSR
R(kΩ)

30

25

20

Max
15
Typ
10
Min

0
50 60 70 80 90 100 110 120 T(°C)

DS11295 - Rev 8 page 15/24

 6

DS11295 - Rev 8
3.3V/5 V

(1)NC T1(26)
Dz1 C3 CbootU VTSO/NTC

Dz1 C3 Cboot V (2)VbootU T2(25)

RTO CTO
Dz1 C3 CbootW (3)VbootV
Hin U R1
(4)VbootW
P(24)
C1

R1 (5)HinU U(23)
Hin V

C1 (6)HinV

(7)HinW
M
Hin W R1 V(22)

C1
+ (8)VccH
Application circuit example

Vc c
- Cvc c C2 W(21)
Lin U R1 Dz2
(9)GND H-side
C1

Lin V R1 (10)LinU

C1 (11)LinV

Lin W R1 (12)LinW +
C4 Cvdc
-
C1
NU(20)
+ (13)VccL

MICROCONTROLLER
Vcc
- Cvcc C2 Dz2
3.3V/5 V
(14)SD/OD NV(19)
Figure 10. Application circuit example

RSD
Fault
(15)Cin

VTSO/NTC
CSD (16)GND NW(18)
SGN_GND

(17)TSO L-side
VTSO/NTC

CTSO RSF to MCU/op-amp

Rshunt
CSF

PWR_GND

Application designers are free to use a different scheme according to the device specifications.

page 16/24
STGIB20M60TS-L
Application circuit example
 STGIB20M60TS-L
Guidelines

6.1 Guidelines
1. Input signals HIN, LIN are active-high logic. A 100 kΩ (typ.) pull-down resistor is built-in for each input pin.
To prevent input signal oscillations, the wiring of each input should be as short as possible and the use of
RC filters (R1, C1) on each input signal is suggested. The filters should be with a time constant of about 100
ns and placed as close as possible to the IPM input pins.
2. The use of a bypass capacitor CVCC (aluminum or tantalum) can reduce the transient circuit demand on
the power supply. Besides, to reduce any high-frequency switching noise distributed on the power lines, a
decoupling capacitor C2 (100 to 220 nF, with low ESR and low ESL) should be placed as close as possible
to each Vcc pin and in parallel with the bypass capacitor.
3. The use of an RC filter (RSF, CSF) prevents protection circuit malfunctions. The time constant (RSF x CSF)
should be set to 1 µs and the filter must be placed as close as possible to the CIN pin.
4. The SD is an input/output pin (open-drain type if it is used as output). It should be pulled up to a power
supply (i.e., MCU bias at 3.3/5 V) by a resistor value, which can keep the Iod no higher than 5 mA (VOD ≤
500 mV when open-drain MOSFET is ON). The filter on SD should be sized to get a desired re-starting time
after a fault event and placed as close as possible to the SD pin.
5. A decoupling capacitor CTSO between 1 nF and 10 nF can be used to increase the noise immunity of the
TSO thermal sensor; a similar decoupling capacitor COT (between 10 nF and 100 nF) can be implemented
if the NTC thermistor is available and used. In both cases, their effectiveness is improved if these capacitors
are placed close to the MCU.
6. The decoupling capacitor C3 (100 to 220 nF with low ESR and low ESL) in parallel with each Cboot filters
high-frequency disturbances. Both Cboot and C3 (if present) should be placed as close as possible to the
U,V,W and Vboot pins. Bootstrap negative electrodes should be connected to the U,V,W terminals directly
and separated from the main output wires.
7. To prevent overvoltage on the VCC pin, a Zener diode (Dz1) can be used. Similarly on the Vboot pin, a Zener
diode (Dz2) can be placed in parallel with each Cboot.
8. The use of the decoupling capacitor C4 (100 to 220 nF, with low ESR and low ESL) in parallel with the
electrolytic capacitor CVdc prevents surge destruction. Both capacitors C4 and CVdc should be placed as
close as possible to the IPM (C4 has priority over Cvdc).
9. By integrating an application-specific type HVIC inside the module, direct coupling to the MCU terminals
without an optocoupler is possible.
10. Low inductance shunt resistors should be used for phase leg current sensing.
11. In order to avoid malfunctions, the wiring on N pins, the shunt resistor and PWR_GND should be as short as
possible.
12. The connection of the SGN_GND to the PWR_GND at one point only (close to the shunt resistor terminal)
can reduce the impact of power ground fluctuation.
These guidelines ensure the device specifications for application designs. For further details, please refer to the
relevant application note.

Table 13. Recommended operating conditions

Symbol Parameter Test conditions Min. Typ. Max. Unit

VPN Supply voltage Applied between P-Nu, NV, Nw 300 400 V

VCC Control supply voltage Applied between VCC-GND 13.5 15 18 V

Applied between VBOOTi-OUTi

VBS High-side bias voltage 13 18 V
for i = U, V, W
tdead Blanking time to prevent arm-short For each input signal 1.0 µs

-40 °C < TC < 100 °C

fPWM PWM input signal 20 kHz
-40 °C < TJ < 125 °C

TC Case operation temperature 100 °C

DS11295 - Rev 8 page 17/24

 STGIB20M60TS-L
Electrical characteristics (curves)

7 Electrical characteristics (curves)

Figure 11. Output characteristics Figure 12. VCE(sat) vs collector current

Ic IGBTKRFEBOutcharTJ25C IGBTKRFEBVCEsatvscollcurr
(A)
VCC = 15 V
VCC = 18 V 15 V
40 3.3
TJ = 175 °C
13 V
2.8
30
TJ = 25 °C
2.3
20
1.8

10
1.3

0 0.8
0.0 0.5 1.0 1.5 2.0 2.5 VCE(V) 0 10 20 30 40 IC(A)

Figure 13. IC vs case temperature Figure 14. Diode VF vs forward current

IC GADG080520191224CCT VF IGBTKRFEBDVFvsforcurr
(A) VGE ≥ 15 V, TJ ≤ 175 °C (V)

25 2.4
TJ = 25 °C
2.0
20
TJ = 175 °C
1.6
15
1.2
10
0.8
5
0.4
0
0 25 50 75 100 125 150 TC (°C) 0.0
0 10 20 30 40 IF (A)

Figure 15. EON switching energy vs collector current Figure 16. EOFF switching energy vs collector current
EON IGBTKRFEBEONSwenvscollcurr EOFF IGBTKRFEBEOFFSwenvscollcurr
(mJ) VDD = 300 V, VCC = Vboot = 15 V (mJ) VDD = 300 V, VCC = Vboot = 15 V
1.4
6.0
1.2

4.8 1.0 TJ = 175 °C

TJ = 175 °C 0.8
3.6
TJ = 25 °C
TJ = 25 °C 0.6
2.4
0.4
1.2
0.2

0.0 0.0
0 10 20 30 40 IC(A) 0 10 20 30 40 IC(A)

DS11295 - Rev 8 page 18/24

 STGIB20M60TS-L
Electrical characteristics (curves)

Figure 17. Thermal impedance

K GIPD290720151032FSR

10 -1

10 -2
10 -5 10 -4 10 -3 10 -2 10 -1 10 0 t p (s)

DS11295 - Rev 8 page 19/24

 STGIB20M60TS-L
Package information

8 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.

8.1 SDIP2B-26L type L1 package information

Figure 18. SDIP2B-26L type L1 package outline

8450802_7_type_L1_IGBT

DS11295 - Rev 8 page 20/24

 STGIB20M60TS-L
SDIP2B-26L type L1 package information

Table 14. SDIP2B-26L type L1 package mechanical data

Dimensions (mm)
Ref.
Min. Typ. Max.

A 37.50 38.00 38.50

A1 0.97 1.22 1.47
A2 0.97 1.22 1.47
A3 34.70 35.00 35.30
c 1.45 1.50 1.55
B 23.50 24.00 24.50
B1 12.00
B2 13.90 14.40 14.90
B3 28.90 29.40 29.90
C 3.30 3.50 3.70
C1 5.00 5.50 6.00
C2 13.50 14.00 14.50
D 28.45 28.95 29.45
D1 2.725 3.025 3.325
e 3.356 3.556 3.756
e1 1.578 1.778 1.978
e2 7.42 7.62 7.82
e3 4.88 5.08 5.28
e4 2.34 2.54 2.74
E 11.90 12.40 12.90
E1 3.45 3.75 4.05
E2 1.80
f 0.45 0.60 0.75
f1 0.35 0.50 0.65
F 1.95 2.10 2.25
F1 0.95 1.10 1.25
R 1.55 1.575 1.60
T 0.375 0.40 0.425
V 0° 5°

DS11295 - Rev 8 page 21/24

 STGIB20M60TS-L

Revision history

Table 15. Document revision history

Date Revision Changes

30-Sep-2015 1 Initial release.

Text edits throughout document
16-May-2016 2 Updated Section 3: "Electrical characteristics"
Added Section 7: "Electrical characteristics (curves)"
Modified Table 10: "Temperature sensor output" and Table 11: "Sense
comparator (VCC = 15 V, unless otherwise is specified)"

08-Nov-2016 3 Modified Figure 15: "VTSO output characteristics vs. LVIC temperature"
Updated Section 8.1: "SDIP2B-26L type L package information"
Minor text changes
Document status promoted from preliminary data to production data.
06-Oct-2017 4 Updated features in cover page and Table 12: "Fault timing".
Minor text changes
Updated Section 8.1 SDIP2B-26L type L package information.
07-Jun-2018 5
Minor text changes
Added Figure 13. IC vs case temperature.
13-May-2019 6 Updated Section 8.1 SDIP2B-26L type L1 package information.
Minor text changes.
27-May-2019 7 Modified Figure 11. Output characteristics.
Updated the features in cover page and Table 4. Total system.
21-Sep-2021 8
Minor text changes.

DS11295 - Rev 8 page 22/24

 STGIB20M60TS-L
Contents

Contents
1 Internal schematic and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Inverter part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 Control/protection parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Fault management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

4.1 Smart shutdown function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5 Temperature monitoring solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

5.1 TSO output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2 NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

6 Application circuit example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

6.1 Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

7 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

8 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
8.1 SDIP2B-26L type L1 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

DS11295 - Rev 8 page 23/24

 STGIB20M60TS-L

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
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names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved

DS11295 - Rev 8 page 24/24