ADC DAC and

Sensor Interfacing
LECTURE# 19
MICROPROCESSOR SYSTEMS AND INTERFACING

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ADCs and DACs
Microprocessors and Microcontrollers understand digital logic
◦ While real world signals (voice, temperature, light etc.) are analog

In order to allow μC/μP interact with real world, we need

◦ Analog to Digital Converter (ADC)and and Digital to Analog Converter (DACs)

An example of usefulness of ADCs and DACs is shown below

◦ Consider that the system converts male voice to female voice

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ADC Devices
ADCs are used for data acquisition
◦ Converts continuous-time continuous-valued signal
◦ to discrete-time and discrete-valued.

Physical world quantities like Temperature, pressure, humidity and

velocity
◦ Are converted to a continuous electrical signal using a transducer/sensor
◦ This electrical signal is converted to digital using ADC

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ADC
Major characteristics
Resolution
◦ How small value can be measured using ADC
◦ Higher the resolution, more steps (values)
◦ ADCs usually available are 8 (256 steps), 10 (1024 steps), 12, 16 or 24 bits
Conversion Time
◦ The time required to convert an analog signal into a digital signal
◦ Often alternatively represented as Samples/second
Reference Voltage (𝑉𝑟𝑒𝑓 )
◦ Defines the maximum allowed analog input (𝑉𝑖𝑛 )
◦ Or, Defines the range of the analog input signal
◦ ADC compares the input (𝑉𝑖𝑛 ) with 𝑉𝑟𝑒𝑓 during conversion
◦ If 𝑉𝑖𝑛 = Vref , ADC output is maximum
◦ If 𝑉𝑖𝑛 = 0, ADC output is minimum (zero)

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 ADC Resolution & Sample Rate
Higher Resolution
◦ Smaller step size, More vertical Steps in a range
20 60

15
40
10

5 Sampling Rate Low 20

Sampling Rate Low
Resolution Low Resolution High
0 0
0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 35

20
Higher Sampling Rate →
15
◦ Small conversion time
10
◦ More horizontal step in a second
5 Sampling Rate High
Resolution Low
0
0 10 20 30 40 50 60 70 80

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Steps and Step Size
Higher the resolution of the ADC, the more steps it will have
◦ Steps between 𝑉𝑟𝑒𝑓− (usually ground) and 𝑉𝑟𝑒𝑓+ (often 𝑉𝑟𝑒𝑓 only)

Step size is the minimum measureable value of ADC

◦ Represented by digital decimal equivalent value of 1 (0b00000001)
𝑉𝑟𝑒𝑓 8 = 256)
◦ Step size = , for an 8-bit ADC (2
256
Step size (mV) Step size (mV)
Vref (V) Vin Range (V)
8-bit 10-bit
5 0 to 5 5/256 = 19.53 5/1024 = 4.88
4.096 0 to 4.096 4.096/256 = 16 4.096/1024 = 4
4 0 to 4 4/256 = 15.63 4/1024 = 3.91
3 0 to 3 3/256 = 11.72 3/1024 = 2.93
2.56 0 to 2.56 2.56/256 = 10 2.56/1024 = 2.5
2.048 0 to 2.048 2.048/256 = 8 2.048/1024 = 2
2 0 to 2 2/256 = 7.81 2/1024 = 1.95
1.28 0 to 1.28 1.28/256 = 5 1.28/1024 = 1.25
1 0 to 1 1/256 = 3.91 1/1024 = 0.98

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Digital Data Output
The digital output of the ADC is
𝑉
◦ 𝐷𝑜𝑢𝑡 = 𝑠𝑡𝑒𝑝𝑖𝑛𝑠𝑖𝑧𝑒 𝑉𝑟𝑒𝑓
𝑠𝑡𝑒𝑝 𝑠𝑖𝑧𝑒 = 2𝑟𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛
If the μC wants to display the value (e.g. on LCD)
𝐷
𝑜𝑢𝑡
◦ 𝑉𝑖𝑛 = 2𝑟𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 × 𝑉𝑟𝑒𝑓 ⇒ 𝑉𝑖𝑛 = 𝐷𝑜𝑢𝑡 × 𝑠𝑡𝑒𝑝 𝑠𝑖𝑧𝑒

ADCs are available which provide both parallel and serial data output

Analog Parallel Analog

Inputs Digital Inputs
Output Serial
Digital
Output

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Channels and Conversion
Each ADC may have multiple analog input channels,
◦ From which it can take analog input for conversion

These channels are used one at a time for conversion to digital

◦ This does not mean and ADC can perform parallel conversion

Start of conversion signal (with pin names SOC or WR)

◦ Tells the ADC to start analog-to-digital conversion

End of Conversion signal (with pin names EOC or INTR)

◦ ADC informs the microcontroller that conversion is complete
◦ May also be fed to interrupt input of the microcontroller

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ADC programming in AVR
Atmega328p has built in one 10-bit ADC, ± 2 LSB Absolute Accuracy
13 – 260 µs Conversion Time
◦ Up to 76.9kSPS (Up to 15kSPS at Maximum Resolution)
Up to 8 Multiplexed Single Ended Input Channels
The converted output binary data is stored in ADCH:ADCL
◦ Total 16-bit
◦ The result is 10-bit which can be either left aligned or right aligned
Three options for Voltage Reference (AVCC, AREF and internal 1.1 V)
The conversion time is dictated by crystal frequency and
◦ Three bits ADPS0:2 in ADCSRA register
The ADC must have a stable voltage reference and supply

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AVR ADC Block Diagram

Reference Selection

SAR ADC

Analog input channel selection

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ADMUX Register
REFS1 REFS0 ADLAR – MUX3 MUX2 MUX1 MUX0

REFS[1:0]: Reference Selection Bits REFS1 REFS0

Voltage Reference
Selection
◦ These bits select the voltage reference for the ADC AREF,
0 0
Internal Vref turned off
ADLAR ADC Left Adjust Results AVCC with external
0 1
◦ This bit dictates either the left bits or the right bits capacitor at AREF pin
of the result registers ADCH:ADCL that are used to 1 0 Reserved
store the result. If we write a one to ADLAR, the Internal 1.1V Voltage
result will be left adjusted; otherwise, the result is 1 1 Reference with external
capacitor at AREF pin
right adjusted

MUX[3:0] Analog Channel Selection bits

◦ The value of these bits selects which analog inputs
are connected to the ADC

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ADC Channel Selection
Selecting analog input channel
MUX3...0 Single Ended Input
0000 ADC0
0001 ADC1
0010 ADC2
0011 ADC3
0100 ADC4
0101 ADC5
0110 ADC6
0111 ADC7
1000 ADC8 (1)
1001 – 1101 (reserved)
1110 1.1V (VBG)
1111 0V (GND)

1. For Temperature Sensor

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ADCSRA Register
ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0

ADEN Bit 7 ADC Enable

◦ This bit enables or disables the ADC. Setting this bit to one will enable the ADC and clearing
this bit to zero will disable it even while a conversion is in progress.

ADSC Bit 6 ADC Start Conversion

◦ To start each conversion, you have to set this bit to one.

ADATE Bit 5 ADC Auto Trigger Enable

◦ Auto triggering of the ADC is enabled when you set this bit to one.

ADIF Bit 4 ADC Interrupt Flag

◦ This bit is set when an ADC conversion completes, and the data registers are updated.

ADIE Bit 3 ADC Interrupt Enable

◦ Setting this bit to one enables the ADC conversion complete interrupt.

ADPS2:0 Bit 2:0 ADC Prescaler Select Bits

◦ These bits determine the division factor between the XTAL frequency and the input clock to
the ADC.

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ADC conversion time
Slower the reliable ADPS2 ADPS1 ADPS0 ADC Clock
0 0 0 Clk/2
0 0 1 Clk/2
0 1 0 Clk/4
0 1 1 Clk/8
1 0 0 Clk/16
1 0 1 Clk/32
1 1 0 Clk/64
1 1 1 Clk/128

Sample & Hold Conversion Time

Condition
(Cycles from Start of Conversion) (Cycles)
First conversion 13.5 25
Normal conversions, single ended 1.5 13
Auto Triggered conversions 2 13.5

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ADC Auto Trigger (1/2)
ADC auto trigger automatically starts conversion
ADTS bits are in Register ADCSRB

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ADC Auto Trigger (2/2)
ADC auto trigger automatically starts conversion
ADTS bits are in Register ADCSRB
ADTS2 ADTS1 ADTS0 Trigger Source
0 0 0 Free Running mode
0 0 1 Analog Comparator
0 1 0 External Interrupt Request 0
0 1 1 Timer/Counter0 Compare Match A
1 0 0 Timer/Counter0 Overflow
1 0 1 Timer/Counter1 Compare Match B
1 1 0 Timer/Counter1 Overflow
1 1 1 Timer/Counter1 Capture Event

Digital input disable

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 ADC Steps for polling based
programming
1. Make the pin for the selected ADC channel an input pin.
2. Turn on the ADC module of the AVR because it is disabled upon power-on reset to
save power.
3. Select the conversion speed. We use registers ADPS2:0 to select the conversion
speed.
4. Select voltage reference and ADC input channels. We use:
◦ REFS0 and REFS1 bits in the ADMUX register to select voltage reference, and,
◦ MUX3:0 bits in ADMUX register to select the ADC input channel.
5. Activate the start conversion bit by writing a one to the ADSC bit of ADCSRA reg..
6. Wait for the conversion to be completed by
◦ polling the ADIF bit in the ADCSRA register.
7. After the ADIF bit has gone HIGH,
◦ Read the ADCL and ADCH registers to get the digital data output.
◦ You have to read ADCL before ADCH; otherwise, the result will not be valid.
8. If you want to read the selected channel again, go back to step 5.
9. If you want to select another Vref source or input channel, go back to step 4.

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