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    AprilMay 2023

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    Hero Kurella
    [1] The document is a question paper for the subject Linear IC Applications for B. Tech II Year II Semester Examinations. [2] It consists of two parts - Part A contains 10 short answer questions carrying 25 marks total. Part B contains 5 long answer questions carrying 10 marks each for a total of 50 marks. [3] The questions cover topics on operational amplifiers, filters, timers, PLLs, DACs, ADCs and their applications in linear integrated circuits.

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    AprilMay 2023

    Uploaded by

    Hero Kurella
    22 views2 pages
    [1] The document is a question paper for the subject Linear IC Applications for B. Tech II Year II Semester Examinations. [2] It consists of two parts - Part A contains 10 short answer questions carrying 25 marks total. Part B contains 5 long answer questions carrying 10 marks each for a total of 50 marks. [3] The questions cover topics on operational amplifiers, filters, timers, PLLs, DACs, ADCs and their applications in linear integrated circuits.

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    [1] The document is a question paper for the subject Linear IC Applications for B. Tech II Year II Semester Examinations. [2] It consists of two parts - Part A contains 10 short answer questions carrying 25 marks total. Part B contains 5 long answer questions carrying 10 marks each for a total of 50 marks. [3] The questions cover topics on operational amplifiers, filters, timers, PLLs, DACs, ADCs and their applications in linear integrated circuits.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    22 views2 pages

    AprilMay 2023

    Uploaded by

    Hero Kurella
    [1] The document is a question paper for the subject Linear IC Applications for B. Tech II Year II Semester Examinations. [2] It consists of two parts - Part A contains 10 short answer questions carrying 25 marks total. Part B contains 5 long answer questions carrying 10 marks each for a total of 50 marks. [3] The questions cover topics on operational amplifiers, filters, timers, PLLs, DACs, ADCs and their applications in linear integrated circuits.

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    Code No: 154BH

    R18
    JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
    B. Tech II Year II Semester Examinations, April/May - 2023
    LINEAR IC APPLICATIONS
    JN
    (Common to ECE, EIE)
    Time: 3 Hours Max. Marks: 75

    Note: i) Question paper consists of Part A, Part B.


    TU
    ii) Part A is compulsory, which carries 25 marks. In Part A, Answer all questions.
    iii) In Part B, Answer any one question from each unit. Each question carries 10 marks
    and may have a, b as sub questions.
    H
    PART – A
    (25 Marks)
    U
    1.a) Define slew rate and PSRR. [2]
    b) What are the properties of dual input unbalanced output differential amplifier? [3]
    se
    c) What is a voltage regulator? Mention types of voltage regulators. [2]
    d) Explain how comparator is used as level detector. [3]
    e) What are the characteristics of all pass filters? [2]
    d
    f) The resonant frequency f0 of a band pass filter is 1 kHz and its bandwidth is 3 kHz. Find
    the value of Q. [3]
    g) Why control terminal of IC 555 timer is connected to ground through a 0.01µF bypass
    pa
    capacitor? [2]
    h) Define capture range and Lock range in PLL. [3]
    i) Which is the fastest ADC and why it is so? [2]
    pe
    j) The LSB of a 10-bit DAC is 20 mV. Calculate the output voltage for an input,
    1011001101. [3]

    PART – B
    rs
    (50 Marks)

    2.a) Explain about DC coupling and cascaded differential amplifier stages.


    20
    b) What is an Op-amp? Briefly explain the function of different stages of an Op-amp with
    respect to its block schematic. [5+5]
    OR
    3.a) The two input terminals of an op-amp are connected to voltage signals of strength 745μV
    23
    and 740μV respectively. The gain of the OP-AMP in differential mode is 5 ×105 and its
    CMRR is 80dB. Calculate the output voltage and percentage error due to common mode.
    b) Draw the circuit diagram of non-inverting amplifier and explain its working. [5+5]

    4.a) Design an instrumentation amplifier to have a variable differential gain in the range
    5-200. Use a 50 kilo-ohm potentiometer.
    b) Draw the circuit diagram of an integrator and explain its working. [5+5]
    OR
    5.a) Describe the working of practical differentiator circuit. Derive the expression for output
    voltage.
    b) Explain the monostable multivibrator operation by using op amp. [5+5]
    JN
    6.a) Discuss in detail about band pass filter with neat sketch.
    b) Explain the operation of the second order low pass Butterworth filter. [5+5]
    OR
    7.a) Explain, how to obtain triangular wave using a square wave generator.
    TU
    b) What is VCO, draw and explain the functional block diagram of VCO. [5+5]

    8.a) Explain the monostable operation of 555 IC timer with neat sketch.
    b) Draw and explain the circuit of an astable multivibrator using 555 timer. [5+5]
    H
    OR
    9.a) Draw and explain the principles and description of individual blocks of PLL in detail.
    b) Compute the free running frequency fo, lock in range and capture range of PLL 565.
    U
    Assume RT=20 k-ohm, CT=0.01μF, C=1μF and supply voltage is ± 6v. [5+5]
    se
    10.a) What are the draw backs of weighted resistor DAC? How they can be overcome by using
    R-2R ladder DAC.
    b) Find out step size and analog output for 4-bit R-2R ladder DAC, when input is 0 1 1 1
    d
    and 1 1 1 1, assume Vref = +5V. [5+5]
    OR
    11.a) With neat sketch explain the principle and operation of successive approximation ADC.
    pa
    b) Enlist the advantages and disadvantages of dual slope ADC. [5+5]
    pe
    ---ooOoo---
    rs
    20
    23

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