AprilMay 2023

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Code No: 153AT R18

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD


B. Tech II Year I Semester Examinations, April/May - 2023
ELECTRONIC DEVICES AND CIRCUITS
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(Common to ECE, EIE, MCT)
Time: 3 Hours Max. Marks: 75

Note: i) Question paper consists of Part A, Part B.


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ii) Part A is compulsory, which carries 25 marks. In Part A, Answer all questions.
iii) In Part B, Answer any one question from each unit. Each question carries 10 marks
and may have a, b as sub questions.
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PART – A
(25 Marks)
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1.a) Define forward static and dynamic resistances of diode. [2]
b) What is the difference between Clipping and Clamping? [3]
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c) Why is BJT a current controlled Transistor? [2]
d) Define the Stability factors for Fixed Bias Circuit. [3]
e) Define Transconductance. [2]
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f) What are the advantages of FET over BJT? [3]
g) What are the conditions for approximate h-parameter model? [2]
h) Draw h-parameter model for CE amplifier. [3]
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i) Draw the Small Signal Model of FJET. [2]
j) Why the input impedance of FET is higher than BJT? [3]

PART – B
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(50 Marks)

2.a) Explain the operation of forward biased and reverse biased PN junction Diode.
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b) Discuss the operation of capacitive filter with bridge rectifier and also derive an
expression for its stability factor. [5+5]
OR
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3.a) Describe the current components in a PN junction diode. Also derive the Diode current
equation.
b) Explain the operation of negative clamping circuit. [5+5]
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4.a) With necessary circuit and waveform, explain the switching characteristics of a transistor
in detail.
b) In a Silicon transistor circuit with a fixed bias, VCC=9V, RC=3KΩ, RB=8KΩ, β = 50,
VBE=0.7V. Find the operating point and Stability factor. [5+5]
OR
5.a) Explain the DC and AC load Line analysis.
b) Briefly explain about Bias Compensation and Stabilization. [5+5]
6.a) Describe the construction and working of UJT with its equivalent circuit and V-I
Characteristics.
b) With a neat diagram explain the working of Varactor Diode. [5+5]
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OR
7.a) Describe the principle of operation of Tunnel diode with a neat diagram.
b) Explain the working of a P channel JFET and draw the V-I characteristics of it. [5+5]
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8.a) Derive the equations for voltage gain, current gain, input impedance and output
admittance for a BJT using low frequency h-parameter model for CC configuration.
b) If the Common Emitter h –parameters of a transistor are given by hie = 2000 Ω, hfe = 49,
hre = 5.5 × 10-4 and hoe = 2.5 × 10-5, find the common base h-parameters of the transistor.
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[5+5]
OR
9.a) Illustrate the steps involved in analyzing a BJT amplifier circuit using small signal model.
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b) Draw the circuit diagram and equivalent circuit of an emitter follower amplifier and
derive the expression for Av, Ai and input impedance. [5+5]
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10.a) Draw the circuit of source follower Amplifier and derive the expressions for AI , AV, Ri
and Ro.
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b) Describe the construction and explain the operation of depletion mode MOSFET. Also
draw the static characteristics. [5+5]
OR
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11.a) Illustrate the behavior of a MOSFET based amplifier circuit with tuned load. Also deduce
expression for voltage gain at center frequency, Q and Bandwidth.
b) Draw and explain small-signal model of a MOSFET. [5+5]
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