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 Outputs
74LCX2244 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs with 26Ω Series Resistors in the
October 1995
Revised May 2003

74LCX2244
Low Voltage Buffer/Line Driver with 5V Tolerant Inputs
and Outputs with 26Ω Series Resistors in the Outputs
General Description Features
The LCX2244 contains eight non-inverting buffers with ■ 5V tolerant inputs and outputs
3-STATE outputs. The device may be employed as a mem- ■ 2.3V to 3.6V VCC specifications provided
ory address driver, clock driver and bus-oriented transmit-
ter/receiver. The LCX2244 is designed for low voltage ■ 7.5 ns tPD max (VCC = 3.3V) 10 µA ICC max
(2.5V or 3.3V) VCC applications with capability of interfac- ■ Power down high impedance inputs and outputs
ing to a 5V signal environment. The 26Ω series resistors ■ 26Ω-series resistors in the outputs
help reduce output overshoot and undershoot. ■ Supports live insertion/withdrawal (Note 1)
The LCX2244 is fabricated with an advanced CMOS tech- ■ ±12 mA output drive (VCC = 3.0V)
nology to achieve high speed operation while maintaining
CMOS low power dissipation. ■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 500 mA
■ ESD performance:
Human body model > 2000V
Machine model > 200V
■ Leadless DQFN package
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.

Ordering Code:
Package
Order Number Package Description
Number
74LCX2244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LCX2244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX2244BQ MLP020B 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241,
(Preliminary) (Preliminary) 2.5 x 4.5mm
74LCX2244MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCX2244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

© 2003 Fairchild Semiconductor Corporation DS012569 www.fairchildsemi.com

74LCX2244
Logic Symbol Pin Descriptions
IEEE/IEC Pin Names Description

OE1, OE2 3-STATE Output Enable Inputs

I0–I7 Inputs
O0–O7 Outputs

Truth Tables
Inputs Outputs

OE1 In (Pins 12, 14, 16, 18)

L L L
L H H
H X Z
Connection Diagrams
Pin Assignments for Inputs Outputs
SOIC, SOP, SSOP, and TSSOP
OE2 In (Pins 3, 5, 7, 9)
L H L
L H H
H X Z
H = HIGH Voltage Level
X = Immaterial
L = LOW Voltage Level
Z = High Impedance

Pad Assignment for DQFN

(Top Through View)

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 74LCX2244
Absolute Maximum Ratings(Note 2)
Symbol Parameter Value Conditions Units
VCC Supply Voltage −0.5 to +7.0 V
VI DC Input Voltage −0.5 to +7.0 V
VO DC Output Voltage −0.5 to +7.0 Output in 3-STATE
V
−0.5 to VCC + 0.5 Output in HIGH or LOW State (Note 3)
IIK DC Input Diode Current −50 VI < GND mA
IOK DC Output Diode Current −50 VO < GND
mA
+50 VO > VCC
IO DC Output Source/Sink Current ±50 mA
ICC DC Supply Current per Supply Pin ±100 mA
IGND DC Ground Current per Ground Pin ±100 mA
TSTG Storage Temperature −65 to +150 °C

Recommended Operating Conditions (Note 4)

Symbol Parameter Min Max Units
VCC Supply Voltage Operating 2.0 3.6
V
Data Retention 1.5 3.6
VI Input Voltage 0.0 5.5 V
VO Output Voltage HIGH or LOW State 0.0 VCC
V
3-STATE 0.0 5.5
IOH/IOL Output Current VCC = 3.0V − 3.6V ±12.0
VCC = 2.7V − 3.0V ±8.0 mA
VCC = 2.3V − 2.7V ±4.0
TA Free-Air Operating Temperature −40.0 85.0 °C
∆t/∆V Input Edge Rate, VIN = 0.8V − 2.0V, VCC = 3.0V 0.0 10.0 ns/V
Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 3: IO Absolute Maximum Rating must be observed.
Note 4: Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics
VCC TA = −40°C to +85°C
Symbol Parameter Conditions Units
(V) Min Max
VIH HIGH Level Input Voltage 2.3 − 2.7 1.7
V
2.7 − 3.6 2.0
VIL LOW Level Input Voltage 2.3 − 2.7 0.7
V
2.7 − 3.6 0.8
VOH HIGH Level Output Voltage IOH = −100 µA 2.3 − 3.6 VCC − 0.2
IOH = −4 mA 2.3 1.8
IOH = −4 mA 2.7 2.2
V
IOH = −6 mA 3.0 2.4
IOH = − 8mA 2.7 2.0
IOH = −12 mA 3.0 2.0
VOL LOW Level Output Voltage IOL = 100 µA 2.3 − 3.6 0.2
IOL = 4 mA 2.3 0.6
IOL = 4 mA 2.7 0.4
V
IOL = 6 mA 3.0 0.55
IOL = 8 mA 2.7 0.6
IOL = 12 mA 3.0 0.8
II Input Leakage Current 0 ≤ VI ≤ 5.5V 2.3 − 3.6 ±5.0 µA
IOZ 3-STATE Output Leakage 0 ≤ VO ≤ 5.5V 2.3 − 3.6 ±5.0
µA
VI = V IH or VIL

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74LCX2244
DC Electrical Characteristics (Continued)

VCC TA = −40°C to +85°C

Symbol Parameter Conditions Units
(V) Min Max
IOFF Power-Off Leakage Current VI or VO = 5.5V 0.0 10.0 µA
ICC Quiescent Supply Current VI = VCC or GND 2.3 − 3.6 10.0
µA
3.6V ≤ VI, VO ≤ 5.5V (Note 5) 2.3 − 3.6 ±10.0
∆ICC Increase in ICC per Input VIH = VCC − 0.6V 2.3 − 3.6 500 µA
Note 5: Outputs disabled or 3-STATE only.

AC Electrical Characteristics
TA = −40°C to +85°C, RL = 500Ω
VCC = 3.3V ± 0.3V VCC = 2.7V VCC = 2.5 ± 0.2V
Symbol Parameter Units
CL = 50pF CL = 50pF CL = 30pF
Min Max Min Max Min Max
tPHL Propagation Delay 1.5 7.5 1.5 8.5 1.5 9.0
ns
tPLH Data to Output 1.5 7.5 1.5 8.5 1.5 9.0
tPZL Output Enable Time 1.5 9.0 1.5 10.0 1.5 10.5
ns
tPZH 1.5 9.0 1.5 10.0 1.5 10.5
tPLZ Output Disable Time 1.5 7.0 1.5 8.0 1.5 8.4
ns
tPHZ 1.5 7.0 1.5 8.0 1.5 8.4
tOSHL Output to Output Skew (Note 6) 1.0
ns
tOSLH 1.0
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).

Dynamic Switching Characteristics

VCC TA = 25°C
Symbol Parameter Conditions Units
(V) Typical
VOLP Quiet Output Dynamic Peak VOL CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 0.35
V
CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 0.25
VOLV Quiet Output Dynamic Valley VOL CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 −0.35
V
CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 −0.25

Capacitance
Symbol Parameter Conditions Typical Units
CIN Input Capacitance VCC = Open, VI = 0V or VCC 7.0 pF
COUT Output Capacitance VCC = 3.3V, VI = 0V or VCC 8.0 pF
CPD Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, f = 10 MHz 25.0 pF

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 74LCX2244
AC LOADING and WAVEFORMS Generic for LCX Family

FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)

Test Switch
tPLH, tPHL Open
tPZL, tPLZ 6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
tPZH,tPHZ GND

Waveform for Inverting and Non-Inverting Functions 3-STATE Output High Enable and
Disable Times for Logic

Propagation Delay. Pulse Width and trec Waveforms Setup Time, Hold Time and Recovery Time for Logic

trise and tfall

3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tr = tf = 3ns)

VCC
Symbol
3.3V ± 0.3V 2.7V 2.5V ± 0.2V
Vmi 1.5V 1.5V VCC/2
Vmo 1.5V 1.5V VCC/2
Vx VOL + 0.3V VOL + 0.3V VOL + 0.15V
Vy VOH − 0.3V VOH − 0.3V VOH − 0.15V

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74LCX2244
Schematic Diagram Generic for LCX Family

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 74LCX2244
Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B

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74LCX2244
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D

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 74LCX2244
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm
Package Number MLP020B
(Preliminary)

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74LCX2244
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package Number MSA20

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 Outputs
74LCX2244 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs with 26Ω Series Resistors in the
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support
which, (a) are intended for surgical implant into the device or system whose failure to perform can be rea-
body, or (b) support or sustain life, and (c) whose failure sonably expected to cause the failure of the life support
to perform when properly used in accordance with device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the www.fairchildsemi.com
user.

11 www.fairchildsemi.com
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