Designing a Strong Physically Unclonable

Function using Low Power LFSR

BVDN. Srilakshmi1,a), Kiran Mannem 2,b) , K.Jamal3,c), manchalla.o.v.p.kumar4,d)
1
M.Tech Scholar, 1Department of ECE, GRIET, Hyderabad, India.
234
Department of ECE, GRIET, Hyderabad, India.

a)
srilakshmi.bvdn@gmail.com,
b)
kiranmannem14@gmail.com,
c)
kjamal24@gmail.com,
d)
pavanomkar81@gmail.com.

Abstract— In this new era, security is been the major concern in day to day life. To secure the data many security models are been
introduced. Advanced Encryption Systems such as encryption, decryption methods are having a drawback, that it uses a key to store the
data in its devices.The key can be easily cloned by any 3rd party person and there is a chance of losing data and the device security. PUF
(Physically Unclonable Function) is mainly used for device authentication. It helps to identify the data and its device while performing
authentication process. In front-end the PUF is used for device authentication where as in back-end LFSR(Linear-Feedback-Shift-Register)
is used to generate random numbers which helps to increase more security. Previously the PUF based LFSR is been implemented and
observed the results. In this project the PUF is implemented using LP LFSR(Low power Linear Feedback Shift Register) in order to show
more improvement in terms of security by increasing the randomness.

Keywords: Switching activity, LFSR(Linear Feedback Shift Register), Security, Randomness.

I.INTRODUCTION

In our daily life telecommunication systems such as mobile phones and embedded system based devices are playing a crucial role[1].
Each and every tasks of these devices should be securely authenticated. The sensitive information between end to end user should be
handle with care. The user can securely able to store the data. In-fact, electronic gadgets are playing a major role in performing
transactions and also acts as a security primitive for storing the users data.The processing of information is enabled through
flexibility of software[2]. However, there exists certain problems related to security. To avoid such problems, they came up with the
solution named as EEPROM and SRAM. These memories contain security based keys in It[3]. But there is a threat that the keys can
be easily grabbed or cloned.PUF’s(Physical unclonable functions) are the innovative security primitive which is utilized for
authentication as well as storage of secret information without the requirement of EEPROMs or any other hardware which is
described above. PUF is an alternative solution for storing secret information in digital memory. It works according to its physical
characteristics of that particular IC[4][5]. It consumes less area and power when compared to SRAM/EEPROM[6]. The IC should be
enabled since the process of encryption is based on chip[7][8].

SECURITY ATTACKS :
Security attacks related to computer networking can be characterized by observing function of system by using its information.
Generally the flow can be described from source point of information such as, particular file or location of a memory, to the end
user.There are certain categories of attacks, such as:
1. Fabrication
2. Modification
3. Interruption
4. Interception
5. Passive
6. Active

Fig 1: Fabrication
The above Fig1 represents Fabrication attack. It shows that there is no proper flow from source to destination. There exists a 3rd
party which is involving in between source and destination and inserting fake objects into fabrication system. This attack can be
recognized as authenticity attack.

Fig 2: Modification

The above Fig 2 represents modification attack. In this attack the 3rd party will not only try to acquire access but also interfere with
the access. This attack can be recognized as integrity attack.

Fig 3: Interruption

The above Fig 3 represents Interruption attack. In this attack the main benefit of the hardware gets destroyed. This attack can be
recognized as availability attack.

Fig 4: Interception

The above Fig 1.4 represents interception attack. The 3rd party acquire access to hardware benefits. The 3rd party could be a program,
computer or a person. This type of an attack can be recognized as confidentiality attack.
 Source Destination

Fig 5 : Normal

Normal Flow is described as the information passing from source to destination without any type of attack.The above Fig 5
represents the normal flow diagram.

Passive

Interception

Release of Traffic
message Analysis

Fig 6: Passive Network Security Threat

The above Fig 6 represents passive network security threat. Passive attacks are the attacks where one can observe during
transmissions. There are again 2 types of attacks :
a) Release of message contents
b) Traffic Analysis

a) Release of message contents: This can be understood easily. A file which contains confidential information, telephone
conversation and an email are some of the examples of this particular attack.

b) Traffic Analysis : The traffic analysis uses encryption method[10]. The normal message is converted to code format, so that the
3rd party cannot able to extract the information from the original message. But there is a change that the attacker could be able to
analyze the bit length and its frequency and also able to analyze the location.
In passive attacks, it is difficult to analyze and detect the data because the data cannot be altered. Thus, Passive attacks can be
prevented but cannot able to detect.

Active attacks are the 2nd major type of attacks. It involves in some stream cipher data modification. Some of the types of active
attacks are as follows :
1) Replay
2) Modification of messages
3) Denial of service
 Active Threats

Interruption Modification Fabrication

Fig:7 Active Network Security Threats

Modification of messages: Here a non authorized effect is produced by delayed messages or by the recorded messages. Also some
portion of a legal message is altered.

Denial of Service(DOS): It helps to prevent the normal usage of communications. This attack is target oriented. There is an another
form of denial service which disrupts the whole network, either by overloading it with messages or by disabling to degrade the
performance.

Active attacks are quite opposite to passive attacks. In passive attacks prevention is possible but detection is difficult, whereas in
active attacks detection is possible and prevention is difficult.

SECURITY SERVICES
There are many security services, out of all these are some of the important security services :
1) Confidentiality
2) Authentication
3) Integrity
4) Nonrepudiation
5) Access Control
6) Availability

1) Confidentiality:Transmitted data can be protected through confidentiality from passive attacks. There are several levels of
protection that can be identified. The wide range of service can help to protect complete user information transmitted in between 2
users for some duration.

2) Authentication: Authentication helps to provide authentic communication.There are 2 aspects in authentication. 1st one is to
provide connection form the terminal to host. 2nd aspect is that there is no interference of the connection of 3rd party.

3) Integrity: The integrity can be applied to the streams to which confidentiality is applied.It helps to assure that the messages are
delivered and received properly. It helps to identify messages as well as denial of service. This service is mostly related with active
attacks.
4) Nonrepudiation: It is a process which helps to prevent the receiver or sender from rejecting the transmitted message. By this the
receiver can analyze that by whom the message was sent either by original sender or by unauthorized sender.

5) Access Control: Access control is used to manage the host systems and provide access to the applications through
communication links. Access control can be achieved by identifying the access gain of each entity or it should be authenticated, in
order to provide access rights to any individual.

6) Availability: Many different types of attacks can show loss in availability. Some attacks are more flexible for encryption and
authentication. Physical effort is necessary to prevent reduction in availability.

LINEAR FEEDBACK SHIFT REGISTER(LFSR)

Linear Feedback Shift register(LFSR) is used for generating random numbers. It consists of 2 parts such as shift register and a
feedback function. Mostly LFSR is used in “cryptography”[9]. The LFSR can be analyzed whether it can produce good sequence of
bits or not, depending upon its equation. Mostly the equation of LFSR will be considered as a primitive polynomial. LFSR can be
implemented in both the ways that is, structure can be drawn and derived with respect to polynomial equation or equation can be
analyzed with the help of the structure.
 II.LITRETURE SURVEY

Kumar,G.S., Saminadan,V have proposed an approach using low power LFSR with 3 ring oscillators along with the concept of
fuzzy logic. By using this new version of LFSR, the power consumption got reduced while generating a test pattern. In order to test
the circuits BIST(Built-in-self-test) are used. Since Reduction of power is the major requirement in test circuits and design circuits,
Low power LFSR helps to achieve great reduction of power. In this project the power got reduced upto 4.5% when compared with
existing designs.

Shaer,L., Sakakini,T., Kanj,R., Chehab,A., and Kayssi A, have proposed a design which is efficient in producing more
randomness at the output. This design also helps to reduce the power consumption. As the randomness increased at the output there
is a great improvement in terms of security. Many techniques are also used to reduce the power. The proposed design is
implemented using H-spice tool. Less energy consumption with good security improvement are shown in simulation results.

Kitsos P., Sklavos N., Zervas N, and Koufopavlou o., have proposed a less power LFSR for blue-tooth communication. Simple
techniques were also used to reconfigure LFSR. Two methods were also introduced in order to reduce the switching activity of
conventional LFSR. Clock gating and gray code representation are 2 types of techniques which help to reduce the power
consumption. Advanced encryption /decryption process are also used to widen the bit length.

Brazzarola, M., and Fummi F, have analyzed new characteristics related to power consumption of Built in self test design
connected to circuit under test of combinational circuit. The LFSR is designed using primitive polynomial.Testing play
a major role in case of every design. Now a days BIST is been popular for testing. It is embedded in circuits for testing purpose.
But there exists an issue related to power consumption. This can be controlled by test pattern which increase more switching
activity to reduce power consumption.

Kumar, P., & Kamatchi, S. have proposed PUF based LFSR which helps to increase more security for hardware devices. They
have introduced two types of PUF’s one is defer based PUF and other one is postponement based PUF. As the main pre-requisite is
to provide more security for the hardware device, PUF helps to improve more security while authenticating the device. The proposed
structure is implemented on FPGA. The entire project is implemented using software tool Xilinx vivado 2019.2 by Verilog HDL
coding.

Gassend, B., Clarke, D., van Dijk, M., & Devadas, S. (n.d.). have proposed a new concept of Physically Unclonable Function.
They have introduce a brand new controlled PUF structure (CPUF), which helps to create more security. CPUF works according to
its algorithm. There are some protocols that got introduced to share the secret link flexibly between user and the device.This can
work flexibly even in the condition that many un-trustworthy parties are involved. CPUF’s creates a certificate that describes about
the device used for computing. This certificate creates more security. They have also discussed about SLA(Software License
Application).

Thubrikar,T., Kakde,S., Gaidhani,S, Kamble S., and Shah,N., have proposed a test pattern generator with less power
consumption. They have introduced an extra circuity to show improvement in power consumption. The extra circuit is the RI
(Reduced Injection)circuit. Depending upon its switching activity the power consumption will get reduced. LFSR helps to improve
the test pattern. In this project they have implemented 32 bit test pattern generator with low power consumption. The proposed
design was implemented using a software tool xilinx 13.1 design suite.

III. BACKGROUND AND RELATED WORKS

In the present situation security is playing a major role in everyone’s life. The device security and data security is been so important.
To achieve the best security PUF(Physically Unclonable Function) helps to identify the response and its device while authentication
process. PUF’s are of various types. It got categorized into two types analog and digital. In analog PUF’s there are certain types such
as volatge threshold PUF’s and LC PUF’s. These PUF’s are embedded upon IC, which helps to calculate the number of electrons
that are used as output signal of analog PUF. The output response of analog PUF is again converted into digital form.

The digital PUF’s are of two types they are delay based PUF and memory based PUF. Delay based PUF’s are again sub divided into
two types such as ring oscillator based PUF and arbiter PUF. Ring Oscillator PUF is a simple PUF circuit, it vibrates at a particular
frequency. It helps to produce 0’s and 1’s by differentiating the frequencies of 2 similar Ring Oscillator circuits.

Arbitrary PUF is another type of delay based PUF. It helps to create strong PUF models. It consists of exponential CRP(Challenge
Response Pair), and also consists of similar kind of multiplexers as the building blocks in its architecture. Depending upon the
selection lines the data will be selected and passed to the D latch which is present at the end. The D latch decides the fastest path
among the set of multipliers by generating the output as either logic 1 or logic 0.

Concept of Basic LFSR

Linear Feedback shift register(LFSR) is used as a basic shift register with a feedback. It is mainly used in cryptography to generate
random numbers. It uses a primitive polynomial and even number of xor gates known as taps to produce long random number
sequence.The architecture of basic LFSR is shown below.
 Fig 8 : Basic structure of LFSR

The above Fig 8 represents basic linear feedback shift register, In the figure Sn to s1 are the basic shift registers. All the shift
registers are having a feedback function f(s).

Introduction to Low Power LFSR

Previously, the concept of basic LFSR is explained. Here in this section let us discuss about different type of LFSR. Low power
LFSR is used to improve more security. Due to its switching activity the randomness is increased greatly. The architecture of Low
power LFSR is shown below:

Fig 9: Basic structure of Low power LFSR

The above Fig 9 represents the basic structure of Low power LFSR. It is of 4 bit, so it contains 2 D flip-flops on either side. The
middle flip-flop represents the dummy flip-flop which is used to connect the 4 flip flops. It is also called as “Bipartite circuit”. To
each flip-flop an RI(Random Injection) circuit is connected. The RI circuit consists of AND gate and OR gate both connected to the
multiplexer which can be seen in the figure. There is also another set of multiplexers which are connected to both the set of RI
circuits. There is an xor gate connected at the top which acts as a feedback function. The structure of RI circuit is shown below.

Fig 10 : Random Injection circuit(RI circuit)

The above fig 10 represents the random injection circuit.This injection technique helps to generate new kind of test patterns between
two consequent patterns by utilizing random-bit injection(R) such as 0 or 1. This is produced as a successive bit of an intermediary
pattern when change occurs in the bit of corresponding pattern pairs. This circuit helps to improve randomness in bits by its way if
injecting new intermediate test patterns between different pair of test patterns.

Concept of PUF based LFSR

Physically Unclonable Function (PUF) based LFSR is used as a security primitive device. It helps to identify the output response
coming out from a particular device. It’s working mainly depends upon features such as flexibility, reliability and randomness. The
architecture of PUF based LFSR is given below.

Fig 11: PUF based LFSR

The above Fig 11 is the architecture of PUF based LFSR. The output of weak PUF is given to the Bit extractor which of 1 bit
response. The output of bit extractor is given to Pi(x), where Pi(x) is the array of PUF responses. The Pi(x) is given as a feedback
response to the basic LFSR. Finally the random numbers are been generated.

Weak PUF Structure:

Fig 12: Weak PUF Structure

The above Fig 12 represents the weak PUF structure. It consists of two LUT’s which are basic shift registers. The two inputs for
LUT’s are given as one input as clock and the second one is 16 bit binary value. There are two multiplexers present, the output of
second multiplexer is connected as input to the first multiplexer and is named as N1. The output of first multiplexer is given to the
flip flop as a preset and is named as N2. The flip flop has a feedback from its output, which acts as a latch. The output of D-FF is
given to bit extractor. The internal circuit of the bit extractor is a 1 bit shift register which helps to produce the array of PUF
response bits.

Existing Design :
The existing design is of 16 bit LFSR based PUF.The architecture of existing design is shown below:
 Fig 13: Existing 16 Bit LFSR Based PUF

The above Fig 13 shows the existing 16 bit LFSR based PUF. In the existing design the PUF is designed and connected to the shift
registers through AND gate. The shift registers are divided into two in the middle sections and are connected with the help of xor
gates. This procedure helps to reduce the area and power consumption also gets reduced.

Proposed Design:

Fig 14: Proposed 32 Bit Low Power LFSR based PUF

The above Fig 14 represents the proposed 32 bit Low power LFSR based PUF. Here the weak PUF is connected as a feedback to the
low power LFSR. The weak PUF is of 16 bit .This 16 bit PUF is connected to 32 bit LFSR. The 32 bit LFSR is taken as a pair of
shift registers to reduce the area of the circuit. Then the number of xor gates are depicted as 16.Thus, the weak PUF is connected to
these 16 xor gates. The output produced is of 32 bit from each shift register of the pair.
 IV SIMULATION RESULTS
In this section, the simulation results, comparisons between randomness, power, area and delay of existing and the proposed
structures will be discussed. The simulation results of the proposed and existing are carried out using the software tool Xilinx ISE
14.7 Design Suite.

Existing Design RTL and Technology Schematic:

Fig 15: RTL Schematic of Existing 16 Bit LFSR Based PUF

The above Fig 15 represents the RTL schematic of existing 16 bit LFSR based PUF. It uses 8 XOR gates, 16 D Flip flops, Bit
extractor of 8 bit, where the outputs of each PUF are implemented with AND logic.

Fig 16: Technology Schematic of Existing 16 Bit LFSR Based PUF

The above Fig 16 shows the technology schematic of 16 Bit LFSR Based PUF. In technology schematic the design is more
elaborated.

Proposed Design RTL and Technology Schematic:

The below are the RTL and Technology Schematics of the proposed 32 bit Low power LFSR based PUF.
 Fig 17: RTL Schematic of Proposed 32 bit Low Power LFSR Based PUF

The above Fig 17 represents the RTL schematic of the proposed design. It consists of 16 xor gates. The PUF is connected to LFSR
using AND logic.

Fig 18: Technology Schematic of Proposed 32 bit Low Power LFSR Based PUF

The above Fig 18 represents the technology Schematic of proposed design. Here the blocks are represented in more elaborated .

Simulation Results of Existing Design:

Fig 19 : Simulation results of Existing 16 bit PUF Based LFSR

The above Fig 19 represents the simulation results of 16 Bit PUF. It shows that for every 50 nano seconds of clock, the randomness
in the output increases.
Simulation Results of Proposed Design:

Fig 20: Simulation result of 32 bit LP LFSR based PUF

The above Fig 20 represents the simulation results of proposed 32 bit Low Power LFSR based PUF. For every 50ns the randomness
in bits is increased.

Existing and Proposed Design Timing Diagrams:

50ns 50ns

S[16:1] 65535 43690 S[16:1] 4294967295 2863311530

CLK[1] CLK[1]

RST[0] RST[0]

Fig 20: Timing diagram of existing 16 bit LFSR based PUF Fig 22: Timing diagram of Proposed 32 bit LP LFSR based
PUF
COMPARISION TABLE OF PAD & RANDOMNESS:
The below Table 1 shows the comparision of power, area, delay and randomness between basic LFSR, Low power LFSR(LP LFSR),
existing 16 bit LFSR based PUF and Proposed 32 bit Low LFSR based PUF. When compared to basic LFSR, Low power LFSR is
have less area power and delay and randomness is also improved. When the proposed design is compared with the existing design
there is a great improvement in randomness and the power consumption as well as area are not more than 50% than the existing.The
delay is remained as same as the existing design which could be treated as an advantage.

POWER AREA DELAY RANDOMNESS for every 50ns

(W) (LUT’s) (ns)
50ns 100ns
Basic LFSR 133.93mw 1 out of 1920 1.997ns 14 29
LUTs
Low Power LFSR 91.34mw 6 out of 63400 0.864ns 15 255
LUT’s
Existing 16bit LFSR 85.04mw 10 out of 0.981ns 65535 43690
Based PUF 63,000 LUT’s
Proposed Low Power 125.63mw 16 out of 0.981ns 4294967295 2863311530
LFSR Based PUF 63,400 LUT’s

Table 1: Comparision of PAD(Power, Area, Delay) & Randomness

 V. CONCLUSION
In this work, the implementation of the existing 32 bit Low Power LFSR Based PUF design is carried out by using the software tool
XILINX ISE DESIGN SUITE 14.7 version. In existing work as the strong PUF is good in terms of exponential CRP(Challenge
Response Pairs) space, but as it creates huge hardware overhead, the weak PUF is considered and tried to realize it as a strong
PUF.The proposed work shows great improvement in generating randomness which leads to better security while authentication.
From the simulation results, it is observed that for every 50ns of clock, the randomness in the bits got increased, when compared
with the existing design. This is achieved due to its switching activity which helps to increase more number of random numbers.The
project can be further extended by concentrating upon the parameters such as the power consumption and its area.

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