1 Rectifier Circuits: Transformer Rectifier Filter Regulator
1 Rectifier Circuits: Transformer Rectifier Filter Regulator
1 Rectifier Circuits: Transformer Rectifier Filter Regulator
Handout # 04
1 Rectifier Circuits
1.1 DC Power-Supply System
Most electronic devices/equipments require power from a Direct Current (dc or DC) source.
A power-supply unit converts available input ac signal into a dc signal that is much needed
for all electronic circuits, devices and applications[1, 2, 3, 4].
230 V
Transformer Rectifier Filter Regulator load/ckt
50 Hz
1.5
1.5 1.5
1
1 1
0.5 0.5
0.5
0 0 0
Figure 1
2060720-02#20240610LJS 1 / 23
L. Joyprakash Singh, PhD EC–204 Basic Electronics June 10, 2024
Hence, the average value of an ac voltage over the time period of the oscillation is zero.
Therefore,
1 T 2 Vm2 T Vm2 T
Z Z Z
2 2
Vrms = v (t)dt = sin (ωt)dt = 2 sin2 (ωt)dt
T 0 T 0 2T 0
Vm2 T
Z
= {1 − cos(2ωt)} dt ∵ cos(2θ) = cos2 (θ) − sin2 (θ) = 1 − 2 sin2 (θ)
2T 0
T
Vm2 Vm2 sin(2ω(t)
T
= [dt]0 −
2T 2T 2ω 0
2 2
Vm V
= T − m {sin(2ωT ) − sin(0)}
2T 4ωT
Vm2 Vm2
= − {sin(4π) − sin(0)}
2 8π
Vm2 Vm2
= − (0 − 0)
2 8π
Vm2
=
2
Hence, the rms voltage of the ac voltage is given by
r
Vm2 Vm
Vrms = = √ = 0.7071 Vm = 70.71%Vm
2 2
For example[12], 10 volts AC RMS is the amount of voltage that would produce the same
amount of heat dissipation across a resistor of given value as a 10 volt DC power supply.
Also known as the “equivalent” or “DC equivalent” value of an AC voltage or current. For
a sine wave, the RMS value is approximately 0.707 of its peak value.
(a) (b)
As shown in Fig. 2(a), we write signals on the primary and the secondary sides of the
transformer as
where VP(m) = the peak value of the input ac voltage to the transformer, and
VS(m) = the peak value of the input ac voltage to the diode, D1
Circuit Operation: Over one full cycle, defined by the period T (or 2π), the average
value (the algebraic sum of the areas above and below the axis) of vi (t) is zero. The circuit
of Fig. 2, called a half-wave rectifier, will generate a waveform, vo (t), that will have an
average value of particular use in the ac-to-dc conversion process.
However, we know that the output voltage appeared at the load of Fig. 2 is
Vm sin(ωt), 0 ≤ t ≤ T /2
vo (t) =
0, T /2 ≤ t ≤ T
It may be noted that the frequency of the signal in half-wave rectifier doesn’t change, that
is, F = Fprimary = Fsecondary = 50 Hz.
D1 D1
+ +
RL vo (t) RL vo (t)
− −
(a) Circuit at +ve half cycle (b) Circuit at −ve half cycle
During the interval 0 ≤ t ≤ T /2 or the positive half cycle in Fig. 4(d), the polarity of the
applied voltage vi (t) is such as to establish “pressure” in the direction indicated and turn
ON the diode, that is, the diode is in the forward bias mode. Substituting the short-circuit
equivalence for the ideal diode will result in the output waveform as shown in Fig. 4(f),
where it is fairly obvious that the output signal is an exact replica of the applied signal.
The two terminals defining the output voltage are connected directly to the applied signal
via the short-circuit equivalence of the diode[4].
For the period T /2 ≤ t ≤ T , the polarity of the input, vi (t), is negative, and the resulting
polarity across the ideal diode produces an “OFF” state equivalent to an open-circuit. The
result is the absence of a path for charge to flow, and vo (t) = iRL = (0)RL = 0 V for the
period T /2 ≤ t ≤ T . The input vi (t) and the output vo (t) are sketched together in Fig. 4
for comparison purposes. The output signal vo (t) now has a net positive area above the
axis over a full period as shown in Fig. 4(f).
vp (t) vp (t)
VP (m) VP (m)
0 ωt 0 t
π 2π 3π 4π 5π 6π T T 3T 2T 5T 3T
2 2 2
vi (t)
(a) vi (t)
(b)
VS(m) VS(m)
0 ωt 0 t
π 2π 3π 4π 5π 6π T T 3T 2T 5T 3T
2 2 2
−VS(m) −VS(m)
vo (t)
(c) vo (t)
(d)
Vm Vm
0 ωt 0 t
π 2π 3π 4π 5π 6π T T 3T 2T 5T 3T
2 2 2
−Vm −Vm
(e) (f)
Figure 4: Either blue or red colored figure set to be used for explanation.
√
∴ VSecondary(peak) = VS(pk) = VS(m) = 2VS(rms)
vo (t)
√
Vm = VS(m) − VB = 2VS(rms) − VB
Vrms = 0.5Vm
Vdc = 0.3183Vm
0 t
T T 3T 2T 5T 3T
2 2 2
Vm = VS(m) − VB
P IV = VS(m) = Vm + VB
(d) RMS voltage, Vrms , of the output of a half-wave rectifier: The rms voltage
at the load is defined as
s " #1/2
1 T 2 Vm2 T /2 2 Vm2 T
Z Z Z
Vrms = v (t)dt = sin (ωt)dt + 0dt
T 0 o T 0 T T /2
" #1/2 " #1/2
Vm2 T /2 2 Z T /2
Z
V m
= 2 sin2 (ωt)dt + 0 = {1 − cos(2ωt)} dt
2T 0 2T 0
" #1/2
Vm2 T /2 Vm2 T /2
Z Z
= dt − cos(2ωt)dt
2T 0 2T 0
2 1/2
Vm T Vm2 sin(2ωT /2) Vm2 sin(0)
= − +
2T 2 2T 2ω 2T 2ω
2 1/2
V2
V 1
= m − m sin(2π) ∵ ω = 2πF = 2π
4 8π T
1
= Vm
2
Vm 2Vrms
Peak factor = = =2
Vrms Vrms
(f) Average output voltage, Vavg = Vdc , at the output of a half-wave rectifier:
The average voltage, Vavg = Vdc , of vo (t) over a time period, T , is defined as[11]
1 T
Z
Vavg = Vdc = vo (t)dt
T 0
Therefore, we can now compute
1 T
Z
Vavg = Vdc = Vm sin(ωt)dt
T 0
Vm T /2 Vm T
Z Z
= sin(ωt)d(t) + 0dt
T 0 T T /2
T /2
Vm cos(ωt) Vm
= − + ×0
T ω 0 T
Vm 1
= [− cos(ωT /2) + cos(0)] but ω = 2πF = 2π
ωT T
Vm
= [− cos(π) + 1]
2π
Vm
= [−(−1) + 1] ∵ cos(2π) = 1
2π
Vm
=
π
Vdc2 V 2 /π 2
2
Pdc = Idc RL = = m
RL RL
and the ac power to load is
2
2 Vrms Vm2 /4
Pac = Irms (RL + rd ) = =
RL + rd RL + rd
where rd is the diode resistance in forward bias. Therefore
Vm2 /π 2
RL 4 RL + rd rd
η= Vm2 /4 = 2 = 0.4053 1 +
π RL RL
RL +rd
η = 0.4053 = 40.53%
This indicates that the half-wave rectifier can convert a maximum 40.53% of ac power
into dc power, and the remaining power of 59.47% is lost in the rectifier circuit. In
fact, 50% power in the negative half cycle is not converted.
(i) Form factor of a half-wave rectifier: The form factor (f.f.) is defined as the ratio
between rms load voltage and average load voltage. The form factor of any half-wave
rectifier is as
Vrms Vm /2 π
Form Factor = = = ≈ 1.5708
Vdc Vm /π 2
Example-1: In Fig. 2(a), we know that Vprimary,rms = 230 V. Since the r.m.s. voltage of
the domestic electricity supply is 230 V. Electrical appliances should be designed to
withstand an instantaneous voltage of
√ √
VPrimary(m) = VP(pk) = 2VPrimary(rms) = 2 × 230 = 325.2691 V
and
N2 1
VSecondary(rms) = VPrimary(rms) = × 230 = 23 V
N1 10
F = Fprimary = Fsecondary = 50 Hz
The secondary peak voltage, VS(pk) or VS(m) , at the secondary of the transformer of
Fig. 2(a) is computed as
√ √
VS(m) = VS(peak) = VS(pk) = 2VSecondary(rms) = 2VS(rms) = 32.5269 V
Vm = VS(m) = 32.5269 V ∵ VB = 0
P IV = Vm = 32.5269 V
Vpeak-peak = Vp-p = 2Vm = 2 × 32.5269 = 65.0538 V
1
Vrms = Vm = 16.2635 V
2
Vm
Peak Factor = =2
Vrms
Vm 32.5269
Vavg = Vdc = = = 10.3536 V
π 3.1416
Vdc 10.3536
IL = = = 207.1 mA
RL 50
Idiode = IL(dc) = IL = 207.1 mA
Second approximation:
Vdc 10.1308
IL = = = 202.6 mA
RL 50
Idiode = IL(dc) = IL = 202.6 mA
D1
N1 : N2
20V, RL 2 kΩ
50Hz
Figure 6
(a) In the given circuit of Fig. 6, the diode will conduct during the negative part of
the input. For the full period, the dc level is
VS(rms) = 20 V
√ √
VS(m) = VS(peak) = 2VS(rms) = 2 × 20 = 28.2843 V
Vm = VS(m) = 28.2843 V
Vm 28.2843
VL = Vdc = − =− = −4.5016 V
π π
and its frequency, F =
(b) For a silicon diode, the output has
Vm − VB 40 − 0.7 39.3
VL = Vdc = − =− =− = −12.5096 V
π π π
(c) If Vm decreases to 10 V, then
10
VL = Vdc = − = −3.1831 V
π
10 − 0.7 9.3
VL |Si = Vdc |Si = − =− = −2.9603 V
π π
Example-3: For the half-wave rectifier circuit of Fig. 6,
Vm is given as shown on the right. Find
Vdc , PIV, and Vp-p .
and
P IV = Vm = 20 V
Pp-p = Ppeak-peak = 2Vm = 40 V
Example-4: Consider the centre-tapped half-wave rectifier as shown in Fig. 2(b). Deter-
mine the value of dc load current assuming that the diode used in the circuit is an
ideal diode.
Given that
N2 1
VS(rms) = VS(rms) = × 230 = 23 V
N1 10
RL = 50 Ω
which is also the peak or maximum voltage, Vm , appeared across RL because of the
ideal diode used. Therefore, the maximum load current is given by
Vm 16.2635
Im = = ∵ Vm = VS1(m) for any ideal diode
RL 50
∴ Im = 0.32527 = 325.27 mA
Vm
VS(m)
Full-wave
0
π 2π 3π 4π 5π 6π
ωt vi (t) vo (t) 0
π 2π 3π 4π 5π 6π
ωt
−VS(m) rectifier
−Vm
(a)
N1 : N2 D1
10:1
vi (t) N1 : N2 N1 : N2
230V,
50Hz D4 D1
RL 50 Ω vo (t) D3 D1
vi (t)
vo (t) vo (t)
+ − + + − +
vp (t) vi (t) vp (t) vi (t)
− −
D2 RL RL
D2 D4
D2 D3
(b) Centre-tapped full-wave rec-
tifier (c) Bridge rectifier (d) Bridge rectifier
+ −
− +
+ + − +
− RL vo (t) + RL vo (t)
− −
D2 D2
vi (t)
(a) Circuit at +ve half cycle vo (t)
(b) Circuit at −ve half cycle
0 π ωt 0 π ωt
2π 3π 4π 5π 6π 7π 8π 9π 10π 2π 3π 4π 5π 6π 7π 8π 9π 10π
Circuit operation: When the positive half-cycle is applied to the input, that is, trans-
former primary, as shown in Fig. 8(a), then the top terminal of the transformer secondary
is positive with reference to the centre tap, while the bottom terminal of the transformer
secondary is negative (with reference to the centre tap). As a result, the diode, D1 , is
forward-biased while the diode, D2 , is reverse biased. So the current will flow through D1 ,
but not through D2 during the positive half-cycle.
Fig. 8(b) shows the operation of two diode in the half-cycle of the input signal. During
this negative half-cycle, the condition is reversed. The diode, D2 , is now forward-biased
and the diode, D1 , is reverse biased. The current will flow through the diode, D2 , but not
through D1 for the negative half-cycle. So the load current is shared alternatively by the
two diodes and is unidirectional in each half-cycle.
vi (t)
0 π ωt
2π 3π 4π 5π 6π 7π 8π 9π 10π
0 π ωt 0 π ωt
2π 3π 4π 5π 6π 7π 8π 9π 10π 2π 3π 4π 5π 6π 7π 8π 9π 10π
(b) +ve half-cycle making D1 forward and (c) Output waveform of the circuit during
D2 reverse biased. +ve half-cycle of the input.
vi(D2 ) (t) vo(D2 ) (t)
0 π ωt 0 π ωt
2π 3π 4π 5π 6π 7π 8π 9π 10π 2π 3π 4π 5π 6π 7π 8π 9π 10π
(d) −ve half-cycle of the input, but +ve half- (e) Output waveform of the circuit during
cycle w.r.t. D2 −ve half-cycle of the input.
vo (t) = vo(D1 ) (t) + vo(D2 ) (t)
0 π ωt
2π 3π 4π 5π 6π 7π 8π 9π 10π
We see from Fig. 9(c) and 9(c) that vo(D1 ) (t) and vo(D2 ) (t) are 180◦ out of phase. The same
holds true for vi(D1 ) (t) and vi(D1 ) (t) too as shown in Fig. 9(b) and 9(d).
As a result, for the centre-tapped full-wave rectifier, we get the output for both the half-
cycles as shown in Fig. 9(f). The circuits shown in Fig. 7(b), 8(a) and 8(a) are called a
:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
full-wave rectifier because these have changed the full cycle of the ac input voltage to the
::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pulsating dc output voltage.
::::::::::::::::::::::::::::
We shall now see some parameters associated with a centre-tapped full-wave rectifier circuit
considering the following function as the output of the circuit:
Vm sin(ωt) 0 ≤ ωt ≤ π
vo (t) =
Vm sin(ωt − π) π ≤ ωt ≤ 2π
VS(m)
Vm = − VB
2
where VS(m) is the peak secondary voltage, not the peak centre-tapped secondary
voltage.
(b) PIV(Peak Inverse Voltage) or PRV (Peak Reverse Voltage): Each diode
in the full-wave rectifier is alternately forward-biased and then reverse-biased. The
maximum reverse voltage or peak inverse voltage that each diode must withstand is
the peak secondary voltage VS(m) . Thus, the peak inverse voltage appear across any
of the diode is
VS(m) VS(m)
PIV = − VB + = VS(m) − VB
2 2
But we know
VS(m)
Vm = − VB
2
⇒ VS(m) = 2Vm + 2VB
Therefore, the peak inverse voltage across either diode in a full-wave centre-tapped
rectifier is
which is simply PIV = PRV = 2Vm for the ideal diode wherein VB = 0 V[3, 4].
(c) RMS voltage, Vrms , of a centre-tapped full-wave rectifier: The rms voltage
at the load of a centre-tapped full-wave rectifier is given by
s
Z 2π
1
Vrms = vo2 (t)d(t)
2π 0
Z π Z 2π 1/2
1 2 2 1 2 2
= V sin (ωt)dωt + Vm sin (ωt − π)dωt
2π 0 m 2π π
2Z π 1/2
Vm2 π 2
Z
Vm 2
= sin (ωt)dωt + sin (ωt)dωt ∵ sin(ωt − π) = − sin(ωt)
2π 0 2π 0
2Z π 1/2
Vm 2
= 2 sin (ωt)dωt
2π 0
2Z π 1/2
Vm
= {1 − cos(2ωt)} dωt
2π 0
2Z π 1/2
Vm2 π
Z
Vm
= dωt − cos(2ωt)dωt
2π 0 2π 0
2 1/2
Vm Vm2 sin(2π) Vm2 sin(0)
= π− +
2π 2π 2 2π 2
2 1/2
Vm Vm2 Vm2
= − ×0+ ×0
2 4π 4π
Therefore,
1
Vrms = √ Vm
2
(d) Average output voltage, Vavg = Vdc , at the output of a centre-tapped full-
wave rectifier: The average voltage, Vavg = Vdc , of vo (t) over a time period, T , is
defined as[5, 11]
Z 2π
1
Vavg = Vdc = vo (t)dt
2π 0
Therefore, we have
Z π Z 2π
1 1
Vavg = Vdc = Vm sin(ωt)dωt + Vm sin(ωt − π)dt
2π 0 2π π
Vm π Vm 2π
Z Z
= sin(ωt)dωt + − sin(ωt)dt
2π 0 2π π
Vm Vm
= [− cos(ωt)]π0 + [cos(ωt)]2π
π
2π 2π
Vm
= [− cos(π) + cos(0) + cos(2π) − cos(π)]
2π
Vm
= [−(−1) + 1 + 1 − (−1)]
2π
2Vm
=
π
η = 0.8106 = 81.06%
(h) Peak factor of a centre-tapped full-wave rectifier: We know the peak factor is
Vm Vm √
Peak factor = = √ = 2 = 1.4142
Vrms Vm / 2
fout = 2fin
that is, the frequency of the full-wave signal is double the input frequency.
(j) Voltage regulation of a centre-tapped full-wave rectifier: The variation of
dc output voltage as function of the dc load current is called the regulation. The
percentage regulation is given by
VNL − VFL
% regulation = × 100
VFL
D4 D1 D4 D1
+ +
RL vo (t) RL vo (t)
D3 D2 D3 D2
− −
(a) Circuit at +ve half cycle (b) Circuit at −ve half cycle
vi (t) vo (t)
0 π ωt 0 π ωt
2π 3π 4π 5π 6π 7π 8π 9π 10π 2π 3π 4π 5π 6π 7π 8π 9π 10π
Circuit operation: The bridge rectifier uses four diodes connected as shown as shown
in Fig. 7(b)-(c). When the input cycle is positive as in Fig. 11(b), diodes, D1 and D3 , are
forward-biased and conduct current in the direction shown. A voltage is developed across
RL that looks like the positive half of the input cycle. During this time, diodes D2 and D4
are reverse-biased.
When the input cycle is negative as in Fig. 11(c), diodes, D2 and D4 , are forward-biased
and conduct current in the same direction through RL as during the positive half-cycle.
During the negative half-cycle, D1 and D2 are reverse-biased. A full-wave rectified output
voltage as shown in Fig. 11(f) appears across RL as a result of this action. It may be
noted that during both half-cycles, the load voltage has the same polarity and
the load current is in the same direction.
vi (t)
0 π ωt
2π 3π 4π 5π 6π 7π 8π 9π 10π
0 π ωt 0 π ωt
2π 3π 4π 5π 6π 7π 8π 9π 10π 2π 3π 4π 5π 6π 7π 8π 9π 10π
(b) +ve half-cycle making D1 and D3 for- (c) Output waveform during the +ve half-
ward biased. cycle of the input.
vi (t) vo′′ (t)
0 π ωt 0 π ωt
2π 3π 4π 5π 6π 7π 8π 9π 10π 2π 3π 4π 5π 6π 7π 8π 9π 10π
(d) −ve half-cycle making D2 and D4 for- (e) Output waveform during the −ve half-
ward biased. cycle of the input.
vo (t) = vo′ (t) + vo′′ (t)
0 π ωt
2π 3π 4π 5π 6π 7π 8π 9π 10π
However, in practical scenario, two diodes are always in series with the load resistor
during both the positive and negative half-cycles. If these diode drops are taken into
account, the output voltage is
Vpeak = Vpk = Vm = VS(m) − 2VB
(b) Peak Inverse/Reverse Voltage, PIV, at the output of the bridge rectifier:
The peak inverse voltage is the voltage appeared across the non-conducting diode.
During the positive half-cycle of the total secondary voltage, diodes D1 and D3 are
forward-biased. The secondary voltage appears across the load resistor. The same is
true when D2 and D4 are forward-biased during the negative half-cycle. The reverse
voltage across the either of non-conducting diode is VS(m) for ideal diodes.
Practically, the PIV for each diode in a bridge rectifier will always be VB less than the
peak value of the full secondary voltage. For example, from Fig. 10(a), the reverse
voltage appeared across the diode, D2 , by KVL (clock-wise direction) is
PIVD2 = Vm + VB = −VB + VS(m)
where
VS(m) = VB (D1 ) + Vm + VB (D3 ) = Vm + 2VB
Therefore, PIV terms of the peak output voltage is given by
PIVD2 = Vm − VB + 2VB = Vm + VB
The same goes for other diodes too. Hence, PIV of a bridge rectifier is always
PIV ≥ Vm + VB for a bridge rectifier[3, 4]
(c) RMS voltage, Vrms , of a bridge rectifier: The rms voltage at the load of a
centre-tapped full-wave rectifier is given by
s
Z 2π
1
Vrms = vo2 (t)d(t)
2π 0
Z π Z 2π 1/2
1 2 2 1 2 2
= V sin (ωt)dωt + Vm sin (ωt − π)dωt
2π 0 m 2π π
Z π Z π 1/2
1 2 2 1 2 2
= V sin (ωt)dωt + V sin (ωt)dωt
2π 0 m 2π 0 m
2Z π 1/2
Vm 2
= 2 sin (ωt)dωt
2π 0
2Z π 1/2
Vm
= {1 − cos(2ωt)} dωt
2π 0
2Z π 1/2
Vm2 π
Z
Vm
= dωt − cos(2ωt)dωt
2π 0 2π 0
2 1/2
Vm Vm2 sin(2π) Vm2 sin(0)
= π− +
2π 2π 2 2π 2
2 1/2
Vm Vm2 Vm2
= − ×0+ ×0
2 4π 4π
Therefore,
1
Vrms = √ Vm
2
(d) Average output voltage, Vavg = Vdc , at the output of a bridge rectifier: The
average voltage, Vavg = Vdc , of vo (t) over a time period, T , is defined as[5, 11]
Z 2π
1
Vavg = Vdc = vo (t)dt
2π 0
Therefore, we have
Z π Z 2π
1 1
Vavg = Vdc = Vm sin(ωt)dωt + Vm sin(ωt − π)dt
2π 0 2π π
Vm π Vm 2π
Z Z
= sin(ωt)dωt + − sin(ωt)dt
2π 0 2π π
Vm Vm
= [− cos(ωt)]π0 + [cos(ωt)]2π
π
2π 2π
Vm
= [− cos(π) + cos(0) + cos(2π) − cos(π)]
2π
Vm
= [−(−1) + 1 + 1 − (−1)]
2π
2Vm
=
π
(e) Ripple factor, γ, of a bridge rectifier: The ripple factor is the ratio between the
rms value of the ac voltage and the dc voltage of the rectifier, that is,
rms value of the ac component of the wave Vr(rms)
γ= =
average of dc value of the wave Vdc
u V /√2 2
s v !
p 2 u
2 −V2
Vrms dc Vrms m
= = −1=t −1
Vdc Vdc 2Vm /π
s 2
π
= √ − 1 = 0.4834
2 2
Parameters VB (V)
Ge 0.3
Si 0.7
GaAs 1.2
Table 2: Barrier potential of various semiconductors [11]
The PIV voltage must be less than the breakdown voltage of the diode;
otherwise, the diode will be destroyed . The peak inverse voltage depends on
the type of rectifier and filter. The worst case occurs with the capacitor-input filter[2].
(a) Half-wave rectifier: When the diode in a half-wave rectifier is in reverse bias
as in Fig. 12(b), we know that
D1 D1
+ −
+ − PIV + −
RL Vm RL 0V
− 0A +
− +
(a) (b)
Figure 12
However, when the diode in the half-wave rectifier is forward bias an shown in
Fig. 12(a), we get
VS(m) = VB + Vmax,RL = VB + Vm
(b) Centre-tapped full-wave rectifier: First off, we can find the PIV for D2 of
Fig. 13(a) by applying KVL in the loops specified as follows:
+ −
− PIV +
Vm Vm
− − + + − +
+ −
RL RL
− PIV +
− +
D2 D2
(a) (b)
Figure 13
Writing KVL equation in the anti-clockwise direction for the lower mesh of
Fig. 13(a), we have
VS(m)
PIV = Vm + (2)
2
and applying KVL in the upper mesh of Fig. 13(a) in clockwise direction, we
get
VS(m)
Vm − + Vb = 0
2
⇒ VS(m) = 2Vm + 2VB (3)
which is :::
the:::::
PIV:::
of::::
the:::::::
diode,:::::
D2 , ::
in::a:::::::::::::::
centre-tapped::::::::::
full-wave:::::::::
rectifier. Simi-
larly, we can find the PIV of the diode, D1 , in the same centre-tapped full-wave
rectifier of Fig. 13(b) as follows: By KVL in the clockwise direction from the
upper mesh
VS(m)
PIV = Vm + (5)
2
Again by KVL in counter-clockwise direction from the lower mesh, we have
VS(m)
Vm − + VB = 0
2
⇒ VS(m) = 2Vm + 2VB (6)
2Vm + 2VB
PIV = Vm +
2
= 2Vm + VB (7)
or
which is :::
the:::::
PIV:::
of::::
the:::::::
diode,::::
D1 ,:::
in::::
the:::::::::::::::
cantre-tapped::::::::::
full-wave:::::::::
rectifier.
From Eq. (4) and (7), we see that the peak inverse voltage across either
diode in a center-tapped full-wave rectifier in either :::::::::::
half-cycle:::
of:::::
the
input signal
::::::::::::::
is
PIV = 2Vm + VB
(c) Bridge rectifier: For the positive half-cycle of the input signal to the bridge
rectifier, there are two diodes, D3 and D4 , in reverse bias mode for which we
can find their PIV or PRV as explained below.
+ +
+
D3 PIV D1 D3 D1
−
Vm Vm
− + − +
RL L2 RL
+
D2 D4 D2 PIV D4
L3 L1−
− −
(a) (b)
Figure 14
Applying KVL in the clockwise direction on the top right corner of Fig. 14(a),
we find the PIV of the diode, D3 , as
PIV = VB + Vm = Vm + VB (9)
Same can also be verified by applying KVL on other meshes. Let’s check it out
by KVL in the counter-clockwise direction on the left most mesh of Fig. 14(a)
as
Now, to find VS(m) , we have to look at the path where the current flows in the
circuit during the positive half cycle of the input ac signal, that is, by KVL in
clockwise direction on the path: the secondary winding - D1 - RL - D2 , we have
− VS(m) + VB + Vm + VB = 0
⇒ VS(m) = Vm + 2VB
Now, we determine the PIV of D4 of Fig. 14(b) during the positive half-cycle
:::::::::::::::
of the input ac signal. Applying KVL around loop, L2 , [the bottom right
loop/mesh] in counter-clockwise direction, we get
PIV = Vm + VB (12)
This expression can also be verified using loops, L1 and L3 , in the same circuit
of Fig. 14(b). Applying KVL around loop L1 in counter-clockwise direction, we
have
− PIV − VB + VS(m) = 0
⇒ PIV = VS(m) − VB (13)
To get the above expression in terms peak maximum value available the output
of the bridge rectifier, that is, to get the PIV of the diode, D4 , in terms of Vm ,
we again apply KVL around the loop L3 in clockwise direction as
− VS(m) + VB + Vm + VB = 0
⇒ VS(m) = Vm + 2VB (14)
which is the PIV of the diode, D4 , that equals to that of the diode, D3 as in
Eq. (12).
VP(rms) = 70.7 V
VB = 0.7 V
N1 : N2 = 2 : 1
which is the PIV value of any diode used in the centre-tapped full-wave rectifier.
References
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[11] Mohammad Abdur Rashid, SCPLN02: Half wave rectifier and Full wave rectifier
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pdf accessed on June 11, 2023 (Cited on pages 1, 2, 6, 13, 17, and 19)