FCS CPU Load Mechanism: IA Global Engineering Center

FCS CPU Load Mechanism
June, 2008
IA Global Engineering Center
IACS-WG-G07002
Copyright © Yokogawa Electric Corporation
7/31/2007
Contents
 Objectives, Current Issues, and Plans to Resolve

 FCS CPU Load Mechanism
 FCS CPU Load Estimation Sheet
 Estimate FCS CPU Load at FAT
 Risk Assessment and Counter Measures
 Appendix
<General Guideline>
How to Estimate CPU Time for External Communication
IACS-WG-G07002
7/31/2007
Confidential Page 2
Objectives, Current Issues,
and Plans to Resolve
IACS-WG-G07002
7/31/2007
Confidential Page 3
Objectives
FCS CPU load assessment is critical

– To provide safe and reliable plant operation
– To meet the contracted requirements in relative to reserving
FCS resources for future expansion and modification
This presentation describes the basic information around FCS

system that engineers need to know to design the applications
to meet the customer requirements
(Note) This presentation only addresses the FCS type of FFCS

(V-net) and FFCS-L (Vnet/IP) unless otherwise indicated.
IACS-WG-G07002
7/31/2007
Confidential Page 4
Current Issues
Systems Work Processes
Not enough depth

CPU is too
in assessing CPU
slow Idle time No adequate
load
concept is assessment
Fieldbus methodology
consumes confusing Quality audit &
much quality control is a
more CPU failure in this
time regard Failures in
Assessing FCS
CPU Load
Current Facing too
estimation tool heavy load at Adding
contains lots of No tool that site controllers at
uncertainties can be used cost due to
during Engineers do mistakes in
designing not know the assessing
phase system CPU load
feature
Tools Projects
IACS-WG-G07002
7/31/2007
Confidential Page 5
Improvement in each perspective
System Develop a new FCS with a faster CPU clock
– YHQ R&D is responsible for this. (They already have the roadmap)
Tools Develop a new tool to more accurately estimate the CPU load
– YHQ ETC/GTD is responsible for this
Work Improve work processes for all the design engineers to more
Process accurately estimate and more practically assess the CPU load
– EP Network is responsible for proposing new work processes
– All design engineers are responsible for following new work processes and
meeting customer’s requirements
Projects Training
– Need to exactly know the FCS system features
– Need to exactly know how to correctly use the current CPU load estimation
tool
Projects Knowledge Management
– Make good use of other available information
Projects GES
– Need to change the GES procedure in this regard
IACS-WG-G07002
7/31/2007
Confidential Page 6
FCS CPU Load Mechanism
IACS-WG-G07002
7/31/2007
Confidential Page 7
FCS Tasks
FCS Tasks: there are many tasks executed in FCS.
– System Initialization, Message Sending, Data Access (reception,
sending, and area data link), On-line Maintenance Reception, Trend
Communication Reception, I/O Services, Control Functions, System
Monitoring, Memory Access, Dialogue Message, Unit Instrument, Batch
Management, V-net Diagnostic, TCP/IP Processing, etc.
– Major periodical task is the Control Functions

• SEBOL processing
• Basic-scan I/O processing
• Basic-scan function block processing
• Medium-scan processing (function block)
• High-scan processing (function block and I/O)
Execution Priority for Major Functions

High • External communication from HIS/OPC, ADL, and SEBOL
(Total CPU utilization time of these and PRM communication is limited up to 200 msec)
•
Tuning parameter saving and external communication from PRM
•
High-scan processing
•
Medium-scan processing
•
Basic-scan processing, real-time trend communication, online maintenance
reception, message sending
Low • SEBOL and User-C program execution
IACS-WG-G07002
7/31/2007
Confidential Page 8
Image of FCS CPU Time
SEBOL executable time.
When SEBOL programs are not Basic-scan I/O
executed, this time is 0. processing.
CPU Time
SEBOL Processing
Control Functions
Basic-scan I/O Basic-scan processing other
Processing than SEBOL and I/O. The
High-scan function blocks and main processing is for basic-
I/O processing. If high-scan Basic-scan Function
scan function blocks.
function blocks and I/O are not Block Processing
implemented, this time is 0. Medium-scan
Processing Medium-scan function blocks
1000 msec processing. If medium-scan function
High-scan Processing blocks are not implemented, this
time is 0.
Alarms and events processing. Data Access
When there are no alarms and
events, this time is 0. Message Sending
User-C
Other Tasks External communication frame reception
and sending processing. This includes
communication from HIS, OPC server,
Time when CPU is not PRM, ADL, other station data access by
processing any tasks SEBOL, etc.
User C programming. Some of
Touch Software use this area. When there are no V-net frames to be
Example: processed, this time is 0.
-Data Transition Monitoring function CPU time spent for this processing is
-Expanded Link Transfer function etc. limited up to 200 msec.
IACS-WG-G07002
7/31/2007
Confidential Page 9
Definition of CPU Idle Time & CPU Load -1/2
CPU Idle Time [msec]
– Definition: Time when CPU does not process any tasks + SEBOL
executable time + User-C executable time
– Reverse definition is:
1000 - ∑(Actual CPU time used for processing all the tasks except SEBOL & User-C)
– Practical definition is:
1000 - ∑(Actual CPU time used for processing the Control Functions and Data Access)
• Tasks other than the Control Functions and Data Access do not consume much
CPU time or are not periodically executed.
CPU Load [%]

– Definition:
∑(CPU time required to finish all the tasks as scheduled) / 1000 * 100
IACS-WG-G07002
7/31/2007
Confidential Page 10
Definition of CPU Idle Time & CPU Load 2/2
CPU Time CPU Idle Time (A):
Basic-scan I/O Processing This time can be monitored on the FCS Status Display
Basic-scan Function Block window. The data on the window is a moving average
Processing value in a minute (100% Idle time = 60 Sec).
Medium-scan Processing CPU Idle Time must be more than following data for the
(B) unscheduled maintenance operation such as APC, tuning
1000 msec
High-scan Processing parameter saving and online load.

Data Access For AFF50D /AFV10D : 330ms (20 Sec)
Message Sending
For other types of FCS : 140ms (10 Sec)
Other Tasks CPU Load Time (B):
SEBOL Processing CPU Load Time (ms) = 1000 - CPU Idle Time (ms)
User-C = 1000 – (A)
(A)
Time when CPU is not For AFF50D /AFV10D : 670ms (40 Sec)
processing any tasks For other types of FCS : 830ms (50 Sec)
[Important Note]
670ms or 830ms is the maximum allowance for
Control, Data Access, Message Sending and Other
Tasks. Therefore, if 20% spare must be kept,
consider 670ms*0.8 = 536ms is the top can be used
in engineering phase, in case of AFF50D. (NOT
1000ms*08=800ms)
IACS-WG-G07002
7/31/2007
What’s happen when CPU Load is High!
With the CPU load high to an extent that there is not enough
CPU time to execute all required functions in time, completion
of the lower-priority tasks is delayed or not executed.
– High CPU load will make SEBOL execution delayed first
– Higher CPU load will make the SEBOL not executed at all and the basic-scan
processing delayed next
– Further higher CPU load will make the basic-scan processing not executed
at all and the medium-scan processing delayed next
– Much further higher CPU load will make the medium-scan processing not
executed at all and the high-scan processing delayed next
With the CPU load high to an extent that the basic-scan I/O
processing is not complete within four seconds,
– I/O value will be its default fall-back value. (This situation is equivalent to
loss of process control functions.)
– System alarm “FCS Too Heavy Load” will be reported.
With the CPU load much further higher to an extent that the
highest-priority processing is not complete within two seconds
(this situation is a very remote chance),
– The controlling CPU will be shutdown.
– CPU change-over will occur for a dual redundant CPU FCS.
• After CPU change-over, if further delay of the highest-priority processing
continues for another two seconds, the controlling CPU will be shutdown.
IACS-WG-G07002
7/31/2007
CPU Load under Maintenance – 1/3
When maintenance operation is in progress such as All Program Copy (APC), tuning parameter saving,
and online maintenance, more CPU time is consumed by the Control Functions.
Below shows the image of CPU under the maintenance operation is in progress with sufficient CPU idle
time
Under normal operation Under maintenance

SEBOL Processing SEBOL Processing
With sufficient CPU
idle time, all the
Control Functions
Basic-scan I/O Basic-scan I/O

Processing Processing control functions are
Control Functions
Basic-scan Function
Block Processing
Basic-scan Function
Block Processing
executed as
Medium-scan Maintenance Processing
expected.
Processing Medium-scan
1000 msec
High-scan Processing Processing

Maintenance Processing
Data Access
High-scan Processing
Message Sending Maintenance Processing
Other Tasks Data Access
Other Tasks
User-C
Message Sending
Time when CPU is not Other Tasks

processing any tasks User-C
Time when CPU is not
IACS-WG-G07002
processing any tasks
7/31/2007
Below shows the image of CPU under maintenance operation is in
progress with insufficient CPU idle time
Under normal operation Under maintenance

SEBOL Processing
Basic-scan I/O With insufficient CPU
Basic-scan I/O
Processing
idle time, lower-
Control Functions
Processing Basic-scan Function priority control
Control Functions
Block Processing
Basic-scan Function functions are not
Block Processing
Maintenance Processing executed as
Medium-scan Medium-scan expected.
1000 msec
Processing Processing
Completion is
delayed or not
Data Access
executed at all.
Data Access
Message Sending
Other Tasks
User-C Message Sending
Time when CPU is not
processing any tasks Other Tasks
IACS-WG-G07002
7/31/2007
Actual CPU time required to execute the maintenance

work
– APC:
• Depends on the database size
• 200 msec maximum for FFCS and FFCS-L
• 30 msec maximum for KFCS
• APC averagely continues for approximately 20 minutes
– Tuning parameter saving:
• Depends on the database size
• 100 msec maximum
• TP saving averagely continues for approximately 1 minute
– Online load:
• Depends on the download volume
• Online load finishes within 1 second
IACS-WG-G07002
7/31/2007
FCS CPU Load Quotation Sheet
IACS-WG-G07002
7/31/2007
FCS CPU Load Quotation Sheet
GEC-ETC provides FCS CPU Load Quotation Sheet to estimate

CPU Load.
You can download it from the following site.

– http://aww001-0m0044.gbl.ykgw.net/etc/Engineering_Guide/02020302_E.xls
And also you can download the Engineering Guide regarding FCS
performance from the following site. Please read this before using the
Quotation Sheet above.
– http://aww001-0m0044.gbl.ykgw.net/etc/Engineering_Guide/020202E.pdf
Please note that the current version contains approximately

±20% of errors on FF project, subsystem communication. Now
GEC-ETC is revising the sheet. Refer to next page.
IACS-WG-G07002
7/31/2007
Revise FCS CPU Load Quotation Sheet
GEC-ETC is now revising FCS CPU Loading Quotation Sheet to

improve it in accuracy.
(refer to attached Excel file named “CDWG-S601-02020302_15_E) Microsoft Excel
ƒ[ƒNƒV[ƒg
– Add “Processing time by ALR & ALE (Subsystem communication)”

In the current version, Engineer needs to treat this kind of cards as
analog/digital module by hand.
(16 analog words=1 analog card, 4 digital words=1 digital card.)
– Add “View update timing of FF blocks”

In the current version, View update timing is fixed as 4 sec.
– Add “High Speed Read of ALF111”

The current version doesn’t support High Speed Read of ALF111.
– Revise how to enter the value on Processing time of process data

access communication.
In the current version, Engineer can enter only the number of CRT.
IACS-WG-G07002
7/31/2007
Add “Processing time by ALR & ALE (Subsystem communication)”
Enter actual number of modules.

e.g. 1 duplex set = 2
NEW
Enter actual number of

communication word defined in
%WW builder
Under investigation.
Other factors reflecting to CPU Load
seems to be hidden.
IACS-WG-G07002
7/31/2007
Add “High Speed Read of ALF111”

Add “View update timing of FF blocks”
NEW
NEW
Enter number of TAGs according to

Result of Simple Doc tool
View Update Timing.
By using Tag information tool &
Simple Doc tool, it’s easily count up.
IACS-WG-G07002
7/31/2007
Revise the way of entering the value on Processing time of process

data access communication.
Estimate the number of data
Improve accessing to the FCS per 1 graphic
window.
Estimate the number of opening windows

accessing to the FCS.
Estimate the number of data accessing to the

FCS from OPC/ACG per 1 sec.
IACS-WG-G07002
7/31/2007
Estimate FCS CPU Load at FAT
IACS-WG-G07002
7/31/2007
Environment at FAT
Mostly all CENTUM components like HIS, FCS are ready at FAT.
But the actual device and/or subsystem are not ready.
Therefore all FCS are under TEST mode with IO disconnection.
Under this condition, CPU Load for Control functions and Data
access by ADL, SEBOL, HIS can be measured as CPU Idle time in
HIS FCS Station Status Display window.
[Note] Windows from HISs are displayed as per the normal operating condition.
Graphic
Trend
Vnet
ADL, SEBOL
CPU Load at FAT

IO
disconnection
= 60 - CPU Idle Time
Important Note:
Under this condition,
Field Device
Subsystem CPU Idle Time doesn’t contain
Processing time of PIO.
IACS-WG-G07002
7/31/2007
Environment at FAT
In order to estimate the actual CPU Load at site, Need to add

Processing time of PIO function to the CPU Load.
The Processing time of PIO function can be referred from CPU
Load Quotation Sheet.
The estimated Processing time
of PIO function
Enter the value counted

by the actual project DB
The safety factor should be considered.

Safety factor (X) : around 10% (6 sec)
Estimated CPU Load at Site

= 60 - CPU Idle Time (Measured) - PIO Processing time (Calculated) - X
IACS-WG-G07002
7/31/2007
Risk Assessment and Counter Measures
IACS-WG-G07002
7/31/2007
Risk Assessment and Counter Measures
Risk Assessment
– Project risk assessment around FCS CPU load must take
place during BD phase
– Otherwise the project financially suffers
Counter Measures
– Risk mitigation plans shall include the following counter
measures:
• Properly design the operation specification so as to have the
less-than 100 msec CPU time for data access from HIS and
OPC servers.
– Reduce the data item quantity of graphic windows
– Make the data update rate of graphic windows slower
– Reduce the OPC data access quantity
– Make the OPC data update rate slower
• Set the scan coefficient for function blocks bigger as applicable
(Make function blocks be scanned at slower rate)
• Set the update rate for FF view object bigger as applicable
(Make the server/client data access from FF faceplate blocks
slower)
• Use the slower sub-schedule for FF faceplate blocks
• Set the ADL communication period bigger
IACS-WG-G07002
7/31/2007
Thank you very much
for your attention
IACS-WG-G07002
7/31/2007
<General Guideline>
How to Estimate CPU Time for External Communication
 Estimate CPU Time for External Communication from HIS

 Estimate CPU Time for External Communication from OPC
 Estimate CPU Time for External Communication from PRM
 Estimate CPU Time for External Communication from ADL
 Estimate CPU Time for External Communication from SEBOL
 Estimate CPU Time for Real-time Trends
 Estimate CPU Time for Real-time Global Switches
IACS-WG-G07002
7/31/2007
Estimate CPU Time for External Communication from HIS
DCS Operation Specification

– Need to define the normal operating condition.
e.g. how many HIS windows (graphic, control, faceplate, etc.) are addressed to the
FCS under the normal operating condition.
– Need to design an HIS graphic window so that the communication data item quantity
is always less than 400 items/second per graphic window.
– Need to quantify the communication items from an OPC server to the FCS in relative
to data quantity and update rate.
Design the DCS operation specification so that the total CPU time for
an FCS to periodically process V-net frames from HIS shall be less than
100 msec in that FCS.
– Total of communication data items from HIS will determine the V-net frames that FCS
will periodically consume CPU time to process
– One V-net frame consumes 2 msec (or less) CPU time
• One graphic with 400 data items: 7 frames
• One tuning panel: 3 frames
• One control panel: 4 frames
• One faceplate: 1 frame
– If one HIS sends 15 V-net frames (2 graphics and 1 faceplate) to one particular FCS,
3 HISs are recommended quantity of HISs under the normal operating condition to
meet the 100 msec guideline. (Historical trend communication is neglected here.)
IACS-WG-G07002
7/31/2007
Estimate CPU Time for External Communication from OPC
Total of communication data items from an OPC server (and HIS) will
determine the V-net frames that FCS will periodically consume CPU time to
process
– CPU time consumed to process V-net frames from the OPC server:
2 [msec] * ((V-net frame quantity of DA group1) / (Data update rate of DA group1)
+ (V-net frame quantity of DA group2) / (Data update rate of DA group2) + ….)
<Example>
When there are 500 items in the 5-sec update rate DA group and 1,000
items in the 30-sec update rate DA group, CPU time to process these
items is approximately
2 * (int(500 / 25 / 5sec) + int(1,000 / 25 / 30sec))
= 2 * 6 frames/sec
= 12 msec / sec
IACS-WG-G07002
7/31/2007
Estimate CPU Time for External Communication from PRM
Communication from PRM needs a CPU time to process
– It averagely takes 50 – 70 msec of CPU time.
IACS-WG-G07002
7/31/2007
Estimate CPU Time for External Communication from ADL
ADL Function Block
– One ADL function block has eight software connections for data access points in other FCS (tag
data item or function block connection terminal)
– Need the CPU time to scan the ADL block (Refer to the CPU Loading Quotation Sheet for the
actual value)
– For reading or writing a data item value from/to other FCS tag
(e.g. FCS1!TAG1.IN  FCS2!TAG2.PV, FCS1!TAG1.OUT  FCS2!TAG2.SV), an ADL function
block is created in the source FCS (FCS1 in the above example) and one software connection is
used for each point.
FCS1 FCS2
IN
TAG1 TAG2.PV TAG2
PID OUT ADL PID
TAG2.SV
– For connecting a function block terminal from/to other FCS tag (e.g. FCS1!TAG1.OUT  FCS2!
TAG2.SET), the ADL function block is created in both FCSs and two software connections are
used for each point.
FCS1 FCS2
TAG1 OUT SET TAG2

TAG2.SET TAG2.OUT
PID ADL ADL PID
Data Access to Other FCS by ADL

– V-net frame is created to make the actual data access to the destination FCS
– Need the CPU time to process these V-net frames (Refer to the CPU Loading Quotation Sheet
for the actual value) at the source and destination FCSs.
IACS-WG-G07002
7/31/2007
Estimate CPU Time for External Communication from SEBOL
Data Access to Other FCS by SEBOL

– For each SEBOL statement that contains the other FCS tag data items, one
V-net frame is created.
• Add the following CPU time for each of such a SEBOL statement at the source and
destination FCSs
2 + (3/31)*(Other FCS data item quantity in one statement) [msec]
Coding Tip
– V-net frame quantity optimization does not take place for V-net frames that are initiated by
SEBOL
– Code the SEBOL where other FCS tag data items are grouped so as to minimize quantity of other
FCS access statements.
Bad Example Good Example

Suppose TAG2 and TAG3 are FCS2 tags. This This code creates only one V-net frame.
code in FCS1 creates two V-net frames.
[TAG2_AL, TAG3_PV = TAG2.ALRM, TAG3.PV]; error ERR1
if (TAG2.ALRM == "LO") then
if (TAG3.PV > 100.0) then if (TAG2_AL == "LO") then
…….. if (TAG3_PV > 100.0) then Group
end if …….. Assignment
end if end if Statement
end if
IACS-WG-G07002
7/31/2007
Estimate CPU Time for Real-time Trends and Global
Switches
Real Time Trend

– One second trend (real-time trend) requires a TR-SS function block
(Refer to the CPU Loading Quotation Sheet for the actual CPU time
value)
– Real-time trend requires an additional communication processing in
FCS that is initiated by HIS.
(Refer to the CPU Loading Quotation Sheet for the actual CPU time
value)
Global Switches
– Refer to the CPU Loading Quotation Sheet for the actual CPU time
value
IACS-WG-G07002
7/31/2007

FCS CPU Load Mechanism: IA Global Engineering Center

Uploaded by

Copyright:

Available Formats

FCS CPU Load Mechanism: IA Global Engineering Center

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

FCS CPU Load Mechanism: IA Global Engineering Center

Uploaded by

Copyright:

Available Formats

FCS CPU Load Mechanism

IA Global Engineering Center

 Objectives, Current Issues, and Plans to Resolve

FCS CPU load assessment is critical

This presentation describes the basic information around FCS

(Note) This presentation only addresses the FCS type of FFCS

Systems Work Processes

Not enough depth

– Major periodical task is the Control Functions

Execution Priority for Major Functions

CPU Load [%]

High-scan Processing parameter saving and online load.

Under normal operation Under maintenance

Basic-scan I/O Basic-scan I/O

High-scan Processing Processing

Time when CPU is not Other Tasks

Under normal operation Under maintenance

Processing Basic-scan Function priority control

Actual CPU time required to execute the maintenance

GEC-ETC provides FCS CPU Load Quotation Sheet to estimate

You can download it from the following site.

Please note that the current version contains approximately

GEC-ETC is now revising FCS CPU Loading Quotation Sheet to

– Add “Processing time by ALR & ALE (Subsystem communication)”

– Add “View update timing of FF blocks”

– Add “High Speed Read of ALF111”

– Revise how to enter the value on Processing time of process data

Add “Processing time by ALR & ALE (Subsystem communication)”

Enter actual number of modules.

Enter actual number of

Add “High Speed Read of ALF111”

Enter number of TAGs according to

Revise the way of entering the value on Processing time of process

Estimate the number of opening windows

Estimate the number of data accessing to the

CPU Load at FAT

= 60 - CPU Idle Time

In order to estimate the actual CPU Load at site, Need to add

Enter the value counted

The safety factor should be considered.

Estimated CPU Load at Site

 Estimate CPU Time for External Communication from HIS

DCS Operation Specification

Communication from PRM needs a CPU time to process

– It averagely takes 50 – 70 msec of CPU time.

TAG1 OUT SET TAG2

Data Access to Other FCS by ADL

Data Access to Other FCS by SEBOL

Bad Example Good Example

Real Time Trend

You might also like