Parallel Architectures

It is explicated that human brain functions as ‘radio’ capable of projecting thought and emotional frequencies that may be categorized to operate on two distinct bands: the low frequency band (similar to the AM band) and the high frequency band (analogous to the FM band). The low frequency band concentrates on the affairs indigenous to the physical time-space continuum that are spearheaded by the active (physical) conscious mind that are piloted by the ‘rational’ brain. This is referred to as the ‘ego mind’ that is focused on a single reality, the one we identify our SELF with, the life sojourns that we are currently consciously experiencing and experimenting with. The high frequency band, on the other hand, operates in a much broader sense through the sub-conscious mind, which is of ethereal nature, traversing other dimensions of reality that may be classified as ‘parallel’ or ‘alternate,’ comprised of a multitude of consciousness states ordinarily not perceived by the physical brain. It is clarified that such parallel or alternate continuums of time and space are just as ‘real’ as the one we actively perceive by our ‘logical’ brain. In fact, we traverse and experience these dimensions of consciousness every night in dream state, when we are able to ‘turn off’ our physical consciousness and switch on our sub-conscious mind. These dimensional realities or alternate continuums of time and space are part of the holographic software programs of consciousness that run simultaneously with the one in our physical reality in what is referred to as the NOW moment. It is elucidated that we are all each part of a family of ‘soul aspects’ that are governed by a central higher dimensional consciousness named as our HIGHERSELF or soul. And, although the central soul or our HIGHERSELF is simultaneously conscious of all our life sojourns in all the parallel and alternate continuums of time and space, we purposefully remain unaware of our other concurrent ‘soul aspects’ in the interest of obtaining objective and unbiased life experiences. This condition also suits our limited capacity as biological entities to process all our life experience data due to our low light quotient-natural frequency.  And, once our natural frequency is uplifted as to meet the threshold required for obtaining ‘full consciousness,’ we come to the realization that we have the power to enter any hologram of time and space and willfully improvise and live our lives based upon any historical character reflected in the ‘Akashic Records’ that we wish (e.g. Mozart, Da Vinci, Tesla, etc.).  This way, we can go in the ‘past’ and create new parallel timelines from then on, adding to the repertory of already existing Akashic Records. In this regard, the distinction among past, present, and future become ambiguous at best, with all transpiring within the same moment of ‘NOW.’

Catalogs play an important role in distributed systems and especially in Grids where they store necessary user, middleware and system information. In the (first) EU-funded Enabling Grids for E-SciencE (EGEE) project's Grid middleware stack (called gLite), the Grid catalogs follow a Service Oriented Architecture, exposing a set of Web Service interfaces that may be combined and reused by higher-level services or applications. The functional decomposition of the interfaces was driven by the requirements on scalability, robustness, wide-area distribution and security. It is especially important to be able to evolve and extend the interfaces. We describe the requirements of the EGEE applications with respect to catalogs, the architecture of the interfaces and the performance of the gLite implementation.

L’Homme a utilisé l’algorithmique depuis l’époque des Babyloniens et l’écriture cunéiforme sur les pierres. Avec le français Blaise Pascal en 1642, il a commencé à inventer des machines pour exécuter les algorithmes. Alain Turing en 1937 a présenté une machine
virtuelle intitulée la machine de Turing qui a servi pour la conception d’une architecture de base pour les ordinateurs. La machine RAM a été utilisée par la suite comme modèle de base pour la conception des architectures des ordinateurs. L’évolution technologique lors de la construction des ordinateurs a permis la construction des ordinateurs avec un processeur multi-cœurs ou même des ordinateurs multi-processeurs.
Cet ouvrage cherche à étudier la notion de parallélisme dans la modélisation des architectures des ordinateurs multi-cœurs ou multi-processeurs. Quel est le modèle de l’architecture multi-processeurs ou multi-cœurs optimale ?
En effet, l’objectif de ce document est de fournir au lecteur les outils pour
{ Comprendre l’architecture des machines parallèles ;
{ L’inviter et l’encourager à modéliser une nouvelle architecture pour les machines parallèles ou à faire évoluer une architecture existante ;
{ Etre capable à programmer de manière optimale sur les machines parallèles.
Ainsi, le premier Chapitre sera dédié à introduire la notion de parallélisme et calcul de haute performance afin de familiariser le lecteur aux notions de parallélisme et de le sensibiliser à l’utilité de comprendre les architectures parallèles existantes et de l’inviter à les optimiser et les mieux utiliser en adoptant une programmation adaptée au parallèlisme.
Dans un deuxième Chapitre, nous allons étudier les architectures des machines parallèles.
Le lecteur est invité à une réflexion sur les axes de modéliser de nouvelles architectures plus optimales. Dans le troisième Chapitre, afin de pouvoir exploiter l’évolution technologique des machines parallèles, et de la possibilité de communiquer, par internet, un nombre très grand d’ordinateurs et de téléphones pour résoudre le même problème P, le lecteur sera invité à programmer de manière optimale sur les machines parallèles disponibles.

We present a virtualized setup of a Hadoop cluster that provides greater computing capacity with lesser resources, since a virtualized cluster requires fewer physical machines. The master
node of the cluster is set up on a physical machine, and slave nodes are set up on virtual machines (VMs) that may be on a common physical machine. Hadoop configured VM images are created by cloning of VMs, which facilitates fast addition and deletion of nodes in the cluster without much overhead. Also, we have configured the Hadoop virtualized cluster to use capacity scheduler instead of the default FIFO scheduler. The capacity scheduler schedules tasks based on the availability of RAM and virtual memory (VMEM) in slave nodes before allocating any job. So instead of queuing up the jobs, they are efficiently allocated on the VMs based on the memory avail- able. Various configuration parameters of Hadoop are analyzed and the virtualized cluster is fine-tuned to ensure best performance and maximum scalability.

String matching is a classical problem in computer science. Numerous algorithms are known to solve the string matching problem such as Brute Force algorithm, KMP, Boyer Moore, various improved versions of Boyer-Moore, Bit Parallel BNDM algorithm and various others algorithms for single pattern string matching, Aho-Corasick, multiple pattern bit parallel algorithm for multiple pattern string matching. The algorithms have mainly been designed to work on a single processor called as sequential algorithms. To make the algorithms more time efficient by utilizing the processor maximum, a parallel approach the generalized text division concept of parallelization for string matching has been introduced. The parallelized approach is conceived by dividing the text and different parts of the text are worked simultaneously upon the same string matching algorithm to match the patterns. The concept is applicable to any of exact single and multiple pattern string matching algorithms. The notion of text dividing achieves parallelization on a SIMD parallel architecture. As different parts of the text are processed in parallel, special attention is required at the connection or division points for consistent and complete searching. This concept makes all string matching algorithms more time efficient in compare to the sequential algorithm. This paper presents how different string matching algorithms are implemented using the parallelization concept on different SIMD architectures like multithreaded on multi-core and GPUs. There performance comparison also shown in this paper.

https://sites.google.com/site/ijcsis/

Smart metering, prevalent in the power grids, is a billing model in which consumers are charged variable rates for a service consumed based on the load conditions of the system providing the service. In this paper we present a similar billing model for cloud services. We develop a model where the tariff is varied based on the load prevailing on the cloud infrastructure. We obtain a mapping between the load condition for a particular time period and the pricing. The pricing for every time period is published and it is the consumer’s discretion to continue using the service or to suspend usage. Based on historical data, the load on the cloud infrastructure is predicted using the autoregressive integrated moving average (ARIMA) statistical model. Monitoring the cloud infrastructure is an essential component of any form of cloud metering and we rely on tools available off-the-shelf for the purpose. The pricing information obtained is used for billing the consumers. The bill amount is a function of pricing for a time interval and the corresponding utilization of compute resource. The calculated bill is produced to the consumer.

Image processing is widely used in many applications, including medical imaging, industrial manufacturing, and security systems. Often the size of the image is very large, the processing time has to be very small and usually real-time constraints have to be met. Therefore, during the last decades there has been an increasing interest in the development and the use of parallel algorithms in image processing.

Sound synthesis based on physical models of musical instruments is, ultimately, an exercise in numerical simulation. As such, for complex systems of the type seen in musical acoustics, simulation can be a computationally costly
undertaking, particularly if simplifying hypotheses, such
as those of traveling wave or mode decompositions are not
employed. In this paper, large scale time stepping methods, such as the finite difference time domain and finite
volume time domain methods are explored for a variety of
systems of interest in musical acoustics, including brass instruments, percussion instruments based on thin plate and
shell vibration, and also their embeddings in 3D acoustic
spaces. Attention is paid here to implementation issues,
particularly on parallel hardware, which is well-suited to
time stepping methods operating over regular grids. Sound
examples are presented.

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A grid computing environment provides a type of distributed computation that is unique because it is not centrally managed and it has the capability to connect heterogeneous resources. A grid system provides location-independent access to the resources and services of geographically distributed machines. An essential ingredient for supporting location-independent computations is the ability to discover resources that have been requested by the users. Because the number of grid users can increase and the grid environment is continuously changing, a scheduler that can discover decentralized resources is needed. Grid resource scheduling is considered to be a complicated, NP-hard problem because of the distribution of resources, the changing conditions of resources, and the unreliability of infrastructure communication. Various artificial intelligence algorithms have been proposed for scheduling tasks in a computational grid. This paper uses the imperialist competition algorithm (ICA) to address the problem of independent task scheduling in a grid environment, with the aim of reducing the makespan. Experimental results compare ICA with other algorithms and illustrate that ICA finds a shorter makespan relative to the others.  Moreover, it converges quickly, finding its optimum solution in less time than the other algorithms.

International Journal of Ad hoc, sensor & Ubiquitous Computing (IJASUC) is a bi monthly open access peer-reviewed journal provides excellent international forum for sharing knowledge and results in theory, methodology and applications of Ad Hoc & Ubiquitous computing. Current information age is witnessing a dramatic use of digital and electronic devices in the workplace and beyond. Ubiquitous Computing presents a rather arduous requirement of robustness, reliability and availability to the end user. Ad hoc, Sensor & Ubiquitous computing has received a significant and sustained research interest in terms of designing and deploying large scale and high performance computational applications in real life. Topics of interest include, but are not limited to, the following.

International Journal on Bioinformatics & Biosciences (IJBB) is a Quarterly peer-reviewed and refereed open access journal that publishes articles which contribute new results in all areas of the Bioinformatics & Biosciences. Bioinformatics is the application of information science and technology to the field of biology to increase the understanding of all biological process. The aim of this journal is to publish all the latest and outstanding research articles in all areas of bioinformatics and Biometrics. Researchers and scientists from the fields of biology, computer science, mathematics, statistics, and physics are invited to share their developments and new techniques in the fields of Biometrics and Bioinformatics.

The International Journal of Wireless & Mobile Networks (IJWMN) is a bi monthly open access peer-reviewed journal that publishes articles which contribute new results in all areas of Wireless & Mobile Networks. The journal focuses on all technical and practical aspects of Wireless & Mobile Networks. The goal of this journal is to bring together researchers and practitioners from academia and industry to focus on advanced wireless & mobile networking concepts and establishing new collaborations in these areas.

One and multi dimensional raw data collections introduce noise and artifacts, which need to be recovered from degradations by an automated filtering system before, further machine analysis. The need for automating wide-ranged filtering applications necessitates the design of generic filtering architectures, together with the development of multidimensional and extensive convolution operators. Consequently, the aim of this thesis is to investigate the problem of automated construction of a generic parallel filtering system. Serving this goal, performance-efficient FPGA implementation architectures are developed to realize parallel one/multi-dimensional filtering algorithms. The proposed generic architectures provide a mechanism for fast FPGA prototyping of high performance computations to obtain efficiently implemented performance indices of area, speed, dynamic power, throughput and computation rates, as a complete package. These parallel filtering algorithms and their automated generic architectures tackle the major bottlenecks and limitations of existing multiprocessor systems in wordlength, input data segmentation, boundary conditions as well as inter-processor communications, in order to support high data throughput real-time applications of low-power architectures using a Xilinx Virtex-6 FPGA board.
For one-dimensional raw signal filtering case, mathematical model and architectural development of the generalized parallel 1-D filtering algorithms are presented using the 1-D block filtering method. Five generic architectures are implemented on a Virtex-6 ML605 board, evaluated and compared. A complete set of results on area, speed, power, throughput and computation rates are obtained and discussed as performance indices for the 1-D convolution architectures. A successful application of parallel 1-D cross-correlation is demonstrated.
For two dimensional greyscale/colour image processing cases, new parallel 2-D/3-D filtering algorithms are presented and mathematically modelled using input decimation and output image reconstruction by interpolation. Ten generic architectures are implemented on the Virtex-6 ML605 board, evaluated and compared. Key results on area, speed, power, throughput and computation rate are obtained and discussed as performance indices for the 2-D convolution architectures. 2-D image reconfigurable processors are developed and implemented using single, dual and quad MAC FIR units. 3-D Colour image processors are devised to act as 3-D colour filtering engines. A 2-D cross-correlator parallel engine is successfully developed as a parallel 2-D matched filtering algorithm for locating any MRI slice within a MRI data stack library. Twelve 3-D MRI filtering operators are plugged in and adapted to be suitable for biomedical imaging, including 3-D edge operators and 3-D noise smoothing operators.
Since three dimensional greyscale/colour volumetric image applications are computationally intensive, a new parallel 3-D/4-D filtering algorithm is presented and mathematically modelled using volumetric data image segmentation by decimation and output reconstruction by interpolation, after simultaneously and independently performing 3-D filtering. Eight generic architectures are developed and implemented on the Virtex-6 board, including 3-D spatial and FFT convolution architectures. Fourteen 3-D MRI filtering operators are plugged and adapted for this particular biomedical imaging application, including 3-D edge operators and 3-D noise smoothing operators. Three successful applications are presented in 4-D colour MRI (fMRI) filtering processors, k-space MRI volume data filter and 3-D cross-correlator.

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International Journal on Bioinformatics & Biosciences (IJBB) is a Quarterly peer-reviewed and refereed open access journal that publishes articles which contribute new results in all areas of the Bioinformatics & Biosciences. Bioinformatics is the application of information science and technology to the field of biology to increase the understanding of all biological process. The aim of this journal is to publish all the latest and outstanding research articles in all areas of bioinformatics and Biometrics. Researchers and scientists from the fields of biology, computer science, mathematics, statistics, and physics are invited to share their developments and new techniques in the fields of Biometrics and Bioinformatics.

Cloud computing is recently a booming area and has been emerging as a commercial reality in the information technology domain. Cloud computing represents supplement, consumption and delivery model for IT services that are based on internet on pay as per usage basis. The scheduling of the cloud services to the consumers by service providers influences the cost benefit of this computing paradigm. In such a scenario, Tasks should be scheduled efficiently such that the execution cost and time can be reduced. In this paper, we proposed a meta-heuristic based scheduling, which minimizes execution time and execution cost as well. An improved genetic algorithm is developed by merging two existing scheduling algorithms for scheduling tasks taking into consideration their computational complexity and computing capacity of processing elements. Experimental results show that, under the heavy loads, the proposed algorithm exhibits a good performance.

This paper presents a virtual machine scheduling algorithm for Cloud Computing based on Green Computing concepts. The goal of this algorithm is the minimization of energy consumption in task executions in a cloud computing environment. This algorithm uses some features like shutdown of underutilized hosts, migration of loads of hosts that are operating below a certain threshold, and DVFS. It also applies the concept of active cooling control in order to minimize power consumption. The choice of which host will receive load is based on the concept of higher energy efficiency from the hosts, which is given by the ratio of MIPS by the energy consumed of each host. Results from simulation of this algorithm confronted with other surveyed algorithms have shown that it can improve the power consumption in clouds composed of heterogeneous datacenters while being equivalent to the best algorithms in homogeneous datacenters.

The International Journal of Wireless & Mobile Networks (IJWMN) is a bi monthly open access peer-reviewed journal that publishes
articles which contribute new results in all areas of Wireless & Mobile Networks. The journal focuses on all
technical and practical aspects of Wireless & Mobile Networks. The goal of this journal is to bring together
researchers and practitioners from academia and industry to focus on advanced wireless & mobile networking concepts
and establishing new collaborations in these areas.

Optical disk (OD) and drive (ODD) are important interfaces used for recording digital streams of bits that represent multimedia with analog nature or discrete data. Enhancing the ODDs in terms of reading/writing (operation) speed is vital as multi-layer (ML) ODs with high capacities are available in the market. This paper presents a simple strategy to enhance operation speed in ODDs by multi optical pickup unit (MOPU) 1 that leads to surprisingly higher transfer rates. The main considerations with different working modes plus theoretical and physical upper bounds are studied. To keep compatibility, the MOPU method is independent of the OD types or optical lens (OL) designs and based on the ODD hardware placement, so all ODs will be also readable at higher rates. Paper also discusses improvements achieved in experimental results based on prototypes.

The core motivations of deploying a sensor network for a specific application come from the autonomy of sensors, their reduced size, and their capabilities for computing and communicating in a short range. However, many challenges for sensor networks still exist: minimizing energy consumptions, and ensuring the performance of communication that may be affected by many parameters. The work described in this paper covers mainly the analysis of the impact of the temperature and humidity variations on link quality of XM1000 operating under TinyOS. Two-way ANOVA test has been applied and the obtained results show that both the temperature and humidity variations impact RSSI.

The extent to which parallel programming techniques can be applied in the field of economics is investigated. In particular, some basic parallel programming theory is introduced, followed by an application to a representative economic model by Aldrich et al. We show that one can incrementally introduce parallelism into a simple serial algorithm, using some simple directives in the source code. The algorithm's runtime is measured and compared for various congurations. We observe a speedup of up to 17x and conclude that parallel programming can indeed be applied in the field of economics, with interesting results.

Solid State Drives (SSDs) using flash memory storage technology present a promising storage solution for data-intensive applications due to their low latency, high bandwidth, and low power consumption compared to traditional hard disk drives. SSDs achieve these desirable characteristics using internal parallelism—parallel access to multiple internal flash memory chips—and a Flash Translation Layer (FTL) that determines where data is stored on those chips so that they do not wear out prematurely. Unfortunately, current state-of-the-art cache-based FTLs like the Demand-based Flash Translation Layer (DFTL) do not allow IO schedulers to take full advantage of internal parallelism because they impose a tight coupling between the logical-to-physical address translation and the data access. In this work, we propose an innovative IO scheduling policy called Parallel-DFTL that works with the DFTL to break the coupled address translation operations from data accesses. Parallel-DFTL schedules address translation and data access operations separately , allowing the SSD to use its flash access channel resources concurrently and fully for both types of operations. We present a performance model of FTL schemes that predicts the benefit of Parallel-DFTL against DFTL. We implemented our approach in an SSD simulator using real SSD device parameters, and used trace-driven simulation to evaluate its efficacy. Parallel-DFTL improved overall performance by up to 32% for the real IO workloads we tested, and up to two orders of magnitude for our synthetic test workloads. It is also found that Parallel-DFTL is able to achieve reasonable performance with a very small cache size.

This paper investigates an approach to the use of fractals in architectural design. Two major aspects are discussed. First, the effect of the direction of the line segments on the generated fractal, as well as, the proportions between the generator and the initiator. Secondly, the meanings attached to the lines segments that constitute the fractal are based on some known architectural organization. The goal is to develop a basis for using fractals to suggest architectural forms.

The International Journal of Wireless & Mobile Networks (IJWMN) is a bi monthly open access peer-reviewed journal that publishes
articles which contribute new results in all areas of Wireless & Mobile Networks. The journal focuses on all
technical and practical aspects of Wireless & Mobile Networks. The goal of this journal is to bring together
researchers and practitioners from academia and industry to focus on advanced wireless & mobile networking concepts
and establishing new collaborations in these areas.

Ova teza je uradena na Matematičkom institutu Srpske akademije nauka i umetnosti u Beogradu u okviru projekta "Reprezentacije logičkih struktura i primene u računarstvu". Njenom izradom je rukovodio prof. drŽarko Mijajlović, redovni profesor Matematičkog fakulteta Univerziteta u Beogadu, a komentor je bio dr Predrag Jovanović, naučni saradnik Astronomske opservatorije u Beogradu, kojima se zahvaljujem na korisnim primedbama i sugestijama koje su doprinele da ovo izlaganje bude preciznije i metodološki bolje. Takode se zahvaljujem prof. dr Nadi Pejović, vandrednom profesoru Matematičkog fakulteta Univerziteta u Beogradu, na trudu uloženom prilikom redigovanja ove teze kao i dr. Luki Popoviću naučnom saradniku Astronomske opservatorije u Beogradu na korisnim sugestijama.

We are presenting an innovative, massively-parallel heterogeneous architecture for the very fast construction and implementation of very large Aho-Corasick and Commentz-Walter pattern-matching automata, commonly used in data-matching applications, and validate its use with large sets of data actively used in intrusion detection systems. Our approach represents the first known hybrid-parallel model for the construction of such automata and the first to allow self-adjusting pattern-matching automata in real-time by allowing full-duplex transfers at maximum throughput between the host (CPU) and the device (GPU). The architecture we propose is easily scalable to multi-GPU and multi-CPU systems and benefits greatly from GPU acceleration, also relying on a highly-efficient storage model for the automata and includes on-demand support for regular-expression matching, as well as support for custom heuristics to be built on top of the architecture, at different processing stages.

The diffusion of the Next Generation Sequencing (NGS) has increased the amount of data obtainable by genomic experiments. From a DNA sample a NGS run is able to produce millions of short sequences (called reads), which should be mapped into a reference genome. In this paper, we analyse the performance of Bowtie2, a fast and popular DNA mapping tool. Bowtie2 exhibits a multithreading implementation on top of pthreads, spin-locks and SSE2 SIMD extension. From parallel computing viewpoint, is a paradigmatic example of a software requiring to address three fundamental problems in shared-memory programming for cache-coherent multi-core platforms: synchronisation efficiency at very fine grain (due to short reads), load-balancing (due to long reads), and efficient usage of memory subsystem (due to SSE2 memory pressure). We compare the original implementation against an alternative implementation on top of the FastFlow pattern-based programming framework. The proposed design exploits the high-level farm pattern of FastFlow, which is implemented top of nonblocking multi-threading and lock-less (CAS-free) queues, and provides the programmer with high-level mechanism to tune task scheduling to achieve both load-balancing and memory affinity. The proposed design, despite the high-level design, is always faster and more scalable with respect to the original one. The design of both original and alternative version will be presented along with their experimental evaluation on real-world data sets.

This paper presents a Graphics Processing Unit (GPU) based parallel implementation for the All Pairs Shortest Paths problem. The implementation is based on the Floyd-Warshall algorithm and takes full advantage of the highly multithreaded architecture of current manycore GPUs. Our solution reduces the communication between CPU and GPU, improves the Streaming Multiprocessors (SMs) utilization, and makes intensive use of coalesced memory access to optimize graph data access. The advantage of the proposed implementation is demonstrated for several graphs randomly generated using the widely known graph library GTgraph. Graphs containing thousands of vertices and different edges densities, varying from sparse to complete graphs, were generated and used in the experiments. The results showed excellent performance on diverse graphs, achieving gains of up to 149x when compared to a sequential implementation, and outperforming state-of-the-art GPU implementations by a factor of almost four ti...

A Language is a means of communication among humans. It has a structure and is defined by the rules of grammar, which govern the constitution of sentences, clauses and words. Linguistics, the scientific study of language concerns itself with a wide variety of topics such as syntax and semantics. It concerns itself with how the words in a language are combined to form a sentence and how meaning and information are derived from the sentence based on the context. Natural Language processing as a computational discipline has the goal of getting computers to perform tasks, which involve language such as sentiment analysis, parts of speech tagging, machine translation and conversational agents. Classical NLP consisted of the symbolic paradigm, which was based on modelling grammar using theoretical computer science and using rules based on logic. Later on, statistical and probabilistic models became the standard with noisy channel models and Bayesian inference methods being prevalent. In the last two decades, the increase in computing power and the large amounts of data that is available over the internet has led to increased focus on Machine Learning. Machine Learning paradigms like Hidden Markov Models were successful. In the few years, there has been a surge in the use of Deep Learning for various tasks including NLP. Deep Learning is that subfield of Machine Learning, which creates representations of data using artificial neural networks based on computational graphs. In this paper, we will review how deep learning architectures can be used for the task of machine translation and building conversational agents. Keywords: Recurrent neural networks; long short-term memory networks; Language models; encoder decoder architectures; attention mechanism; I. RECURRENT NEURAL NETWORKS Before we move to our NLP tasks, we need to understand Recurrent Neural Networks. It is assumed that the reader is aware of standard neural networks and their training with back-propagation using gradient descent/adam. In a standard neural network, we assume the individual data points to be independent and identically distributed. RNNs deal with sequential data. Input data consists of a sequence of feature vectors. Time here is an independent variable which iterates through the sequence. The corresponding output is also a sequence. Successive feature vectors in the input are temporally related and cannot be assumed to be independent. In a sequence, the output at one time step not only depends on the input at that time step but also on the inputs at previous time steps. We have a feedback mechanism with connections which form cycles. The hidden layer activations at a time step are given as input back to the hidden layer at the next time step. Such cycles in the computational graph enable us to define recurrence relations. This allows us to capture information from the history of the inputs. Let us define the computations. We have an input layer, a hidden layer and an output layer. Let matrix U denote the input to hidden layer weights, W denote the hidden to hidden recurrence relation weights and V denote the hidden to output weights. Let xt denote the input feature vector at time step t, at denote the pre activations of the hidden state vector and st denote the post activations. ot is the output layer pre-activations and y' t is our predicted output. We share the parameters across time steps.

The landscape of cloud computing has significantly changed over the last decade. Not only have more providers and service offerings crowded the space, but also cloud infrastructure that was traditionally limited to single provider data centers is now evolving. In this paper, we firstly discuss the changing cloud infrastructure and consider the use of infrastructure from multiple providers and the benefit of decentralising computing away from data centers. These trends have resulted in the need for a variety of new computing architectures that will be offered by future cloud infrastructure. These architectures are anticipated to impact areas, such as connecting people and devices, data-intensive computing, the service space and self-learning systems. Finally, we lay out a roadmap of challenges that will need to be addressed for realising the potential of next generation cloud systems.