Shared memory

In a snoopy cache multiprocessor system, each processor has a cache in which it stores blocks of data. Each cache is connected to a bus used to communicate with the other caches and with main memory. For several of the proposed models of snoopy caching, we present new on-line algorithms which decide, for each cache, which blocks to retain and which to drop in order to minimize communication over the bus. We prove that, for any sequence of operations, our algorithms' communication costs are within a constant factor of the minimum required for that sequence; for some of our algorithms we prove that no on-line algorithm has this property with a smaller constant.

This paper describes our experience with developing a parallel weighted- least-square (WLS) state estimation (SE) program for shared-memory parallel computers. Since the key computational kernel of the WLS algorithm based on the Newton-Raphson approach is a solver of sparse linear equations, a significant part of our effort was focused on selecting, implementing and evaluating this algorithm. An optimized shared memory version of the conjugate gradient (CG) algorithm was found to be competitive to state-of-the-art implementation of LU solvers for the SE problem on the SGI Altix, a shared memory architecture. We also ported the full SE algorithm including CG to the Cray MTA-2 shared memory multithreaded architecture and investigated its performance.

Turbulent flow over a sinusoidal solid wavy surface was investigated by a direct numerical simulation using a spectral element technique. The train of waves has an amplitude to wavelength ratio of 0.05. For the flow conditions (Re=hU b/2ν= 3460) considered, adverse pressure gradients were large enough to cause flow separation. Numerical results compare favorably with those of Hudson's (1993) measurements. Instantaneous flow fields show a large variation of the flow pattern in the spanwise direction in the separated bubble at a given time. A surprising result is the discovery of occasional velocity bursts which originate in the separated region and extend over large distances away from the wavy wall. Turbulence in this region is very different from that near a flat wall in that it is associated with a shear layer which is formed by flow separation.

Many dynamic scheduling algorithms have been proposed in the past. With the advent of multi core processors, there is a need to schedule multiple tasks on multiple cores. The scheduling algorithm needs to utilize all the available cores efficiently. The multicore processors may be SMPs or AMPs with shared memory architecture. In this paper, we propose a dynamic scheduling algorithm in which the scheduler resides on all cores of a multi-core processor and accesses a shared Task Data Structure (TDS) to pick up ready-to-execute tasks. This method is unique in the sense that the processor has the onus of picking up tasks whenever it is idle. We have discussed the proposed scheduling algorithm using a set of tasks as an example. The paper concludes with the discussion of advantages and limitations of the proposed scheduling algorithm.

In this paper a conceptual model is defined that can be used for the innovative design of logistic systems. The model is constructed by using the systems approach in a formal and fundamental way. It turns out that the model complies with the `hard systems approach', positioned in a trajectory according the `soft systems approach'. By this the model is an interdisciplinary tool that serves as a common frame of reference and decision making platform for the different disciplines involved. It enables unambiguous communication. Conceptual modeling of each separate discipline including their different monodisciplinary goals, is reflected by this single model. The model also serves as a facility to save design conditions and decisions for future innovations. The model forms the basis to build "shared memory".

Abstract: If the computational demands of an interactive gra-phics rendering application cannot be met by a single commodity Graphics Processing Unit (GPU), multiple graphics accelerators may be utilised on multi-GPU based systems such as SLI [1] or Crossfire [2] or by a cluster of PCs in conjunction with a soft-ware infrastructure. Typically these PC cluster solutions allow the application programmer to use a standard OpenGL API. In this paper we describe an FPGA based hardware architecture, which provides an interface for multiple commodity graphics ac-celerators. Our scalable parallel rendering architecture aims to accelerate graphics applications using a tightly coupled hybrid system of parallel commodity GPUs and reconfigurable hardwa-re [3], while providing similar services to the above mentioned approach. This is work in progress. So far, we have designed and manufactured the required custom-hardware. Currently, we are focussing on implementing the shared-memory subsystem.

The article presents the hardware and software architecture of the control of a mobile robot with anthropomorphic arm. The vehicle has an embedded system based in OS Linux, where is controlled all the functions of the vehicle using digital inputs and outputs, analog inputs and ports RS232. The architecture of the software in this system uses daemons; inter process communication (shared memory, FIFO arrays and semaphores) and an apache server to communicate with the remote control station. The remote station is a PC, where can be visualized three cameras, and to monitor and control all function of the robot with a gamepad or joystick. The architecture has been tested obtaining good results. It also presents a really good flexibility to integrate with different remote control stations in multiple platforms with security and standard protocols.

The Choices operating system architecture [3, 4, 15] uses class hierarchies and object-oriented programming to facilitate the construction of customized operating systems for shared memory and networked multiprocessors. The software is being used in the Tapestry Parallel Computing Laboratory at the University of Illinois to study the performance of algorithms, mechanisms, and policies for parallel systems. This paper describes the architectural design and class hierarchy of the Choices memory and secondary storage management system. The mechanisms and policies of a virtual memory system implement a memory hierarchy that exploits the trade-offs between response times and storage capacities. In Choices , the notion of a memory hierarchy is represented by layers in which abstract classes define interfaces between and internal to the layers. Concrete subclasses implement new algorithms or data structures or specializations of existing ones. This paper describes the motivation for an obj...

The suffix tree is a data structure for indexing strings. It is used in a variety of applications such as bioinformatics, time series analysis, clustering, text editing and data compression. However, when the string and the resulting suffix tree are too large to fit into the main memory, most existing construction algorithms become very inefficient. This paper presents a disk-based suffix tree construction method, called Elastic Range (ERa), which works efficiently with very long strings that are much larger than the available memory. ERa partitions the tree construction process horizontally and vertically and minimizes I/Os by dynamically adjusting the horizontal partitions independently for each vertical partition, based on the evolving shape of the tree and the available memory. Where appropriate, ERa also groups vertical partitions together to amortize the I/O cost. We developed a serial version; a parallel version for shared-memory and shared-disk multi-core systems; and a parallel version for shared-nothing architectures. ERa indexes the entire human genome in 19 minutes on an ordinary desktop computer. For comparison, the fastest existing method needs 15 minutes using 1024 CPUs on an IBM BlueGene supercomputer.

Remote procedure call (RPC) systems have been proven to be a practical basis for building distributed applications. The RPC technique abstracts a typical communication pattern to an ordinary procedure call. Compared with an ordinary procedure call, however, the conventional RPC technique has one evident restriction; pointers (addresses) cannot be passed to remote procedures without the explicit and nontrivial programming effort. This paper presents VMRPC, a lightweight RPC framework specifically designed for VMs that leverages the heap and stack sharing mechanism to circumvent unnecessary data copy and serialization/deserialization. Our evaluation shows that the performance of VMRPC is an order of magnitude better than traditional RPC systems and existing alternative inter-domain communication optimization systems.

This is the outcome of an urban analysis and planning workshop, realised between February - September 2015 in Demirköy // Samakofcuk // Malik Samakov // Малък Самоков // Sidchirion // Σιδηροχώρι in KIRKLARELI / TURKEY. Around 80, 1st year undergraduate students of the Urban and Regional Planning Department of the Mimar Sinan University in Istanbul and 9 of its staff have participated at the field work and the consecutive production of the outputs.

— The objective of this paper is to find out appropriate solution of parking related issues in different aspects. Increasing concentration of human activity on limited land both in terms of residential activity and commercial activity causes the parking problem. Thus parking of these vehicles in shopping malls, theatre etc., is an emerging issue that people faces everyday while parking. Our proposed system focuses to provide the assistive for smart vehicle parking system using the concept of shared memory in Embedded System. In our proposed system we use the shared memory of two parking slots where accessed by the users. In the implementation and design process we use two UTLP KIT to operate the memory from one slot to another. The slot providing for parking is made by programming in Eclipse IDE with Ubuntu as operating system. While retrieving the vehicle the user should enter the respective allocated slot number for the user through keypad. After retrieving a vehicle the slot will become vacant and it will be shown as an available slot for the next user. Thus the cars are filled in an appropriate manner.

Data Clustering is a descriptive data mining task of finding groups of objects such that the objects in a group will be similar (or related) to one another and different from (or unrelated to) the objects in other groups [5]. The motivation behind this research paper is to explore KMeans partitioning algorithm in the currently available parallel architecture using parallel programming models. Parallel KMeans algorithms have been implemented for a shared memory model using OpenMP programming and distributed memory model using MPI programming. A hybrid version of OpenMP in MPI programming also has been experimented. The performance of the parallel algorithms were analysed to compare the speedup obtained and to study the Amdhals effect. The computational time of hybrid method was reduced by 50% compared to MPI and was also more efficient with balanced load.